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"A high-throughput low-power fully parallel 1024-bit 1/2-rate low density ..."

Lili Zhou et al. (2006)

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DOI: 10.1109/ASPDAC.2006.1594652

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-29

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  - https://dblp.org/rec/conf/aspdac/ZhouWJHS06
Lili Zhou, Cherry Wakayama, Nuttorn Jangkrajarng, Bo Hu, Chuanjin Richard Shi:
A high-throughput low-power fully parallel 1024-bit 1/2-rate low density parity check code decoder in 3-dimensional integrated circuits. ASP-DAC 2006: 92-93

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