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ORCIDSeda Ogrenci Memik
Seda Ogrenci-Memik – Seda Ogrenci
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- affiliation: Northwestern University, Department of Electrical and Computer Engineering, Evanston, IL, USA
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2020 – today
- 2024
[j32]Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci-Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Dongning Guo, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo
, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Shen Wang, Thomas K. Warburton:
Corrigendum: Applications and techniques for fast machine learning in science. Frontiers Big Data 6 (2024)- [c74]Rui Shi, Seda Ogrenci, J. M. Arnold, J. R. Berlioz, Pierrick Hanlet, Kyle J. Hazelwood, M. A. Ibrahim, Han Liu, V. P. Nagaslaev, Aakaash Narayanan, D. J. Nicklaus, Jovan Mitrevski, Gauri Pradhan, A. L. Saewert, B. A. Schupbach, Kiyomi Seiya, Mattson Thieme, R. M. Thurman-Keup, N. V. Tran:
ML-Based Real-Time Control at the Edge: An Approach Using hls4ml. IPDPS (Workshops) 2024: 191 - [c73]Ryan F. Forelli, Rui Shi, Seda Ogrenci, Joshua Agar:
A High Level Synthesis Methodology for Dynamic Monitoring of FPGA ML Accelerators. VTS 2024: 1-5 - 2023
- [c72]Adam Quinn, Manuel Blanco Valentin, Thomas Zimmerman, Davide Braga, Seda Ogrenci Memik, Farah Fahim:
A Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors. ISCAS 2023: 1-5 - [i5]Rui Shi, Seda Ogrenci, J. M. Arnold, J. R. Berlioz, Pierrick Hanlet, Kyle J. Hazelwood, M. A. Ibrahim, Han Liu, V. P. Nagaslaev, Aakaash Narayanan, D. J. Nicklaus, Jovan Mitrevski, Gauri Pradhan, A. L. Saewert, B. A. Schupbach, Kiyomi Seiya, Mattson Thieme, R. M. Thurman-Keup, N. V. Tran:
ML-based Real-Time Control at the Edge: An Approach Using hls4ml. CoRR abs/2311.05716 (2023) - [i4]Chenwei Xu, Jerry Yao-Chieh Hu, Aakaash Narayanan, Mattson Thieme, Vladimir Nagaslaev, Mark Austin, Jeremy Arnold, Jose Berlioz, Pierrick Hanlet, Aisha Ibrahim, Dennis Nicklaus, Jovan Mitrevski, Jason Michael St. John, Gauri Pradhan, Andrea Saewert, Kiyomi Seiya, Brian Schupbach, Randy Thurman-Keup, Nhan Tran, Rui Shi, Seda Ogrenci, Alexis Maya-Isabelle Shuping, Kyle J. Hazelwood, Han Liu:
Beyond PID Controllers: PPO with Neuralized PID Policy for Proton Beam Intensity Control in Mu2e. CoRR abs/2312.17372 (2023) - 2022
- [j31]Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Dongning Guo, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Shen Wang, Thomas K. Warburton:
Applications and Techniques for Fast Machine Learning in Science. Frontiers Big Data 5: 787421 (2022) - 2021
- [j30]Yingyi Luo, Joshua C. Zhao, Arnav Aggarwal, Seda Ogrenci-Memik, Kazutomo Yoshii:
Thermal Management for FPGA Nodes in HPC Systems. ACM Trans. Design Autom. Electr. Syst. 26(2): 14:1-14:17 (2021) - [i3]Farah Fahim, Benjamin Hawks, Christian Herwig, James Hirschauer, Sergo Jindariani, Nhan Tran, Luca P. Carloni, Giuseppe Di Guglielmo, Philip C. Harris, Jeffrey D. Krupa, Dylan S. Rankin, Manuel Blanco Valentin, Josiah D. Hester, Yingyi Luo, John Mamish, Seda Ogrenci Memik, Thea Aarrestad, Hamza Javed, Vladimir Loncar, Maurizio Pierini, Adrian Alan Pol, Sioni Summers, Javier M. Duarte, Scott Hauck, Shih-Chieh Hsu, Jennifer Ngadiuba, Mia Liu, Duc Hoang, Edward Kreinar, Zhenbin Wu:
hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices. CoRR abs/2103.05579 (2021) - [i2]Giuseppe Di Guglielmo, Farah Fahim, Christian Herwig, Manuel Blanco Valentin, Javier M. Duarte, Cristian Gingu, Philip C. Harris, James Hirschauer, Martin Kwok, Vladimir Loncar, Yingyi Luo, Llovizna Miranda, Jennifer Ngadiuba, Daniel Noonan, Seda Ogrenci-Memik, Maurizio Pierini, Sioni Summers, Nhan Tran:
A reconfigurable neural network ASIC for detector front-end data compression at the HL-LHC. CoRR abs/2105.01683 (2021) - [i1]Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Thomas K. Warburton, Maria Acosta Flechas, Anthony Aportela, Thomas Calvet, Leonardo Cristella, Daniel Diaz, Caterina Doglioni, Maria Domenica Galati, Elham E Khoda, Farah Fahim, Davide Giri, Benjamin Hawks, Duc Hoang, Burt Holzman, Shih-Chieh Hsu, Sergo Jindariani, Iris Johnson, Raghav Kansal, Ryan Kastner, Erik Katsavounidis, Jeffrey D. Krupa, Pan Li, Sandeep Madireddy, Ethan Marx, Patrick McCormack, Andres Meza, Jovan Mitrevski, Mohammed Attia Mohammed, Farouk Mokhtar, Eric A. Moreno, Srishti Nagu, Rohin Narayan, Noah Palladino, Zhiqiang Que, Sang Eon Park, Subramanian Ramamoorthy, Dylan S. Rankin, Simon Rothman, Ashish Sharma, Sioni Summers, Pietro Vischia, Jean-Roch Vlimant, Olivia Weng:
Applications and Techniques for Fast Machine Learning in Science. CoRR abs/2110.13041 (2021) - 2020
- [j29]Farah Fahim, Siddhartha Joshi, Seda Ogrenci-Memik, Hooman Mohseni:
A Low-Power, High-Speed Readout for Pixel Detectors Based on an Arbitration Tree. IEEE Trans. Very Large Scale Integr. Syst. 28(2): 576-584 (2020)
2010 – 2019
- 2019
- [j28]Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik:
A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 742-755 (2019) - 2018
- [j27]Kaicheng Zhang, Akhil Guliani, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Rajesh Sankaran, Peter H. Beckman:
Machine Learning-Based Temperature Prediction for Runtime Thermal Management Across System Components. IEEE Trans. Parallel Distributed Syst. 29(2): 405-419 (2018) - [c71]Yingyi Luo, Xiaoyang Wang, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Peter H. Beckman:
Minimizing Thermal Variation in Heterogeneous HPC Systems with FPGA Nodes. ICCD 2018: 537-544 - 2017
- [j26]Dawei Li, Siddhartha Joshi, Ji-Hoon Kim, Seda Ogrenci Memik:
End-to-End Analysis of Integration for Thermocouple-Based Sensors Into 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2498-2511 (2017) - [c70]Dawei Li, Kaicheng Zhang, Akhil Guliani, Seda Ogrenci Memik:
Adaptive Thermal Management for 3D ICs with Stacked DRAM Caches. DAC 2017: 3:1-3:6 - [c69]Yingyi Luo, Xianshan Wen, Kazutomo Yoshii, Seda Ogrenci Memik, Gokhan Memik, Hal Finkel, Franck Cappello:
Evaluating irregular memory access on OpenCL FPGA platforms: A case study with XSBench. FPL 2017: 1-4 - [c68]Yingyi Luo, Seda Ogrenci Memik, Jie Gu:
Cell-to-array thermal-aware analysis of stacked RRAM. ISCAS 2017: 1-4 - [c67]Siddhartha Joshi, Dawei Li, Seda Ogrenci Memik, Grzegorz Deptuch, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran:
A content addressable memory with multi-Vdd scheme for low power tunable operation. MWSCAS 2017: 401-404 - 2016
- [j25]Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik:
A Partial Carry-Save On-the-Fly Correction Multispeculative Multiplier. IEEE Trans. Computers 65(11): 3251-3264 (2016) - [c66]Georgios Tziantzioulis, Ali Murat Gok, S. M. Faisal, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy:
Lazy Pipelines: Enhancing quality in approximate computing. DATE 2016: 1381-1386 - 2015
- [c65]S. M. Faisal, Georgios Tziantzioulis, Ali Murat Gok, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy:
Edge importance identification for energy efficient graph processing. IEEE BigData 2015: 347-354 - [c64]Georgios Tziantzioulis, Ali Murat Gok, S. M. Faisal, Nikolaos Hardavellas, Seda Ogrenci Memik, Srinivasan Parthasarathy:
b-HiVE: a bit-level history-based error model with value correlation for voltage-scaled integer and floating point units. DAC 2015: 105:1-105:6 - [c63]Begum Egilmez, Gokhan Memik, Seda Ogrenci Memik, Oguz Ergin:
User-specific skin temperature-aware DVFS for smartphones. DATE 2015: 1217-1220 - [c62]Dawei Li, Siddhartha Joshi, Seda Ogrenci Memik, James Hoff, Sergo Jindariani, Tiehui Liu, Jamieson Olsen, Nhan Tran:
A methodology for power characterization of associative memories. ICCD 2015: 491-498 - [c61]Kaicheng Zhang, Seda Ogrenci Memik, Gokhan Memik, Kazutomo Yoshii, Rajesh Sankaran, Peter H. Beckman:
Minimizing Thermal Variation Across System Components. IPDPS 2015: 1139-1148 - [c60]Dawei Li, Seda Ogrenci Memik, Lawrence J. Henschen:
On-chip integration of thermoelectric energy harvesting in 3D ICs. ISCAS 2015: 1078-1081 - [e1]Eli Bozorgzadeh, João M. P. Cardoso, Rui Abreu, Seda Ogrenci Memik:
13th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2013, Porto, Portugal, October 21-23, 2015. IEEE Computer Society 2015, ISBN 978-1-4673-8299-1 [contents] - 2014
- [j24]Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina:
Improving circuit performance with multispeculative additive trees in high-level synthesis. Microelectron. J. 45(11): 1470-1479 (2014) - 2013
- [j23]Brian Leung, Seda Ogrenci Memik:
Exploring super-resolution implementations across multiple platforms. EURASIP J. Adv. Signal Process. 2013: 116 (2013) - [j22]Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida:
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths. Integr. 46(2): 119-130 (2013) - [j21]Jieyi Long, Dawei Li, Seda Ogrenci Memik, Semail Ülgen:
Theory and Analysis for Optimization of On-Chip Thermoelectric Cooling Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1628-1632 (2013) - [c59]Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina:
Multispeculative additive trees in high-level synthesis. DATE 2013: 188-193 - [c58]Dawei Li, Ji-Hoon Kim, Seda Ogrenci Memik:
Integrating thermocouple sensors into 3D ICs. ICCD 2013: 221-226 - [c57]Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik:
Exploring the energy efficiency of Multispeculative Adders. ICCD 2013: 309-315 - 2012
- [j20]Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, José M. Mendías, María C. Molina:
Multispeculative Addition Applied to Datapath Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(12): 1817-1830 (2012) - 2011
- [j19]Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, Jose Manuel Mendias, Román Hermida:
A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(3): 350-363 (2011) - [c56]Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida:
Power optimization in heterogenous datapaths. DATE 2011: 1400-1405 - [c55]Song Liu, Brian Leung, Alexander Neckar, Seda Ogrenci Memik, Gokhan Memik, Nikos Hardavellas:
Hardware/software techniques for DRAM thermal management. HPCA 2011: 515-525 - [c54]Song Liu, Seda Ogrenci Memik, Yehea I. Ismail:
A Comprehensive Tapered buffer optimization algorithm for unified design metrics. ISCAS 2011: 2277-2280 - 2010
- [j18]Alessio Montone, Marco D. Santambrogio, Donatella Sciuto, Seda Ogrenci Memik:
Placement and Floorplanning in Dynamically Reconfigurable FPGAs. ACM Trans. Reconfigurable Technol. Syst. 3(4): 24:1-24:34 (2010) - [j17]Min Ni, Seda Ogrenci Memik:
A Fast Heuristic Algorithm for Multidomain Clock Skew Scheduling. IEEE Trans. Very Large Scale Integr. Syst. 18(4): 630-637 (2010) - [j16]Song Liu, Yu Zhang, Seda Ogrenci Memik, Gokhan Memik:
An Approach for Adaptive DRAM Temperature and Power Management. IEEE Trans. Very Large Scale Integr. Syst. 18(4): 684-688 (2010) - [j15]Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail:
SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation. IEEE Trans. Very Large Scale Integr. Syst. 18(9): 1323-1336 (2010) - [c53]Jieyi Long, Seda Ogrenci Memik:
A framework for optimizing thermoelectric active cooling systems. DAC 2010: 591-596 - [c52]Jieyi Long, Seda Ogrenci Memik, Matthew Grayson:
Optimization of an on-chip active cooling system based on thin-film thermoelectric coolers. DATE 2010: 117-122 - [c51]Jieyi Long, Seda Ogrenci Memik:
Optimization of the bias current network for accurate on-chip thermal monitoring. DATE 2010: 1365-1368 - [c50]Jieyi Long, Seda Ogrenci Memik:
Inversed Temperature Dependence aware clock skew scheduling for sequential circuits. DATE 2010: 1657-1660 - [c49]Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Román Hermida, Seda Ogrenci Memik:
Using Speculative Functional Units in high level synthesis. DATE 2010: 1779-1784 - [c48]Brian Leung, Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra:
An Interior Point Optimization Solver for Real Time Inter-frame Collision Detection: Exploring Resource-Accuracy-Platform Tradeoffs. FPL 2010: 113-118 - [c47]Min Ni, Seda Ogrenci Memik:
A revisit to the primal-dual based clock skew scheduling algorithm. ISQED 2010: 755-764
2000 – 2009
- 2009
- [j14]Francesco Redaelli, Marco D. Santambrogio, Seda Ogrenci Memik:
An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-Dimensional Reconfigurable Architectures. Int. J. Reconfigurable Comput. 2009: 541067:1-541067:12 (2009) - [c46]Chih-Hung Wu, Seda Ogrenci Memik, Sanjay Mehrotra:
FPGA Implementation of the Interior-Point Algorithm with Applications to Collision Detection. FCCM 2009: 295-298 - 2008
- [j13]Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee:
Thermal monitoring mechanisms for chip multiprocessors. ACM Trans. Archit. Code Optim. 5(2): 9:1-9:33 (2008) - [j12]Seda Ogrenci Memik, Rajarshi Mukherjee, Min Ni, Jieyi Long:
Optimizing Thermal Sensor Allocation for Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3): 516-527 (2008) - [j11]Seda Ogrenci Memik, Nikolaos Bellas, Somsubhra Mondal:
Presynthesis Area Estimation of Reconfigurable Streaming Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 2027-2038 (2008) - [j10]Jieyi Long, Hai Zhou, Seda Ogrenci Memik:
EBOARST: An Efficient Edge-Based Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(12): 2169-2182 (2008) - [j9]Rajarshi Mukherjee, Song Liu, Seda Ogrenci Memik, Somsubhra Mondal:
A high-level clustering algorithm targeting dual Vdd FPGAs. ACM Trans. Design Autom. Electr. Syst. 13(4): 57:1-57:20 (2008) - [c45]Jieyi Long, Seda Ogrenci Memik:
Automated design of self-adjusting pipelines. DAC 2008: 211-216 - [c44]Min Ni, Seda Ogrenci Memik:
Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction. DAC 2008: 610-613 - [c43]Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik:
A power and temperature aware DRAM architecture. DAC 2008: 878-883 - [c42]Brian Leung, Yan Pan, Christopher L. Schroeder, Seda Ogrenci Memik, Gokhan Memik, Mitra J. Z. Hartmann:
Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system. FPL 2008: 191-196 - [c41]Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik:
An approach for adaptive DRAM temperature and power management. ICS 2008: 63-72 - [c40]Jieyi Long, Hai Zhou, Seda Ogrenci Memik:
An O(nlogn) edge-based algorithm for obstacle-avoiding rectilinear steiner tree construction. ISPD 2008: 126-133 - [c39]Francesco Redaelli, Marco D. Santambrogio, Seda Ogrenci Memik:
An ILP Formulation for the Task Graph Scheduling Problem Tailored to Bi-dimensional Reconfigurable Architectures. ReConFig 2008: 97-102 - [c38]Alessio Montone, Francesco Redaelli, Marco D. Santambrogio, Seda Ogrenci Memik:
A Reconfiguration-Aware Floorplacer for FPGAs. ReConFig 2008: 109-114 - 2007
- [c37]Min Ni, Seda Ogrenci Memik:
Self-heating-aware optimal wire sizing under Elmore delay model. DATE 2007: 1373-1378 - [c36]Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail:
A self-adjusting clock tree architecture to cope with temperature variations. ICCAD 2007: 75-82 - [c35]Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto:
A novel SoC design methodology combining adaptive software and reconfigurable hardware. ICCAD 2007: 303-308 - [c34]Min Ni, Seda Ogrenci Memik:
Early planning for clock skew scheduling during register binding. ICCAD 2007: 429-434 - [c33]Marco D. Santambrogio, Matteo Giani, Seda Ogrenci Memik:
Managing Reconfigurable Resources in Heterogeneous Cores Using Portable Pre-Synthesized Templates. SoC 2007: 1-4 - 2006
- [j8]Rajarshi Mukherjee, Seda Ogrenci Memik:
An Integrated Approach to Thermal Management in High-Level Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 14(11): 1165-1174 (2006) - [c32]Rajarshi Mukherjee, Seda Ogrenci Memik:
Systematic temperature sensor allocation and placement for microprocessors. DAC 2006: 542-547 - [c31]Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik:
A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. ERSA 2006: 56-62 - [c30]Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas:
Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. FCCM 2006: 325-326 - [c29]Giovanni Agosta, Marco D. Santambrogio, Seda Ogrenci Memik:
Adaptive Metrics for System-Level Functional Partitioning. FDL 2006: 153-155 - [c28]Somsubhra Mondal, Seda Ogrenci Memik:
Power Optimization Techniques for SRAM-Based FPGAs. FPL 2006: 1-2 - [c27]Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas:
Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. FPL 2006: 1-4 - [c26]Vincenzo Rana, Marco D. Santambrogio, Seda Ogrenci Memik, Donatella Sciuto:
Combining hardware reconfiguration and adaptive computation for a novel SoC design methodology. FPT 2006: 293-296 - [c25]Min Ni, Seda Ogrenci Memik:
Thermal-induced leakage power optimization by redundant resource allocation. ICCAD 2006: 297-302 - [c24]Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik:
Thermal sensor allocation and placement for reconfigurable systems. ICCAD 2006: 437-442 - [c23]Rajarshi Mukherjee, Seda Ogrenci Memik:
Physical aware frequency selection for dynamic thermal management in multi-core systems. ICCAD 2006: 547-552 - [c22]Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik:
Fine-grain thermal profiling and sensor insertion for FPGAs. ISCAS 2006 - 2005
- [j7]Eren Kursun, Rajarshi Mukherjee, Seda Ogrenci Memik:
Early Quality Assessment for Low Power Behavioral Synthesis. J. Low Power Electron. 1(3): 273-285 (2005) - [j6]Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh:
On effective slack management in postscheduling phase. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(4): 645-653 (2005) - [j5]Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005) - [c21]Somsubhra Mondal, Seda Ogrenci Memik:
Resource sharing in pipelined CDFG synthesis. ASP-DAC 2005: 795-798 - [c20]Rajarshi Mukherjee, Seda Ogrenci Memik:
Evaluation of dual VDD fabrics for low power FPGAs. ASP-DAC 2005: 1240-1243 - [c19]Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik:
Temperature-aware resource allocation and binding in high-level synthesis. DAC 2005: 196-201 - [c18]Somsubhra Mondal, Seda Ogrenci Memik, Debasish Das:
Hierarchical LUT structures for leakage power reduction (abstract only). FPGA 2005: 272 - [c17]David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Alok N. Choudhary:
Real-Time Feature Extraction for High Speed Networks. FPL 2005: 438-443 - [c16]Somsubhra Mondal, Seda Ogrenci Memik:
Fine-grain leakage optimization in SRAM based FPGAs. ACM Great Lakes Symposium on VLSI 2005: 238-243 - [c15]Roozbeh Jafari, Seda Ogrenci Memik, Majid Sarrafzadeh:
Quick Reconfiguration in Clustered Micro-Sequencer. IPDPS 2005 - [c14]Somsubhra Mondal, Seda Ogrenci Memik:
A low power FPGA routing architecture. ISCAS (2) 2005: 1222-1225 - [c13]Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik:
Peak temperature control and leakage reduction during binding in high level synthesis. ISLPED 2005: 251-256 - 2004
- [j4]Elaheh Bozorgzadeh, Seda Ogrenci Memik, Xiaojian Yang, Majid Sarrafzadeh:
Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs. J. Circuits Syst. Comput. 13(1): 77-100 (2004) - [c12]Rajarshi Mukherjee, Seda Ogrenci Memik:
Power Management for FPGAs: Power-Driven Design Partitioning. FCCM 2004: 326-327 - [c11]Rajarshi Mukherjee, Seda Ogrenci Memik:
Power-Driven Design Partitioning. FPL 2004: 740-750 - 2003
- [j3]Seda Ogrenci Memik, Aggelos K. Katsaggelos, Majid Sarrafzadeh:
Analysis and FPGA Implementation of Image Restoration under Resource Constraints. IEEE Trans. Computers 52(3): 390-399 (2003) - [c10]Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, Eren Kursun:
Global resource sharing for synthesis of control data flow graphs on FPGAs. DAC 2003: 604-609 - [c9]Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh:
Achieving Design Closure Through Delay Relaxation Parameter. ICCAD 2003: 54-57 - 2002
- [j2]Ryan Kastner, Adam Kaplan, Seda Ogrenci Memik, Elaheh Bozorgzadeh:
Instruction generation for hybrid reconfigurable systems. ACM Trans. Design Autom. Electr. Syst. 7(4): 605-627 (2002) - [c8]Gokhan Memik, Seda Ogrenci Memik, William H. Mangione-Smith:
Design and Analysis of a Layer Seven Network Processor Accelerator Using Reconfigurable Logic. FCCM 2002: 131- - [c7]Seda Ogrenci Memik, Farzan Fallah:
Accelerated SAT-based Scheduling of Control/Data Flow Graphs. ICCD 2002: 395- - [c6]Eren Kursun, Ankur Srivastava, Seda Ogrenci Memik, Majid Sarrafzadeh:
Early evaluation techniques for low power binding. ISLPED 2002: 160-165 - 2001
- [j1]Abhishek Ranjan, Kia Bazargan, Seda Ogrenci, Majid Sarrafzadeh:
Fast floorplanning for effective prediction and construction. IEEE Trans. Very Large Scale Integr. Syst. 9(2): 341-351 (2001) - [c5]Elaheh Bozorgzadeh, Seda Ogrenci Memik, Majid Sarrafzadeh:
RPack: routability-driven packing for cluster-based FPGAs. ASP-DAC 2001: 629-634 - [c4]Kia Bazargan, Seda Ogrenci, Majid Sarrafzadeh:
Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures. DAC 2001: 635-640 - [c3]Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
Instruction Generation for Hybrid Reconfigurable Systems. ICCAD 2001: 127- - [c2]Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh:
A Super-Scheduler for Embedded Reconfigurable Systems. ICCAD 2001: 391- - 2000
- [c1]Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh:
A C to Hardware/Software Compiler. FCCM 2000: 331-332
Coauthor Index
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