Volume 18, Number 1, January 1999
, Renate Merker
: Hierarchical algorithm partitioning at system level for an improved utilization of memory structures.
: Synthesizing controllers from real-time specifications.
: Techniques for minimizing and balancing I/O during functional partitioning.
Volume 18, Number 2, February 1999
Kenneth Y. Yun
, David L. Dill
: Automatic synthesis of extended burst-mode circuits. I.(Specification and hazard-free implementations).
: An improved optimal algorithm for bubble-sorting-basednon-Manhattan channel routing.
, Y. L. Le Coz
, Hans J. Greub
, R. B. Iverson
, Robert F. Philhower
, Pete M. Campbell
, Cliff A. Maier
, Sam A. Steidl
, Matthew W. Ernest
, Russell P. Kraft
, Steven R. Carlough
, J. W. Perry
, Thomas W. Krawczyk Jr.
, John F. McDonald
: Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy.
Volume 18, Number 3, March 1999
Volume 18, Number 4, April 1999
, Lei He
: Theory and algorithm of local-refinement-based optimization with application to device and interconnect sizing.
Volume 18, Number 5, May 1999
, Jason Cong
: An efficient approach to multilayer layer assignment with anapplication to via minimization.
Volume 18, Number 6, June 1999
Volume 18, Number 7, July 1999
Volume 18, Number 8, August 1999
Volume 18, Number 9, September 1999
K. C. Chang
: Comment on "Event suppression by optimizing VHDL programs".
Volume 18, Number 10, October 1999
Mahesh B. Patil
: Extension of the VR discretization scheme for velocity saturation.
: An efficient cut-based algorithm on minimizing the number of L-shaped channels for safe routing ordering.
Robert P. Dick
, Niraj K. Jha
: Corrections to "mogac: a multiobjective genetic algorithm for hardware-software cosynthesis of distributed embedded systems".
Volume 18, Number 11, November 1999
, Niraj K. Jha
: FACT: a framework for applying throughput and power optimizing transformations to control-flow-intensive behavioral descriptions.
, Chang Wu
: Optimal FPGA mapping and retiming with efficient initial state computation.
, Tom Chen
: On comparing functional fault coverage and defect coverage for memory testing.
Volume 18, Number 12, December 1999
: Voltage- and current-based fault simulation for interconnect open defects.