International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil.
Rio de Janeiro, Brazil
Analog to Digital Converters I
S. S. Chong
, P. K. Chan
: A quiescent power-aware low-voltage output capacitorless low dropout regulator for SoC applications.
, Wing-Hung Ki
: An output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction for SoC.
Edward N. Y. Ho
, Philip K. T. Mok
: Design optimization of an output capacitor-less low dropout regulator with compensation capcitance reduction and slew-rate enhancement technique.
Memory Circuits I
Life Science Systems & Applications
Image & Video Coding
Adaptive Techniques in Signal and Image Processing Applications
FIR Digital Filters
, Tapio Saramaki
: "A MATLAB based optimum multiband FIR filters design program following the original idea of the Remez multiple exchange algorithm".
Ya Jun Yu
: Design of variable bandedge FIR filters with extremely large bandedge variation range.
Wen Bin Ye
, Ya Jun Yu
: Switching activity analysis and power estimation for multiple constant multiplier block of FIR filters.
Digitally Intensive Frequency Synthesis Architectures for the Nano-Scale - Part I
Wireline Communications I
Advanced Transmitter Design Techniques
Power Converter I
, Dongsheng Ma
: Integrated SIMO DC-DC converter with on-line charge meter for adaptive PCCM operation.
Moises Tanca V.
, Ivo Barbi
: Nonisolated high step-up stacked dc-dc converter based on boost converter elements for high power application.
Analog to Digital Converters II
Emerging Energy & Power Integrated Circuits
, Philip K. T. Mok
: Ultra-fast hysteretic single-inductor-dual-output boost regulator with predictable noise spectrum and minimized cross-regulation.
Memory Circuits II
Experiences with CAS teaching
Visual Signal Analysis & Understanding
Detection and Estimation
, S. C. Chan
: DOA estimation of coherent signals for uniform linear arrays with mutual coupling.
: An improved model of jitter effects in analog-to-digital conversion.
Digital Filter Design & Implementation
, Pramod Kumar Meher
: Efficient coefficient partitioning for decomposed DA-based inner-product computation.
Digitally Intensive Frequency Synthesis Architectures for the Nano-Scale - Part II
Ulrich L. Rohde
, Ajay K. Poddar
: Digital frequency synthesizer using adaptive mode-coupled resonator mechanism for low phase noise and low jitter applications.
: Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directions.
Wireline Communications II
, Lee-Sup Kim
: A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradation.
Advanced Baseband Design Techniques
Power Converter II
Analog to Digital Converters III
: The inconvenient truth about alias rejection in continuous time ΔΣ converters.
Design Techniques for Storage Elements
, Mineo Kaneko
: Variable-duty-cycle scheduling in double-edge-triggered flip-flop-based high-level synthesis.
VLSI for Video Systems I
Pedagogical Innovations in Circuits, Signals & Systems Education
: Analysis of assessment using signals, systems concept inventory for systems courses.
: Rethinking Fourier's legacy in signals and systems education.
Visual Signal Coding & Communications
Blind Signal Processing
IC Implementation of DSP Algorithms
MIMO Communications Systems
Cryptography & Security for Communications Systems
Power Converter III
Tools & Methods for Analog Circuit Design
Circuits for Biomedical Systems & Bio-Inspired Systems
Power Eletronic Circuits I
Loai G. Salem
, Rinkle Jain
: A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC converters.
Low-Power Circuits II
, Xiangku Li
: Improve accuracy of delay element by filtering false path for low power desychronized circuits.
Image Processing & Analysis
Neuromorphic Circuits & Systems
Low Voltage, Low Power Circuits
Wireless, Wearable & Implantable/Injectable Technology II
Power Eletronic Circuits II
VLSI for Video Systems II
DSP for Communications
Gabriel N. Maggio
, Mario R. Hueda
: Design and parallel implementation of an adaptive baseline wander compensator for high-speed optical coherent receivers.
, Zhi Ding
: A convex optimization approach to reducing peak-to-average-power ratio in OFDM.
ADC and PLL
Broadband Analog Signal Processing Circuits
Life Science Applications
, Kea-Tiong Tang
: Active noise cancellation of motion artifacts in pulse oximetry using isobestic wavelength light source.
Testing & Arithmetic Circuits
Digital Signal Processing Applications
Neural Networks II
, Jun Wang
: A one-layer recurrent neural network for constrained single-ratio linear fractional programming.
: Prototype rotation based assisted image analysis for 3D vision system.
Sigma Delta ADC
, Ana Rusu
: High-order continuous-time incremental ΣΔ ADC for multi-channel applications.
Oscillators & Frequency Synthesizers
Learning from Others Mistakes
, Amine Bermak
, Raphael Berner
, Gert Cauwenberghs
, Shoushun Chen
, Jennifer Blain Christen
, Timothy G. Constandinou
, Eugenio Culurciello
, Marc Dandin
, Timir Datta
, Tobi Delbrück
, Piotr Dudek
, Amir Eftekhar
, Ralph Etienne-Cummings
, Giacomo Indiveri
, Matthew K. Law
, Bernabé Linares-Barranco
, Jonathan Tapson
, Wei Tang
, Yiming Zhai
: Confession session: Learning from others mistakes.
Arithmetic Circuits I
Design, Project & Learning Technology Innovations in Circuits, Signals & Systems Education
: An online adaptive tutoring system for design-centric courses.
Physical Design & Clock Synthesis
Multimedia Compression & Quality
, Yap-Peng Tan
: Frame-level quantization control for perceptual quality constrained H.264/AVC video coding.
Recent Advances in Linear & Non-Linear Adaptive Filters
UWB Circuits & Systems I
Low-Density Parity-Check Decoder Design
Bifurcation and Chaos
: On rigorous integration of piece-wise linear continuous systems.
Integrated Power Converters & Energy Harvesting
Analog Filtering & Signal Processing
Noise Immunity & ESD
: Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuits.
Arithmetic Circuits II
, Hong Wang
: Desynchronize a legacy floating-point adder with operand-dependant delay elements.
Circuits for Biomedical Systems I