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"A dual-loop delay locked loop with multi digital delay lines for GHz DRAMs."

Jinyeong Moon, Hye-young Lee (2011)

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DOI: 10.1109/ISCAS.2011.5937564

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-30

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Jinyeong Moon, Hye-young Lee:
A dual-loop delay locked loop with multi digital delay lines for GHz DRAMs. ISCAS 2011: 313-316

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