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ORCIDAntonio González 0001
Person information
- affiliation: Polytechnic University of Catalonia (UPC), Department of Computer Architecture
- affiliation: Intel Labs, Intel Barcelona Research Center
Other persons with the same name
- Antonio González — disambiguation page
- Antonio González 0002 — University College London
- Antonio González 0003 — Adasa Sistemas S.A.U., Barcelona, Spain
- Antonio González 0004
![[0000-0003-2690-0472]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-2690-0472")
(aka: Antonio González Sorribes) — University of Zaragoza, Spain (and 1 more) - Antonio González Muñoz (aka: Antonio González 0005) — University of Granada, Department of Computer Science and Artificial Ingelligence, Spain
- Antonio González 0006 (aka: Antonio González Torres) — Costa Rica Institute of Technology, Cartago, Costa Rica (and 2 more)
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2020 – today
- 2023
[j92]Raúl Taranco, José-María Arnau, Antonio González:
LOCATOR: Low-power ORB accelerator for autonomous cars. J. Parallel Distributed Comput. 174: 32-45 (2023)- [j91]Reza Yazdani Aminabadi, Olatunji Ruwase, Minjia Zhang, Yuxiong He, José-María Arnau, Antonio González:
SHARP: An Adaptable, Energy-Efficient Accelerator for Recurrent Neural Networks. ACM Trans. Embed. Comput. Syst. 22(2): 30:1-30:23 (2023) - [j90]Albert Segura, José-María Arnau, Antonio González:
Irregular accesses reorder unit: improving GPGPU memory coalescing for graph-based workloads. J. Supercomput. 79(1): 762-787 (2023) - [c217]Franyell Silfa, José-María Arnau, Antonio González:
Exploiting Kernel Compression on BNNs. DATE 2023: 1-6 - [c216]Pedro Henrique Exenberger Becker, José-María Arnau, Antonio González:
K-D Bonsai: ISA-Extensions to Compress K-D Trees for Autonomous Driving Tasks. ISCA 2023: 20:1-20:13 - [i19]Pedro Henrique Exenberger Becker, José-María Arnau, Antonio González:
K-D Bonsai: ISA-Extensions to Compress K-D Trees for Autonomous Driving Tasks. CoRR abs/2302.00361 (2023) - [i18]Mohammad Sabri, Marc Riera, Antonio González:
ReDy: A Novel ReRAM-centric Dynamic Quantization Approach for Energy-efficient CNN Inference. CoRR abs/2306.16298 (2023) - [i17]Bahareh Khabbazan, Marc Riera, Antonio González:
DNA-TEQ: An Adaptive Exponential Quantization of Tensors for DNN Inference. CoRR abs/2306.16430 (2023) - 2022
- [j89]Marc Riera, José-María Arnau, Antonio González:
DNN pruning with principal component analysis and connection importance estimation. J. Syst. Archit. 122: 102336 (2022) - [j88]Marc Riera, José-María Arnau, Antonio González:
CREW: Computation reuse and efficient weight storage for hardware-accelerated MLPs and RNNs. J. Syst. Archit. 129: 102604 (2022) - [j87]Mehdi Hassanpour, Marc Riera, Antonio González:
A Survey of Near-Data Processing Architectures for Neural Networks. Mach. Learn. Knowl. Extr. 4(1): 66-102 (2022) - [j86]Franyell Silfa, José-María Arnau, Antonio González:
E-BATCH: Energy-Efficient and High-Throughput RNN Batching. ACM Trans. Archit. Code Optim. 19(1): 14:1-14:23 (2022) - [j85]David Corbalán-Navarro, Juan L. Aragón, Martí Anglada, Joan-Manuel Parcerisa, Antonio González:
Triangle Dropping: An Occluded-geometry Predictor for Energy-efficient Mobile GPUs. ACM Trans. Archit. Code Optim. 19(3): 39:1-39:20 (2022) - [j84]Albert Segura, José-María Arnau, Antonio González:
Energy-Efficient Stream Compaction Through Filtering and Coalescing Accesses in GPGPU Memory Partitions. IEEE Trans. Computers 71(7): 1711-1723 (2022) - [j83]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Antonio González:
Dynamic sampling rate: harnessing frame coherence in graphics applications for energy-efficient GPUs. J. Supercomput. 78(13): 14940-14964 (2022) - [j82]David Corbalán-Navarro, Juan L. Aragón, Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Antonio González:
Omega-Test: A Predictive Early-Z Culling to Improve the Graphics Pipeline Energy-Efficiency. IEEE Trans. Vis. Comput. Graph. 28(12): 4375-4388 (2022) - [c215]Diya Joseph, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
TCOR: A Tile Cache with Optimal Replacement. HPCA 2022: 662-675 - [c214]Jorge Ortiz, David Corbalán-Navarro, Juan L. Aragón, Antonio González:
MEGsim: A Novel Methodology for Efficient Simulation of Graphics Workloads in GPUs. ISPASS 2022: 69-78 - [c213]Jorge Sierra Acosta, Andreas Diavastos, Antonio González:
XFeatur: Hardware Feature Extraction for DNN Auto-tuning. ISPASS 2022: 132-134 - [c212]Diya Joseph, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
DTexL: Decoupled Raster Pipeline for Texture Locality. MICRO 2022: 213-227 - [c211]David Corbalán-Navarro, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González:
DTM-NUCA: Dynamic Texture Mapping-NUCA for Energy-Efficient Graphics Rendering. PDP 2022: 144-151 - [i16]Dennis Pinto, José-María Arnau, Antonio González:
ASRPU: A Programmable Accelerator for Low-Power Automatic Speech Recognition. CoRR abs/2202.04971 (2022) - [i15]Dennis Pinto, José-María Arnau, Antonio González:
Mixture-of-Rookies: Saving DNN Computations by Predicting ReLU Outputs. CoRR abs/2202.04990 (2022) - [i14]Franyell Silfa, José-María Arnau, Antonio González:
Saving RNN Computations with a Neuron-Level Fuzzy Memoization Scheme. CoRR abs/2202.06563 (2022) - [i13]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Antonio González:
Dynamic Sampling Rate: Harnessing Frame Coherence in Graphics Applications for Energy-Efficient GPUs. CoRR abs/2202.10533 (2022) - [i12]Franyell Silfa, José-María Arnau, Antonio González:
Exploiting Kernel Compression on BNNs. CoRR abs/2212.00608 (2022) - 2021
- [j81]Martí Anglada, Ramon Canal, Juan L. Aragón, Antonio González:
Fast and Accurate SER Estimation for Large Combinational Blocks in Early Stages of the Design. IEEE Trans. Sustain. Comput. 6(3): 427-440 (2021) - [c210]Raúl Taranco, José-María Arnau, Antonio González:
A Low-Power Hardware Accelerator for ORB Feature Extraction in Self-Driving Cars. SBAC-PAD 2021: 11-21 - [i11]Dennis Pinto, José-María Arnau, Antonio González:
Exploiting Beam Search Confidence for Energy-Efficient Speech Recognition. CoRR abs/2101.09083 (2021) - [i10]Marc Riera, José-María Arnau, Antonio González:
CREW: Computation Reuse and Efficient Weight Storage for Hardware-accelerated MLPs and RNNs. CoRR abs/2107.09408 (2021) - [i9]Mehdi Hassanpour, Marc Riera, Antonio González:
A Survey of Near-Data Processing Architectures for Neural Networks. CoRR abs/2112.12630 (2021) - 2020
- [j80]Dennis Pinto, José-María Arnau, Antonio González:
Design and Evaluation of an Ultra Low-power Human-quality Speech Recognition System. ACM Trans. Archit. Code Optim. 17(4): 41:1-41:19 (2020) - [j79]Reza Yazdani, José-María Arnau, Antonio González:
LAWS: Locality-AWare Scheme for Automatic Speech Recognition. IEEE Trans. Computers 69(8): 1197-1208 (2020) - [c209]Franyell Silfa, José-María Arnau, Antonio González:
Boosting LSTM Performance Through Dynamic Precision Selection. HiPC 2020: 323-333 - [c208]Pedro Henrique Exenberger Becker, José-María Arnau, Antonio González:
Demystifying Power and Performance Bottlenecks in Autonomous Driving Systems. IISWC 2020: 205-215 - [i8]Albert Segura, José-María Arnau, Antonio González:
Irregular Accesses Reorder Unit: Improving GPGPU Memory Coalescing for Graph-Based Workloads. CoRR abs/2007.07131 (2020) - [i7]Franyell Silfa, José-María Arnau, Antonio González:
E-BATCH: Energy-Efficient and High-Throughput RNN Batching. CoRR abs/2009.10656 (2020)
2010 – 2019
- 2019
- [j78]Marc Riera, José-María Arnau, Antonio González:
CGPA: Coarse-Grained Pruning of Activations for Energy-Efficient RNN Inference. IEEE Micro 39(5): 36-45 (2019) - [j77]Alessandro Vallero, Alessandro Savino, Athanasios Chatzidimitriou, Manolis Kaliorakis, Maha Kooli, Marc Riera, Martí Anglada, Giorgio Di Natale, Alberto Bosio, Ramon Canal, Antonio González, Dimitris Gizopoulos, Riccardo Mariani, Stefano Di Carlo:
SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. IEEE Trans. Computers 68(5): 765-783 (2019) - [j76]Reza Yazdani, José-María Arnau, Antonio González:
A Low-Power, High-Performance Speech Recognition Accelerator. IEEE Trans. Computers 68(12): 1817-1831 (2019) - [j75]Enrique de Lucas, Pedro Marcuello, Joan-Manuel Parcerisa, Antonio González:
Visibility Rendering Order: Improving Energy Efficiency on Mobile GPUs through Frame Coherence. IEEE Trans. Parallel Distributed Syst. 30(2): 473-485 (2019) - [c207]Reza Yazdani, José-María Arnau, Antonio González:
POSTER: Leveraging Run-Time Feedback for Efficient ASR Acceleration. PACT 2019: 463-464 - [c206]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Pedro Marcuello, Antonio González:
Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. HPCA 2019: 623-634 - [c205]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Antonio González:
Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline. HPCA 2019: 635-646 - [c204]Albert Segura, José-María Arnau, Antonio González:
SCU: a GPU stream compaction unit for graph processing. ISCA 2019: 424-435 - [c203]Franyell Silfa, Gem Dot, José-María Arnau, Antonio González:
Neuron-Level Fuzzy Memoization in RNNs. MICRO 2019: 782-793 - [i6]Marc Riera, José-María Arnau, Antonio González:
(Pen-) Ultimate DNN Pruning. CoRR abs/1906.02535 (2019) - [i5]Reza Yazdani, Olatunji Ruwase, Minjia Zhang, Yuxiong He, José-María Arnau, Antonio González:
LSTM-Sharp: An Adaptable, Energy-Efficient Hardware Accelerator for Long Short-Term Memory. CoRR abs/1911.01258 (2019) - [i4]Franyell Silfa, José-María Arnau, Antonio González:
Boosting LSTM Performance Through Dynamic Precision Selection. CoRR abs/1911.04244 (2019) - 2018
- [j74]Antonio González:
2018 International Symposium on Computer Architecture Influential Paper Award. IEEE Micro 38(4): 76-77 (2018) - [j73]Hamid Tabani, José-María Arnau, Jordi Tubella, Antonio González:
Performance Analysis and Optimization of Automatic Speech Recognition. IEEE Trans. Multi Scale Comput. Syst. 4(4): 847-860 (2018) - [c202]Franyell Silfa, Gem Dot, José-María Arnau, Antonio González:
E-PUR: an energy-efficient processing unit for recurrent neural networks. PACT 2018: 18:1-18:12 - [c201]Hamid Tabani, José-María Arnau, Jordi Tubella, Antonio González:
A Novel Register Renaming Technique for Out-of-Order Processors. HPCA 2018: 259-270 - [c200]Marc Riera, José-María Arnau, Antonio González:
Computation Reuse in DNNs by Exploiting Input Similarity. ISCA 2018: 57-68 - [c199]Reza Yazdani, Marc Riera, José-María Arnau, Antonio González:
The Dark Side of DNN Pruning. ISCA 2018: 790-801 - [i3]Antonio González:
Trends in Processor Architecture. CoRR abs/1801.05215 (2018) - [i2]Martí Anglada, Enrique de Lucas, Joan-Manuel Parcerisa, Juan L. Aragón, Pedro Marcuello, Antonio González:
Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. CoRR abs/1807.09449 (2018) - 2017
- [j72]Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcón, Jordi Tubella, Antonio González, Lieven Eeckhout:
Shared resource aware scheduling on power-constrained tiled many-core processors. J. Parallel Distributed Comput. 100: 30-41 (2017) - [j71]Reza Yazdani, Albert Segura, José-María Arnau, Antonio González:
Low-Power Automatic Speech Recognition Through a Mobile GPU and a Viterbi Accelerator. IEEE Micro 37(1): 22-29 (2017) - [c198]Hamid Tabani, José-María Arnau, Jordi Tubella, Antonio González:
An Ultra Low-Power Hardware Accelerator for Acoustic Scoring in Speech Recognition. PACT 2017: 41-52 - [c197]Gem Dot, Alejandro Martínez, Antonio González:
Removing checks in dynamically typed languages through efficient profiling. CGO 2017: 257-268 - [c196]Manolis Kaliorakis, Dimitris Gizopoulos, Ramon Canal, Antonio González:
MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment. ISCA 2017: 241-254 - [c195]Reza Yazdani, José-María Arnau, Antonio González:
UNFOLD: a memory-efficient speech recognizer using on-the-fly WFST composition. MICRO 2017: 69-81 - [i1]Franyell Silfa, Gem Dot, José-María Arnau, Antonio González:
E-PUR: An Energy-Efficient Processing Unit for Recurrent Neural Networks. CoRR abs/1711.07480 (2017) - 2016
- [j70]Gaurang Upasani, Xavier Vera, Antonio González:
A Case for Acoustic Wave Detectors for Soft-Errors. IEEE Trans. Computers 65(1): 5-18 (2016) - [j69]Stefan Bieschewski, Joan-Manuel Parcerisa, Antonio González:
An Energy-Efficient Memory Unit for Clustered Microarchitectures. IEEE Trans. Computers 65(8): 2631-2637 (2016) - [j68]Rakesh Kumar, Alejandro Martínez, Antonio González:
Assisting Static Compiler Vectorization with a Speculative Dynamic Vectorizer in an HW/SW Codesigned Environment. ACM Trans. Comput. Syst. 33(4): 12:1-12:33 (2016) - [j67]Sergi Abadal, Albert Mestres, Mario Nemirovsky, Heekwan Lee, Antonio González, Eduard Alarcón, Albert Cabellos-Aparicio:
Scalability of Broadcast Performance in Wireless Network-on-Chip. IEEE Trans. Parallel Distributed Syst. 27(12): 3631-3645 (2016) - [c194]Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcón, Jordi Tubella, Antonio González, Lieven Eeckhout:
Shared resource aware scheduling on power-constrained tiled many-core processors. Conf. Computing Frontiers 2016: 365-368 - [c193]Marc Riera, Ramon Canal, Jaume Abella, Antonio González:
A detailed methodology to compute Soft Error Rates in advanced technologies. DATE 2016: 217-222 - [c192]Gem Dot, Alejandro Martínez, Antonio González:
ERICO: Effective Removal of Inline Caching Overhead in Dynamic Typed Languages. HiPC 2016: 372-381 - [c191]Martí Anglada, Ramon Canal, Juan L. Aragón, Antonio González:
MASkIt: Soft error rate estimation for combinational circuits. ICCD 2016: 614-621 - [c190]José Cano, Rakesh Kumar, Aleksandar Brankovic, Demos Pavlou, Kyriakos Stavrou, Enric Gibert, Alejandro Martínez, Antonio González:
Quantitative characterization of the software layer of a HW/SW co-designed processor. IISWC 2016: 138-147 - [c189]Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio González, Maha Kooli, Alberto Bosio, Giorgio Di Natale:
Cross-layer system reliability assessment framework for hardware faults. ITC 2016: 1-10 - [c188]Reza Yazdani, Albert Segura, José-María Arnau, Antonio González:
An ultra low-power hardware accelerator for automatic speech recognition. MICRO 2016: 47:1-47:12 - 2015
- [c187]Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcón, Trevor E. Carlson, Kenzo Van Craeynest, Jordi Tubella, Antonio González, Lieven Eeckhout:
Chrysso: an integrated power manager for constrained many-core processors. Conf. Computing Frontiers 2015: 19:1-19:8 - [c186]Enrique de Lucas, Pedro Marcuello, Joan-Manuel Parcerisa, Antonio González:
Ultra-low power render-based collision detection for CPU/GPU systems. MICRO 2015: 445-456 - [c185]Gem Dot, Alejandro Martínez, Antonio González:
Analysis and Optimization of Engines for Dynamically Typed Languages. SBAC-PAD 2015: 41-48 - 2014
- [j66]Rakesh Kumar, Alejandro Martínez, Antonio González:
Efficient Power Gating of SIMD Accelerators Through Dynamic Selective Devectorization in an HW/SW Codesigned Environment. ACM Trans. Archit. Code Optim. 11(3): 25:1-25:23 (2014) - [c184]Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert, Antonio González:
Accurate off-line phase classification for HW/SW co-designed processors. Conf. Computing Frontiers 2014: 5:1-5:10 - [c183]Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert, Antonio González:
Warm-Up Simulation Methodology for HW/SW Co-Designed Processors. CGO 2014: 284 - [c182]Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio:
INFORMER: An integrated framework for early-stage memory robustness analysis. DATE 2014: 1-4 - [c181]Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio:
iRMW: A low-cost technique to reduce NBTI-dependent parametric failures in L1 data caches. ICCD 2014: 68-74 - [c180]Antonio González, Carlos Aliagas:
Author retrospective for the dual data cache. ICS 25th Anniversary 2014: 32-34 - [c179]Gaurang Upasani, Xavier Vera, Antonio González:
Framework for economical error recovery in embedded cores. IOLTS 2014: 146-153 - [c178]Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Antonio González, Ramon Canal, Riccardo Mariani, M. Pipponzi, Arnaud Grasset, Philippe Bonnot, Frank Reichenbach, Gulzaib Rafiq, Trond Loekstad:
Cross-layer early reliability evaluation: Challenges and promises. IOLTS 2014: 228-233 - [c177]Gaurang Upasani, Xavier Vera, Antonio González:
Avoiding core's DUE & SDC via acoustic wave detectors and tailored error containment and recovery. ISCA 2014: 37-48 - 2013
- [j65]Javier Lira, Carlos Molina, Ryan N. Rakvic, Antonio González:
Replacement techniques for dynamic NUCA cache designs on CMPs. J. Supercomput. 64(2): 548-579 (2013) - [c176]Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert, Antonio González:
Performance analysis and predictability of the software layer in dynamic binary translators/optimizers. Conf. Computing Frontiers 2013: 15:1-15:10 - [c175]Rakesh Kumar, Alejandro Martínez, Antonio González:
Speculative dynamic vectorization to assist static vectorization in a HW/SW co-designed environment. HiPC 2013: 79-88 - [c174]Rakesh Kumar, Alejandro Martínez, Antonio González:
Vectorizing for Wider Vector Units in a HW/SW Co-designed Environment. HPCC/EUC 2013: 518-525 - [c173]Gaurang Upasani, Xavier Vera, Antonio González:
Reducing DUE-FIT of caches by exploiting acoustic wave detectors for error recovery. IOLTS 2013: 85-91 - [c172]Nikos Foutris, Dimitris Gizopoulos, Xavier Vera, Antonio González:
Deconfigurable microprocessor architectures for silicon debug acceleration. ISCA 2013: 631-642 - [c171]Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio:
Effectiveness of hybrid recovery techniques on parametric failures. ISQED 2013: 258-264 - [c170]Rakesh Kumar, Alejandro Martínez, Antonio González:
Dynamic Selective Devectorization for Efficient Power Gating of SIMD Units in a HW/SW Co-Designed Environment. SBAC-PAD 2013: 81-88 - 2012
- [j64]Abhishek Deb, Josep M. Codina, Antonio González:
A HW/SW Co-designed Programmable Functional Unit. IEEE Comput. Archit. Lett. 11(1): 9-12 (2012) - [j63]Nivard Aymerich, Shrikanth Ganapathy, Antonio Rubio, Ramon Canal, Antonio González:
Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells. Integr. 45(3): 246-252 (2012) - [j62]Javier Lira, Timothy M. Jones, Carlos Molina, Antonio González:
The migration prefetcher: Anticipating data promotion in dynamic NUCA caches. ACM Trans. Archit. Code Optim. 8(4): 45:1-45:20 (2012) - [c169]Rakesh Kumar, Alejandro Martínez, Antonio González:
Speculative dynamic vectorization for HW/SW co-designed processors. PACT 2012: 459-460 - [c168]Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio:
A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance. ICCD 2012: 472-477 - [c167]Govind Sreekar Shenoy, Jordi Tubella, Antonio González:
Hardware/Software Mechanisms for Protecting an IDS against Algorithmic Complexity Attacks. IPDPS Workshops 2012: 1190-1196 - [c166]Gaurang Upasani, Xavier Vera, Antonio González:
Setting an error detection infrastructure with low cost acoustic wave detectors. ISCA 2012: 333-343 - [c165]Govind Sreekar Shenoy, Jordi Tubella, Antonio González:
Exploiting temporal locality in network traffic using commodity multi-cores. ISPASS 2012: 110-111 - [c164]Govind Sreekar Shenoy, Jordi Tubella, Antonio González:
Improving the Performance Efficiency of an IDS by Exploiting Temporal Locality in Network Traffic. MASCOTS 2012: 439-448 - [c163]Govind Sreekar Shenoy, Jordi Tubella, Antonio González:
Improving the Resilience of an IDS against Performance Throttling Attacks. SecureComm 2012: 167-184 - [c162]Demos Pavlou, Enric Gibert, Fernando Latorre, Antonio González:
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support. VEE 2012: 159-168 - 2011
- [j61]Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González:
Implementing End-to-End Register Data-Flow Continuous Self-Test. IEEE Trans. Computers 60(8): 1194-1206 (2011) - [j60]Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González:
CROB: Implementing a Large Instruction Window through Compression. Trans. High Perform. Embed. Archit. Compil. 3: 115-134 (2011) - [j59]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González:
Compiler Directed Issue Queue Energy Reduction. Trans. High Perform. Embed. Archit. Compil. 4: 42-62 (2011) - [c161]Abhishek Deb, Josep M. Codina, Antonio González:
A Co-designed HW/SW Approach to General Purpose Program Acceleration Using a Programmable Functional Unit. Interaction between Compilers and Computer Architectures 2011: 1-8 - [c160]Javier Lira, Timothy M. Jones, Carlos Molina, Antonio González:
Beforehand Migration on D-NUCA Caches. PACT 2011: 197-198 - [c159]Abhishek Deb, Josep M. Codina, Antonio González:
SoftHV: a HW/SW co-designed processor with horizontal and vertical fusion. Conf. Computing Frontiers 2011: 1 - [c158]Nivard Aymerich, Shrikanth Ganapathy, Antonio Rubio, Ramon Canal, Antonio González:
Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells. ACM Great Lakes Symposium on VLSI 2011: 277-282 - [c157]