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ORCIDIEEE Journal of Solid-State Circuits, Volume 52
Volume 52, Number 1, January 2017
- Dennis Sylvester, Dejan Markovic, Roman Genov, Atsushi Kawasumi, Subhasish Mitra:
Introduction to the January Special Issue on the 2016 IEEE International Solid-State Circuits Conference. 3-7 - Junheng Zhu, Romesh Kumar Nandwana, Guanghua Shu, Ahmed Elkholy, Seong Joong Kim, Pavan Kumar Hanumolu:
A 0.0021 mm2 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS. 8-20 - Fazil Ahmad
, Greg Unruh, Amrutha Iyer, Pin-En Su, Sherif Abdalla, Bo Shen, Mark Chambers, Ichiro Fujimori:
A 0.5-9.5-GHz, 1.2-µs Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling. 21-32 - Pascal Vivet, Yvain Thonnart, Romain Lemaire, Cristiano Santos, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Denis Dutoit, Fabien Clermidy, Séverine Cheramy, Abbas Sheibanyrad, Frédéric Pétrot, Eric Flamand, Jean Michailos, Alexandre Arriordaz, Lee Wang, Juergen Schloeffel:
A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. 33-49 - Minki Cho, Stephen T. Kim, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De:
Postsilicon Voltage Guard-Band Reduction in a 22 nm Graphics Execution Core Using Adaptive Voltage Scaling and Dynamic Power Gating. 50-63 - Yong-Jin Lee, Wanyuan Qu, Shashank Singh, Dae-Yong Kim, Kwang-Ho Kim, Sang-Ho Kim, Jae-Jin Park, Gyu-Hyeong Cho:
A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor. 64-76 - Shinichi Shibahara, Chikafumi Takahashi, Kazuki Fukuoka, Yuko Kitaji, Takahiro Irita, Hirotaka Hara, Yasuhisa Shimazaki, Jun Matsushima:
A 16 nm FinFET Heterogeneous Nona-Core SoC Supporting ISO26262 ASIL B Standard. 77-88 - Sriram Sundaram, Aaron Grenat, Samuel Naffziger, Tom Burd, Stephen Kosonocky, Steven Liepe, Ravinder Rachala, Miguel Rodriguez, Michael Austin, Sriram Sambamurthy:
Bristol Ridge: A 28-nm × 86 Performance-Enhanced Microprocessor Through System Power Management. 89-97 - Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini:
An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster. 98-112 - Dajiang Zhou, Shihao Wang, Heming Sun, Jian-Bin Zhou, Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, Satoshi Goto:
An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design. 113-126 - Yu-Hsin Chen, Tushar Krishna, Joel S. Emer, Vivienne Sze:
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks. 127-138 - Kyuho Jason Lee, Kyeongryeol Bong, Changhyeon Kim, Jaeeun Jang, Kyoung-Rog Lee, Jihee Lee, Gyeonghoon Kim, Hoi-Jun Yoo:
A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System. 139-150 - Matteo Perenzoni, Daniele Perenzoni, David Stoppa:
A 64 × 64-Pixels Digital Silicon Photomultiplier Direct TOF Sensor With 100-MPhotons/s/pixel Background Rejection and Imaging/Altimeter Mode With 0.14% Precision Up To 6 km for Spacecraft Navigation and Landing. 151-160 - Behnam Behroozpour, Phillip A. M. Sandborn, Niels Quack, Tae Joon Seok, Yasuhiro Matsui, Ming C. Wu, Bernhard E. Boser:
Electronic-Photonic Integrated Circuit for 3D Microimaging. 161-172 - Wenlong Jiang, Vahagn Hokhikyan, Hariprasad Chandrakumar, Vaibhav Karkare, Dejan Markovic:
A ±50-mV Linear-Input-Range VCO-Based Neural-Recording Front-End With Digital Nonlinearity Correction. 173-184 - Meisam Heidarpour Roshan, Samira Zaliasl, Kimo Joo, Kamran Souri, Rajkumar Palwai, Lijun Will Chen, Amanpreet Singh, Sudhakar Pamarti, Nicholas Miller, Joseph C. Doll, Carl Arft, Sassan Tabatabaei, Carl Sechen, Aaron Partridge, Vinod Menon:
A MEMS-Assisted Temperature Sensor With 20-µK Resolution, Conversion Rate of 200 S/s, and FOM of 0.04 pJK2. 185-197 - Junfeng Jiang, Kofi A. A. Makinwa:
Multipath Wide-Bandwidth CMOS Magnetic Sensors. 198-209 - Dongku Kang, Woopyo Jeong, Chulbum Kim, Doo-Hyun Kim, Yong-Sung Cho, Kyung-Tae Kang, Jinho Ryu, Kyung-Min Kang, Sungyeon Lee, Wandong Kim, Hanjun Lee, Jaedoeg Yu, Nayoung Choi, Dong-Su Jang, Cheon An Lee, Young-Sun Min, Moosung Kim, Ansoo Park, Jae-Ick Son, In-Mo Kim, Pansuk Kwak, Bong-Kil Jung, Doosub Lee, Hyunggon Kim, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yup Lee, Ki-Tae Park, Kyehyun Kyung:
256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers. 210-217 - Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Keng-Hao Yang, Tien-Fu Chen, Tien-Yen Wang, Hsiang-Pang Li, Matthew J. BrightSky, SangBum Kim, Hsiang-Lam Lung, Chung Lam:
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications. 218-228 - Jaydeep P. Kulkarni, John Keane, Kyung-Hoae Koo, Satyanand Nalam, Zheng Guo, Eric Karl, Kevin Zhang:
5.6 Mb/mm2 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology. 229-239 - Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim, Giyong Yang, Hoonki Kim, Sanghoon Baek, Jonghoon Jung, Bongjae Kwon, Sungwee Cho, Hyuntaek Jung, Yongjae Choo, Jaeseung Choi:
A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization. 240-249 - Kyomin Sohn, Won-Joo Yun, Reum Oh, Chi-Sung Oh, Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Hyunui Lee, Seok-Yong Kang, Young-Soo Sohn, Jung-Hwan Choi, Yong-Cheol Bae, Seong-Jin Jang, Gyo-Young Jin:
A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution. 250-260 - Edward H. Lee, S. Simon Wong:
Analysis and Design of a Passive Switched-Capacitor Matrix Multiplier for Approximate Computing. 261-271 - Hyung-Min Lee, Chiraag Juvekar, Joyce Kwong, Anantha P. Chandrakasan:
A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures. 272-283 - Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins:
A Handheld High-Sensitivity Micro-NMR CMOS Platform With B-Field Stabilization for Multi-Type Biological/Chemical Assays. 284-297 - Rachit Mohan, Samira Zaliasl, Georges G. E. Gielen, Chris Van Hoof, Refet Firat Yazicioglu, Nick Van Helleputte:
A 0.6-V, 0.015-mm2, Time-Based ECG Readout for Ambulatory Applications in 40-nm CMOS. 298-308 - Tiffany Moy, Liechao Huang, Warren Rieutort-Louis, Can Wu, Paul Cuff, Sigurd Wagner, James C. Sturm, Naveen Verma:
An EEG Acquisition and Biomarker-Extraction System Using Low-Noise-Amplifier and Compressive-Sensing Circuits Based on Flexible, Thin-Film Electronics. 309-321
Volume 52, Number 2, February 2017
- Akshay Visweswaran, John R. Long:
Injection-Locked Wideband FM Demodulation at IF. 327-343 - Domenico Pepe, Domenico Zito:
Two mm-Wave Vector Modulator Active Phase Shifters With Novel IQ Generator in 28 nm FDSOI CMOS. 344-356 - Hadi Bameri, Omeed Momeni:
A High-Gain mm-Wave Amplifier Design: An Analytical Approach to Power Gain Boosting. 357-370 - Kunal Datta, Hossein Hashemi:
Watt-Level mm-Wave Power Amplification With Dynamic Load Modulation in a SiGe HBT Digital Power Amplifier. 371-388 - Xue Wu, Kaushik Sengupta:
Dynamic Waveform Shaping With Picosecond Time Widths. 389-405 - Hamidreza Aghasi, Andreia Cathelin, Ehsan Afshari:
A 0.92-THz SiGe Power Radiator Based on a Nonlinear Theory for Harmonic Generation. 406-422 - Ming Ding, Pieter Harpe, Yao-Hong Liu, Benjamin Busze, Kathleen Philips, Harmke de Groot:
A 46 µW 13 b 6.4 MS/s SAR ADC With Background Mismatch and Offset Calibration. 423-432 - Kareem Ragab, Nan Sun:
A 12-b ENOB 2.5-MHz BW VCO-Based 0-1 MASH ADC With Direct Digital Background Calibration. 433-447 - Alexander Edward, Qiyuan Liu, Carlos Briseno-Vidrios, Martin Kinyua, Eric G. Soenen, Aydin Ilker Karsilayan, José Silva-Martínez:
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. 448-459 - Leonardo Vera, John R. Long:
A 40-Gb/s SiGe-BiCMOS MZM Driver With 6-Vp-p Output and On-Chip Digital Calibration. 460-471 - Xi Wang, Jian Zhao, Yang Zhao, Guo Ming Xia, An Ping Qiu, Yan Su, Yong Ping Xu:
A 0.4 µg Bias Instability and 1.2 µg Hz Noise Floor MEMS Silicon Oscillating Accelerometer With CMOS Readout Circuit. 472-482 - Manuel Suarez, Víctor Manuel Brea Sánchez, Jorge Fernández-Berni, Ricardo Carmona-Galán, Diego Cabello, Ángel Rodríguez-Vázquez:
Low-Power CMOS Vision Sensor for Gaussian Pyramid Extraction. 483-495 - Taehui Na, Byungkyu Song, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS. 496-504 - Fei Xiao, Pak Kwong Chan:
A Performance-Aware Low-Quiescent Headphone Amplifier in 65-nm CMOS. 505-516 - Wanyuan Qu, Shashank Singh, Yong-Jin Lee, Young-Suk Son, Gyu-Hyeong Cho:
Design-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design. 517-527 - Sang-Hui Park, Hyunsik Kim, Jun-Suk Bang, Gyu-Hyeong Cho:
A 0.26-nJ/node, 400-kHz Tx Driving, Filtered Fully Differential Readout IC With Parasitic RC Time Delay Reduction Technique for 65-in 169×97 Capacitive-Type Touch Screen Panel. 528-542 - Pramod Murali, Ali M. Niknejad, Bernhard E. Boser:
CMOS Microflow Cytometer for Magnetic Label Detection and Classification. 543-555 - Joseph A. Schmitz, Mahir Kabeer Gharzai, Sina Balkir, Michael W. Hoffman, Daniel J. White, Nathan Schemm:
A 1000 frames/s Vision Chip Using Scalable Pixel-Neighborhood-Level Parallel Processing. 556-568 - Min Tan, Wing-Hung Ki:
A 100 MHz Hybrid Supply Modulator With Ripple-Current-Based PWM Control. 569-578 - Yan Lu, Junmin Jiang, Wing-Hung Ki:
A Multiphase Switched-Capacitor DC-DC Converter Ring With Fast Transient Response and Small Ripple. 579-591 - Mao-Ruei Li, Chia-Hsiang Yang, Yeong-Luh Ueng:
A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c Applications. 592-604 - Sang-Geun Bae, Yongtae Kim, Yunsoo Park, Chulwoo Kim:
3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop. 605-610
Volume 52, Number 3, March 2017
- Jize Jiang, Wei Shu, Joseph S. Chang:
A 5.6 ppm/°C Temperature Coefficient, 87-dB PSRR, Sub-1-V Voltage Reference in 65-nm CMOS Exploiting the Zero-Temperature-Coefficient Point. 623-633 - Rajiv V. Joshi, Matthew M. Ziegler, Holger Wetter:
A Low Voltage SRAM Using Resonant Supply Boosting. 634-644 - Hariprasad Chandrakumar, Dejan Markovic:
A High Dynamic-Range Neural Recording Chopper Amplifier for Simultaneous Neural Recording and Stimulation. 645-656 - Carlos Briseno-Vidrios, Alexander Edward, Ayman Shafik, Samuel Palermo, José Silva-Martínez:
A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage. 657-668 - Zhiting Lin, Xiulong Wu, Zhi Li, Lijun Guan, Chunyu Peng, Changyong Liu, Junning Chen:
A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process. 669-677 - Sreenivasa Mallia S, N. S. Sreeram, Sudhir Komarla Adinarayana, Sankaran Aniruddhan:
A Self-Powered 50-Mb/s OOK Transmitter for Optoisolator LED Emulation. 678-687 - Taehun Yoon, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Jinho Han, Hyosup Won, Jinho Park, Hyeon-Min Bae:
A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links. 688-703 - Mohamed Abouzied, Krishnan Ravichandran, Edgar Sánchez-Sinencio:
A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability. 704-719 - Mohammad Meraj Ghanbari, Julius M. Tsai, Ampalavanapillai Nirmalathas, Rikky Muller, Simone Gambini:
An Energy-Efficient Miniaturized Intracranial Pressure Monitoring System. 720-734 - Michiel C. M. Soer, Eric A. M. Klumperink, Dirk-Jan van den Broek, Bram Nauta, Frank E. van Vliet:
Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion. 735-746 - Shih-Hao Huang, Wei-Zen Chen:
A 25 Gb/s 1.13 pJ/b -10.8 dBm Input Sensitivity Optical Receiver in 40 nm CMOS. 747-756 - Wala Saadeh, Muhammad Awais Bin Altaf, Haneen Alsuradi, Jerald Yoo:
A Pseudo OFDM With Miniaturized FSK Demodulation Body-Coupled Communication Transceiver for Binaural Hearing Aids in 65 nm CMOS. 757-768 - Guangyin Feng, Chirn Chye Boon, Fanyi Meng, Xiang Yi, Kaituo Yang, Chenyang Li, Howard C. Luong:
Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers. 769-780 - Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang:
A 36-V 49% Efficient Hybrid Charge Pump in Nanometer-Scale Bulk CMOS Technology. 781-798 - Somnath Kundu, Bongjin Kim, Chris H. Kim:
A 0.2-1.45-GHz Subsampling Fractional-N Digital MDLL With Zero-Offset Aperture PD-Based Spur Cancellation and In Situ Static Phase Offset Detection. 799-811 - David Murphy, Hooman Darabi, Hao Wu:
Implicit Common-Mode Resonance in LC Oscillators. 812-821 - Syed Anas Imtiaz, Zhou Jiang, Esther Rodríguez-Villegas:
An Ultralow Power System on Chip for Automatic Sleep Staging. 822-833 - Ugur Sonmez, Fabio Sebastiano, Kofi A. A. Makinwa:
Compact Thermal-Diffusivity-Based Temperature Sensors in 40-nm CMOS for SoC Thermal Monitoring. 834-843 - Amr Suleiman, Zhengdong Zhang, Vivienne Sze:
A 58.6 mW 30 Frames/s Real-Time Programmable Multiobject Detection Accelerator With Deformable Parts Models on Full HD 1920×1080 Videos. 844-855 - Jong-Hyeok Yoon, Soon-Won Kwon, Hyeon-Min Bae:
A DC-to-12.5 Gb/s 9.76 mW/Gb/s All-Rate CDR With a Single LC VCO in 90 nm CMOS. 856-866 - Kok-Hin Teng, Chun-Huat Heng:
A 370-pJ/b Multichannel BFSK/QPSK Transmitter Using Injection-Locked Fractional-N Synthesizer for Wireless Biotelemetry Devices. 867-880
Volume 52, Number 4, April 2017
- Jan Craninckx:
New Associate Editor. 887 - Brian P. Ginsburg, Makoto Ikeda:
Introduction to the Special Issue on the 2016 Symposium on VLSI Circuits. 888-890 - Brent Bohnenstiehl, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh Tran, Emmanuel Adeagbo, Bevan M. Baas:
KiloCore: A 32-nm 1000-Processor Computational Array. 891-902 - Bert Moons, Marian Verhelst:
An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS. 903-914 - Jintao Zhang, Zhuo Wang, Naveen Verma:
In-Memory Computation of a Machine-Learning Classifier in a Standard 6T SRAM Array. 915-924 - Tatsuya Onuki, Wataru Uesugi, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki:
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS. 925-932 - Zhanping Chen, Sarvesh H. Kulkarni, Vincent E. Dorgan, Salil Manohar Rajarshi, Lei Jiang, Uddalak Bhattacharya:
A 0.9-μm2 1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming. 933-939 - Sudhir Satpathy, Sanu K. Mathew, Vikram B. Suresh, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Gregory K. Chen, Ram K. Krishnamurthy, Vivek K. De:
A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS. 940-949 - Kristof Blutman, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, Kofi A. A. Makinwa, José Pineda de Gyvez:
A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling. 950-960 - Somnath Paul, Vinayak Honkote, Ryan Gary Kim, Turbo Majumder, Paolo A. Aseron, Vaughn Grossnickle, Robert Sankman, Debendra Mallik, Tao Wang, Sriram R. Vangal, James W. Tschanz, Vivek De:
A Sub-cm3 Energy-Harvesting Stacked Wireless Sensor Node Featuring a Near-Threshold Voltage IA-32 Microcontroller in 14-nm Tri-Gate CMOS for Always-ON Always-Sensing Applications. 961-971 - Xiao Wu, Yao Shi, Supreet Jeloka, Kaiyuan Yang, Inhee Lee, Yoonmyung Lee, Dennis Sylvester, David T. Blaauw:
A 20-pW Discontinuous Switched-Capacitor Energy Harvester for Smart Sensor Applications. 972-984 - Yusuke Oike, Kentaro Akiyama, Luong D. Hung, Wataru Niitsuma, Akihiko Kato, Mamoru Sato, Yuri Kato, Wataru Nakamura, Hiroshi Shiroshita, Yorito Sakano, Yoshiaki Kitano, Takuya Nakamura, Takayuki Toyama, Hayato Iwamoto, Takayuki Ezaki:
8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration. 985-993 - Chao Chen, Zhao Chen, Deep Bera, Shreyas B. Raghunathan, Maysam Shabanimotlagh, Emile Noothout, Zu-yao Chang, Jacco Ponte, Christian Prins, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs:
A Front-End ASIC With Receive Sub-array Beamforming Integrated With a 32 × 32 PZT Matrix Transducer for 3-D Transesophageal Echocardiography. 994-1006 - Gunpil Hwang, JongKwan Choi, Jaehyeok Yang, Sungmin Lim, Jae-Myoung Kim, MinGyu Choi, Kiuk Gwak, Jinwoo Jeon, Il-Hwan Choi, Sol Park, Dae-Shik Kim, Hee Sup Shin, Hyeon-Min Bae:
A 2.048 Mb/s Full-Duplex Free-Space Optical Transceiver IC for a Real-Time In Vivo Brain-Computer Interface Mouse Experiment Under Social Interaction. 1007-1020 - Ajit Sharma, Arup Polley, Seung Bae Lee, Sriram Narayanan, Wen Li, Terry Sculley, Srinath Ramaswamy:
A Sub-60-µA Multimodal Smart Biosensing SoC With >80-dB SNR, 35-µA Photoplethysmography Signal Chain. 1021-1033 - Saleh Heidary Shalmany, Dieter Draxelmayr, Kofi A. A. Makinwa:
A ±36-A Integrated Current-Sensing System With a 0.3% Gain Error and a 400-µA Offset From -55 °C to +85 °C. 1034-1043 - Bahman Yousefzadeh, Saleh Heidary Shalmany, Kofi A. A. Makinwa:
A BJT-Based Temperature-to-Digital Converter With ±60 mK (3~σ) Inaccuracy From -55 °C to +125 °C in 0.16-μm CMOS. 1044-1052 - Jian Zhao, Xi Wang, Yang Zhao, Guo Ming Xia, An Ping Qiu, Yan Su, Yong Ping Xu:
A 0.23-µg Bias Instability and 1-µg/√Hz Acceleration Noise Density Silicon Oscillating Accelerometer With Embedded Frequency-to-Digital Converter in PLL. 1053-1065 - Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. 1066-1076 - Minseob Shim, Seokhyeon Jeong, Paul D. Myers, Suyoung Bang, Junhua Shen, Chulwoo Kim, Dennis Sylvester, David T. Blaauw, Wanyeong Jung:
Edge-Pursuit Comparator: An Energy-Scalable Oscillator Collapse-Based Comparator With Application in a 74.1 dB SNDR and 20 kS/s 15 b SAR ADC. 1077-1090 - Benwei Xu, Yuan Zhou, Yun Chiu:
A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS. 1091-1100 - Yohan Frans, Jaewook Shin, Lei Zhou, Parag Upadhyaya, Jay Im, Vassili Kireev, Mohamed Elzeftawi, Hiva Hedayati, Toan Pham, Santiago Asuncion, Chris Borrelli, Geoff Zhang, Hongtao Zhang, Ken Chang:
A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET. 1101-1110 - Yuan Du, Wei-Han Cho, Po-Tsang Huang, Yilei Li, Chien-Heng Wong, Jieqiong Du, Yanghyo Kim, Boyu Hu, Li Du, Chun-Chen Liu, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection. 1111-1122 - Sho Ikeda, Hiroyuki Ito, Akifumi Kasamatsu, Yosuke Ishikawa, Takayoshi Obara, Naoki Noguchi, Koji Kamisuki, Yao Jiyang, Shinsuke Hara, Ruibing Dong, Shiro Dosho, Noboru Ishihara, Kazuya Masu:
A - 244-dB FOM High-Frequency Piezoelectric Resonator-Based Cascaded Fractional-N PLL With Sub-ppb-Order Channel-Adjusting Technique. 1123-1133 - Zuow-Zun Chen, Yen-Cheng Kuan, Yilei Li, Boyu Hu, Chien-Heng Wong, Mau-Chung Frank Chang:
DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers. 1134-1143 - Feng-Wei Kuo, Sandro Binsfeld Ferreira, Huan-Neng Ron Chen, Lan-Chou Cho, Chewnpu Jou, Fu-Lung Hsueh, Iman Madadi, Massoud Tohidian, Mina Shahmohammadi, Masoud Babaie, Robert Bogdan Staszewski:
A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network. 1144-1162 - Guerric de Streel, François Stas, Thibaut Gurne, François Durant, Charlotte Frenkel, Andreia Cathelin, David Bol:
SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping. 1163-1177
Volume 52, Number 5, May 2017
- Danilo Manstretta:
Introduction to the Special Section on the 2016 Radio Frequency Integrated Circuits (RFIC) Symposium. 1183-1184 - Hamed Gheidi, Toshifumi Nakatani, Vincent W. Leung, Peter M. Asbeck:
A 1-3 GHz Delta-Sigma-Based Closed-Loop Fully Digital Phase Modulator in 45-nm CMOS SOI. 1185-1195 - Qiuyao Zhu, Sheng Yu, Sizhou Wang, Lun Huang, Zhaogang Wang, Xuejun Zhang, Yang Xu:
A Digital Polar Transmitter With DC-DC Converter Supporting 256-QAM WLAN and 40-MHz LTE-A Carrier Aggregation. 1196-1209 - Dongyi Liao, Hechen Wang, Fa Foster Dai, Yang Xu, Roc Berenguer, Sara Munoz Hermoso:
An 802.11a/b/g/n Digital Fractional-N PLL With Automatic TDC Linearity Calibration for Spur Cancellation. 1210-1220 - Yashar Rajavi, Mazhareddin Taghivand, Kamal Aggarwal, Andrew Ma, Ada S. Y. Poon:
An RF-Powered FDD Radio for Neural Microimplants. 1221-1229 - Yi-Shin Yeh, Benjamin Walker, Ed Balboni, Brian A. Floyd:
A 28-GHz Phased-Array Receiver Front End With Dual-Vector Distributed Beamforming. 1230-1244 - Andrew Townley, Paul Swirhun, Diane Titz, Aimeric Bisognin, Frederic Gianesello, Romain Pilard, Cyril Luxey, Ali M. Niknejad:
A 94-GHz 4TX-4RX Phased-Array FMCW Radar Transceiver With Antenna-in-Package. 1245-1259 - Min-Yu Huang, Taiyun Chi, Fei Wang, Hua Wang:
An All-Passive Negative Feedback Network for Broadband and Wide Field-of-View Self-Steering Beam-Forming With Zero DC Power Consumption. 1260-1273 - Hazal Yüksel, Dong Yang, Zachariah Boynton, Changhyuk Lee, Thomas Tapen, Alyosha C. Molnar, Alyssa B. Apsel:
A Wideband Fully Integrated Software-Defined Transceiver for FDD and TDD Operation. 1274-1285 - Douglas Adams, Yonina C. Eldar, Boris Murmann:
A Mixer Front End for a Four-Channel Modulated Wideband Converter With 62-dB Blocker Rejection. 1286-1294 - Voravit Vorapipat, Cooper S. Levy, Peter M. Asbeck:
Voltage Mode Doherty Power Amplifier. 1295-1304 - Kunal Datta, Hossein Hashemi:
High-Breakdown, High-fmax Multiport Stacked-Transistor Topologies for the W-Band Power Amplifiers. 1305-1319 - Wen Yuan, Jeffrey S. Walling:
A Multiphase Switched Capacitor Power Amplifier. 1320-1330 - Benqing Guo, Jun Chen, Lei Li, Haiyan Jin, Guoning Yang:
A Wideband Noise-Canceling CMOS LNA With Enhanced Linearity by Using Complementary nMOS and pMOS Configurations. 1331-1344 - Hadong Jin, Dongsu Kim, Bumman Kim:
Efficient Digital Quadrature Transmitter Based on IQ Cell Sharing. 1345-1357 - Negar Reiskarimian, Jin Zhou, Harish Krishnaswamy:
A CMOS Passive LPTV Nonmagnetic Circulator and Its Application in a Full-Duplex Receiver. 1358-1372 - Kevin Greene, Anirban Sarkar, Brian A. Floyd:
A 60-GHz Dual-Vector Doherty Beamformer. 1373-1387 - Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, Nan Sun:
A 0.7-V 0.6-µW 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction. 1388-1398 - Saurabh Saxena, Guanghua Shu, Romesh Kumar Nandwana, Mrunmay Talegaonkar, Ahmed Elkholy, Tejasvi Anand, Woo-Seok Choi, Pavan Kumar Hanumolu:
A 2.8 mW/Gb/s, 14 Gb/s Serial Link Transceiver. 1399-1411 - Lin Cheng, Wing-Hung Ki, Chi-Ying Tsui:
A 6.78-MHz Single-Stage Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier. 1412-1423 - Yuan Gao, Lisong Li, Philip K. T. Mok:
An AC Input Switching-Converter-Free LED Driver With Low-Frequency-Flicker Reduction. 1424-1434 - Taku Ogura, Yasushi Kasa, Kazuhide Kurosaki, Mitsuhiro Tomoeda, Hisakazu Otoi, Satoshi Shimizu, Masafumi Katsumata, Natsuo Ajika, Kazuo Kobayashi:
A 58-nm 2-Gb MLC "B4-Flash" Memory with Flexible Multisector Architecture. 1435-1442 - Inhee Lee, Dennis Sylvester, David T. Blaauw:
A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems. 1443-1449 - John Bell, Phil Knag, Shuanghong Sun, Yong Lim, Thomas Chen, Jeffrey Fredenburg, Chia-Hsiang Chen, Chunyang Zhai, Aaron Z. Rocca, Nicholas Collins, Andres Tamez, Jorge Pernillo, Justin M. Correll, Alan B. Tanner, Zhengya Zhang, Michael P. Flynn:
A 1.5-GHz 6.144T Correlations/s 64 × 64 Cross-Correlator With 128 Integrated ADCs for Real-Time Synthetic Aperture Imaging. 1450-1457
Volume 52, Number 6, June 2017
- Song Hu, Shouhei Kousai, Hua Wang:
A Compact Broadband Mixed-Signal Power Amplifier in Bulk CMOS With Hybrid Class-G and Dynamic Load Trajectory Manipulation. 1463-1478 - Dang Liu, Xuwen Ni, Ranran Zhou, Woogeun Rhee, Zhihua Wang:
A 0.42-mW 1-Mb/s 3- to 4-GHz Transceiver in 0.18-µm CMOS With Flexible Efficiency, Bandwidth, and Distance Control for IoT Applications. 1479-1494 - Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, Rui Paulo Martins:
A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) Pout. 1495-1508 - Hong Gul Han, Byung-Gyu Yu, Tae Wook Kim:
A 1.9-mm-Precision 20-GHz Direct-Sampling Receiver Using Time-Extension Method for Indoor Localization. 1509-1520 - Ahmed I. Hussein, Jeyanandh Paramesh:
Design and Self-Calibration Techniques for Inductor-Less Millimeter-Wave Frequency Dividers. 1521-1541 - Burak Gonen, Fabio Sebastiano, Rui Quan, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A Dynamic Zoom ADC With 109-dB DR for Audio Applications. 1542-1550 - Hai Huang, Ling Du, Yun Chiu:
A 1.2-GS/s 8-bit Two-Step SAR ADC in 65-nm CMOS With Passive Residue Transfer. 1551-1562 - Hyun-Wook Lim, Sung-Won Choi, Jeong-Keun Ahn, Woong-Ki Min, Sang-Kyu Lee, Chang-Hoon Baek, Jae-Youl Lee, Gyoo-Cheol Hwang, Young-Hyun Jun, Bai-Sun Kong:
A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface. 1563-1575 - Jelena Dragas, Vijay Viswam, Amir Shadmani, Yihui Chen, Raziyeh Bounik, Alexander Stettler, Milos Radivojevic, Sydney Geissler, Marie Engelene J. Obien, Jan Mueller, Andreas Hierlemann:
In Vitro Multi-Functional Microelectrode Array Featuring 59 760 Electrodes, 2048 Electrophysiology Channels, Stimulation, Impedance Measurement, and Neurotransmitter Detection Channels. 1576-1590 - Qiyuan Liu, Alexander Edward, Martin Kinyua, Eric G. Soenen, José Silva-Martínez:
A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques. 1591-1604 - Juan Antonio Leñero-Bardallo, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez:
A Wide Linear Dynamic Range Image Sensor Based on Asynchronous Self-Reset and Tagging of Saturation Events. 1605-1617 - Eyal Aklimi, Daniel Piedra, Kevin Tien, Tomás Palacios, Kenneth L. Shepard:
Hybrid CMOS/GaN 40-MHz Maximum 20-V Input DC-DC Multiphase Buck Converter. 1618-1627 - Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester:
A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS. 1628-1642 - Paul N. Whatmough, Shidhartha Das, Zacharias Hadjilambrou, David M. Bull:
Power Integrity Analysis of a 28 nm Dual-Core ARM Cortex-A57 Cluster Using an All-Digital Power Delivery Monitor. 1643-1654 - Qianying Tang, Chris H. Kim:
Characterizing the Impact of RTN on Logic and SRAM Operation Using a Dual Ring Oscillator Array Circuit. 1655-1663 - Meng-Fan Chang, Chien-Chen Lin, Albert Lee, Yen-Ning Chiang, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu:
A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing. 1664-1679 - Anirban Sarkar, Farshid Aryanfar, Brian A. Floyd:
A 28-GHz SiGe BiCMOS PA With 32% Efficiency and 23-dBm Output Power. 1680-1686
Volume 52, Number 7, July 2017
- Jan Craninckx:
New Associate Editor. 1699 - Eugenio Cantatore, Wim Dehaene, Robert Bogdan Staszewski:
Introduction to the Special Issue on the 46th European Solid-State Circuits Conference (ESSCIRC). 1700-1702 - Lorenzo Iotti, Andrea Mazzanti, Francesco Svelto:
Insights Into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation Links. 1703-1718 - Loai G. Salem, James F. Buckwalter, Patrick P. Mercier:
A Recursive Switched-Capacitor House-of-Cards Power Amplifier. 1719-1738 - Enrico Monaco, Gabriele Anzalone, Guido Albasini, Simone Erba, Matteo Bassi, Andrea Mazzanti:
A 2-11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI. 1739-1752 - Hundo Shin, Ramesh Harjani:
Low-Power Wideband Analog Channelization Filter Bank Using Passive Polyphase-FFT Techniques. 1753-1767 - Xiao Xiao, Amanda Pratt, Bonjern Yang, Angie Wang, Ali M. Niknejad, Elad Alon, Borivoje Nikolic:
A 65-nm CMOS Wideband TDD Front-End With Integrated T/R Switching via PA Re-Use. 1768-1782 - Marc Erett, James Hudner, Declan Carey, Ronan Casey, Kevin Geary, Kay Hearne, Pedro Neto, Thomas Mallard, Vikas Sooden, Mark Smyth, Yohan Frans, Jay Im, Parag Upadhyaya, Wenfeng Zhang, Winson Lin, Bruce Xu, Ken Chang:
A 0.5-16.3 Gbps Multi-Standard Serial Transceiver With 219 mW/Channel in 16-nm FinFET. 1783-1797 - Shing Tak Yan, Lu Ye, Raghavendra Kulkarni, Edward Myers, Hsieh-Chih Shih, Hongbing Wu, Shadi Saberi, Darshan Kadia, Dizle Ozis, Lei Zhou, Eric Middleton, Joo Leong Tham:
An 802.11a/b/g/n/ac WLAN Transceiver for 2×2 MIMO and Simultaneous Dual-Band Operation With +29 dBm Psat Integrated Power Amplifiers. 1798-1813 - Nicolas Butzen, Michiel S. J. Steyaert:
MIMO Switched-Capacitor DC-DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution. 1814-1824 - Monodeep Kar, Arvind Singh, Anand Rajan, Vivek De, Saibal Mukhopadhyay:
An All-Digital Fully Integrated Inductive Buck Regulator With A 250-MHz Multi-Sampled Compensator and a Lightweight Auto-Tuner in 130-nm CMOS. 1825-1835 - Junmin Jiang, Wing-Hung Ki, Yan Lu:
Digital 2-/3-Phase Switched-Capacitor Converter With Ripple Reduction and Efficiency Improvement. 1836-1848 - Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An Energy-Scalable Accelerator for Blind Image Deblurring. 1849-1862 - Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic:
A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. 1863-1875 - Junfeng Jiang, Kofi A. A. Makinwa:
A Hybrid Multi-Path CMOS Magnetic Sensor With 76 ppm/°C Sensitivity Drift and Discrete-Time Ripple Reduction Loops. 1876-1884 - Ying Wu, Mina Shahmohammadi, Yue Chen, Ping Lu, Robert Bogdan Staszewski:
A 3.5-6.8-GHz Wide-Bandwidth DTC-Assisted Fractional-N All-Digital PLL With a MASH ΔΣ-TDC for Low In-Band Phase Noise. 1885-1903 - Hans Reyserhove, Wim Dehaene:
A Differential Transmission Gate Design Flow for Minimum Energy Sub-10-pJ/Cycle ARM Cortex-M0 MCUs. 1904-1914 - Carsten Wulff, Trond Ytterdal:
A Compiled 9-bit 20-MS/s 3.5-fJ/conv.step SAR ADC in 28-nm FDSOI for Bluetooth Low Energy Receivers. 1915-1926 - Ashish Kumar, Chandrajit Debnath, Pratap Narayan Singh, Vivek Bhatia, Shivani Chaudhary, Vigyan Jain, Stéphane Le Tual, Rakesh Malik:
A 0.065-mm2 19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s ADC in 28-nm UTBB FD-SOI Using FBB. 1927-1939 - Shaolan Li, Abhishek Mukherjee, Nan Sun:
A 174.3-dB FoM VCO-Based CT ΔΣ Modulator With a Fully-Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130-nm CMOS. 1940-1952 - Minseo Kim, Unsoo Ha, Kyuho Jason Lee, Yongsu Lee, Hoi-Jun Yoo:
A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC. 1953-1965 - Arindam Sanyal, Nan Sun:
An Energy-Efficient Hybrid SAR-VCO ΔΣ Capacitance-to-Digital Converter in 40-nm CMOS. 1966-1976 - Marcello De Matteis, Alessandra Pipino, Federica Resta, Alessandro Pezzotta, Stefano D'Amico, Andrea Baschirotto:
A 63-dB DR 22.5-MHz 21.5-dBm IIP3 Fourth-Order FLFB Analog Filter. 1977-1986
Volume 52, Number 8, August 2017
- ChandraKanth R. Chappidi, Kaushik Sengupta:
Frequency Reconfigurable mm-Wave Power Amplifier With Active Impedance Synthesis in an Asymmetrical Non-Isolated Combiner: Analysis and Design. 1990-2008 - Neha Sinha, Mansour Rachid, Shanthi Pavan, Sudhakar Pamarti:
Design and Analysis of an 8 mW, 1 GHz Span, Passive Spectrum Scanner With >+31 dBm Out-of-Band IIP3 Using Periodically Time-Varying Circuit Components. 2009-2025 - Nijwm Wary, Pradip Mandal:
Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects. 2026-2037 - Lucas Calderin, Sameet Ramakrishnan, Antonio Puglielli, Elad Alon, Borivoje Nikolic, Ali M. Niknejad:
Analysis and Design of Integrated Active Cancellation Transceiver for Frequency Division Duplex Systems. 2038-2054 - Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A 0.038-mm2 SAW-Less Multiband Transceiver Using an N-Path SC Gain Loop. 2055-2070 - Marco Vigilante, Patrick Reynaert:
On the Design of Wideband Transformer-Based Fourth Order Matching Networks for E-Band Receivers in 28-nm CMOS. 2071-2082 - Alireza Imani, Hossein Hashemi:
Distributed Injection-Locked Frequency Dividers. 2083-2093 - Rouzbeh Kananizadeh, Omeed Momeni:
A 190-GHz VCO With 20.7% Tuning Range Employing an Active Mode Switching Block in a 130 nm SiGe BiCMOS. 2094-2104 - Congyin Shi, Edgar Sánchez-Sinencio:
On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture. 2105-2116 - Long Kong, Behzad Razavi:
A 2.4-GHz 6.4-mW Fractional-N Inductorless RF Synthesizer. 2117-2127 - Alvin Li, Yue Chao, Xuan Chen, Liang Wu, Howard C. Luong:
A Spur-and-Phase-Noise-Filtering Technique for Inductor-Less Fractional-N Injection-Locked PLLs. 2128-2140 - Amir Babaie-Fishani, Pieter Rombouts:
A Mostly Digital VCO-Based CT-SDM With Third-Order Noise Shaping. 2141-2153 - Wenjuan Guo, Youngchun Kim, Ahmed H. Tewfik, Nan Sun:
A Fully Passive Compressive Sensing SAR ADC for Low-Power Wireless Sensors. 2154-2167 - Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo:
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS. 2168-2179 - Imon Mondal, Nagendra Krishnapura:
A 2-GHz Bandwidth, 0.25-1.7 ns True-Time-Delay Element Using a Variable-Order All-Pass Filter Architecture in 0.13µm CMOS. 2180-2193 - Albert Lee, Chieh-Pu Lo, Chien-Chen Lin, Wei-Hao Chen, Kuo-Hsiang Hsu, Zhibo Wang, Fang Su, Zhe Yuan, Qi Wei, Ya-Chin King, Chrong Jung Lin, Hochul Lee, Pedram Khalili Amiri, Kang-Lung Wang, Yu Wang, Huazhong Yang, Yongpan Liu, Meng-Fan Chang:
A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors. 2194-2207 - Ye-Sing Luo, Shen-Iuan Liu:
A Voltage Multiplier With Adaptive Threshold Voltage Compensation. 2208-2214 - Khawar Sarfraz, Jin He, Mansun Chan:
A 140-mV Variation-Tolerant Deep Sub-Threshold SRAM in 65-nm CMOS. 2215-2220
Volume 52, Number 9, September 2017
- Jan Craninckx:
New Associate Editor. 2223 - Bodhisatwa Sadhu, Sorin P. Voinigescu:
Introduction to the Special Section on the 2016 IEEE BCTM and IEEE CSICS. 2224-2225 - Takeji Fujibayashi, Yohsuke Takeda, Weihu Wang, Yi-Shin Yeh, Willem Stapelbroek, Seiji Takeuchi, Brian A. Floyd:
A 76- to 81-GHz Multi-Channel Radar Transceiver. 2226-2241 - Herman Jalli Ng, Maciej Kucharski, Wael A. Ahmad, Dietmar Kissinger:
Multi-Purpose Fully Differential 61- and 122-GHz Radar Transceivers for Scalable MIMO Sensor Platforms. 2242-2255 - Satoshi Malotaux, Masoud Babaie, Marco Spirito:
A Total-Power Radiometer Front End in a 0.25-µ BiCMOS Technology With Low 1/f-Corner. 2256-2266 - Seong-Kyun Kim, Robert Maurer, Arda Simsek, Miguel Urteaga, Mark J. W. Rodwell:
An Ultra-Low-Power Dual-Polarization Transceiver Front-End for 94-GHz Phased Arrays in 130-nm InP HBT. 2267-2276 - Hasan Al-Rubaye, Gabriel M. Rebeiz:
W-Band Direct-Modulation >20-Gb/s Transmit and Receive Building Blocks in 32-nm SOI CMOS. 2277-2291 - Matteo Ramella, Ivan Fabiano, Danilo Manstretta, Rinaldo Castello:
A SAW-Less 2.4-GHz Receiver Front-End With 2.4-mA Battery Current for SoC Coexistence. 2292-2305 - Mrunmay Talegaonkar, Tejasvi Anand, Ahmed Elkholy, Amr Elshazly, Romesh Kumar Nandwana, Saurabh Saxena, Brian Young, Woo-Seok Choi, Pavan Kumar Hanumolu:
A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS. 2306-2320 - Chen Jiang, Andreia Cathelin, Ehsan Afshari:
A High-Speed Efficient 220-GHz Spatial-Orthogonal ASK Transmitter in 130-nm SiGe BiCMOS. 2321-2334 - Tzu-Fan Wu, Cheng-Ru Ho, Mike Shuo-Wei Chen:
A Flash-Based Non-Uniform Sampling ADC With Hybrid Quantization Enabling Digital Anti-Aliasing Filter. 2335-2349 - Sujith Billa, Amrith Sukumaran, Shanthi Pavan:
Analysis and Design of Continuous-Time Delta-Sigma Converters Incorporating Chopping. 2350-2361 - Saam Iranmanesh, Esther Rodríguez-Villegas:
A 950 nW Analog-Based Data Reduction Chip for Wearable EEG Systems in Epilepsy. 2362-2373 - Xuan Zhang, Mario Lok, Tao Tong, Sae Kyu Lee, Brandon Reagen, Simon Chaput, Pierre-Emile J. Duhamel, Robert J. Wood, David M. Brooks, Gu-Yeon Wei:
A Fully Integrated Battery-Powered System-on-Chip in 40-nm CMOS for Closed-Loop Control of Insect-Scale Pico-Aerial Vehicle. 2374-2387 - Lingyu Hong, Hao Li, Haw Yang, Kaushik Sengupta:
Fully Integrated Fluorescence Biosensors On-Chip Employing Multi-Functional Nanoplasmonic Optical Structures in CMOS. 2388-2406 - Abishek Manian, Behzad Razavi:
A 40-Gb/s 14-mW CMOS Wireline Receiver. 2407-2421 - Guido Belfiore, Mahdi M. Khafaji, Ronny Henker, Frank Ellinger:
A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver. 2422-2429 - Ashkan Roshan-Zamir, Osama Elhadidy, Hae-Woong Yang, Samuel Palermo:
A Reconfigurable 16/32 Gb/s Dual-Mode NRZ/PAM4 SerDes in 65-nm CMOS. 2430-2447 - Joachim Leicht, Yiannos Manoli:
A 2.6 µW -1.2 mW Autonomous Electromagnetic Vibration Energy Harvester Interface IC with Conduction-Angle-Controlled MPPT and up to 95% Efficiency. 2448-2462 - Fan Yang, Philip K. T. Mok:
A Nanosecond-Transient Fine-Grained Digital LDO With Multi-Step Switching Scheme and Asynchronous Adaptive Pipeline Control. 2463-2474 - Wei Jin, Seongjong Kim, Weifeng He, Zhigang Mao, Mingoo Seok:
Near- and Sub-Vt Pipelines Based on Wide-Pulsed-Latch Design Techniques. 2475-2487 - Hyeon-June Kim, Sun-Il Hwang, Jae-Hyun Chung, Jong-Ho Park, Seung-Tak Ryu:
A Dual-Imaging Speed-Enhanced CMOS Image Sensor for Real-Time Edge Image Extraction. 2488-2497 - Meng-Fan Chang, Chien-Fu Chen, Ting-Hao Chang, Chi-Chang Shuai, Yen-Yao Wang, Yi-Ju Chen, Hiroyuki Yamauchi:
A Compact-Area Low-VDDmin 6T SRAM With Improvement in Cell Stability, Read Speed, and Write Margin Using a Dual-Split-Control-Assist Scheme. 2498-2514 - Sebastian Loeda, Jeffrey Harrison, Franck Pourchet, Andrew Adams:
Corrections to "A 10/20/30/40 MHz Feed-Forward FIR DAC Continuous-Time ΔΣ ADC With Robust Blocker Performance for Radio Receivers". 2515
Volume 52, Number 10, October 2017
- John R. Long, Jan Craninckx, Behzad Razavi:
Introducing Our Sister Publication: IEEE Solid-State Circuits Letters. 2519-2520 - Deog-Kyoon Jeong, Jaeha Kim:
Introduction to the Special Section on the 2016 Asian Solid-State Circuits Conference (A-SSCC 2016). 2521-2522 - Chih-Chan Tu, Yu-Kai Wang, Tsung-Hsien Lin:
A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS. 2523-2532 - Quoc-Hoang Duong, Huy-Hieu Nguyen, Jeong-Woon Kong, Hyun-Seok Shin, Yu-Seok Ko, Hwa-Yeol Yu, Yong-Hee Lee, Chun-Hyeon Bea, Ho-Jin Park:
Multiple-Loop Design Technique for High-Performance Low-Dropout Regulator. 2533-2549 - Jiangyi Li, Jae-sun Seo, Ioannis Kymissis, Mingoo Seok:
Triple-Mode, Hybrid-Storage, Energy Harvesting Power Management Unit: Achieving High Efficiency Against Harvesting and Load Power Variabilities. 2550-2562 - Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun:
A 10-b 800-MS/s Time-Interleaved SAR ADC With Fast Variance-Based Timing-Skew Calibration. 2563-2575 - Chi-Hang Chan, Yan Zhu, Cheng Li, Wai-Hong Zhang, Iok-Meng Ho, Lai Wei, Seng-Pan U, Rui Paulo Martins:
60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration. 2576-2588 - Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic:
Reprogrammable Redundancy for SRAM-Based Cache Vmin Reduction in a 28-nm RISC-V Processor. 2589-2600 - Chang-Hung Tsai, Wan-Ju Yu, Wing Hung Wong, Chen-Yi Lee:
A 41.3/26.7 pJ per Neuron Weight RBM Processor Supporting On-Chip Learning/Inference for IoT Applications. 2601-2612 - Davide Guermandi, Qixian Shi, Andy Dewilde, Veerle Derudder, Ubaid Ahmad, Annachiara Spagnolo, Ilja Ocket, André Bourdoux, Piet Wambacq, Jan Craninckx, Wim Van Thillo:
A 79-GHz 2 × 2 MIMO PMCW Radar SoC in 28-nm CMOS. 2613-2626 - Yining Zhang, Ranran Zhou, Woogeun Rhee, Zhihua Wang:
A 1.9-mW 750-kb/s 2.4-GHz F-OOK Transmitter With Symmetric FM Template and High-Point Modulation PLL. 2627-2635 - Bingwei Jiang, Howard C. Luong:
A 7.9-GHz Transformer-Feedback Quadrature Oscillator With a Noise-Shifting Coupling Network. 2636-2646 - Masum Hossain, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb:
Fractional-N DPLL-Based Low-Power Clocking Architecture for 1-14 Gb/s Multi-Standard Transmitter. 2647-2662 - Kok Lim Chan, Kee Hian Tan, Yohan Frans, Jay Im, Parag Upadhyaya, Siok-Wei Lim, Arianne Roldan, Nakul Narang, Chin Yang Koay, Hongyuan Zhao, Ping-Chuan Chiang, Ken Chang:
A 32.75-Gb/s Voltage-Mode Transmitter With Three-Tap FFE in 16-nm CMOS. 2663-2678 - Daisuke Miyashita, Shouhei Kousai, Tomoya Suzuki, Jun Deguchi:
A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing. 2679-2689 - Wala Saadeh, Muhammad Awais Bin Altaf, Haneen Alsuradi, Jerald Yoo:
A 1.1-mW Ground Effect-Resilient Body-Coupled Communication Transceiver With Pseudo OFDM for Head and Body Area Network. 2690-2702 - Chuhong Duan, Andreas J. Gotterba, Mahmut E. Sinangil, Anantha P. Chandrakasan:
Energy-Efficient Reconfigurable SRAM: Reducing Read Power Through Data Statistics. 2703-2711 - Takuji Miki, Toshiaki Ozeki, Jun-ichi Naka:
A 2-GS/s 8-bit Time-Interleaved SAR ADC for Millimeter-Wave Pulsed Radar Baseband SoC. 2712-2720 - Ali Mostajeran, Andreia Cathelin, Ehsan Afshari:
A 170-GHz Fully Integrated Single-Chip FMCW Imaging Radar with 3-D Imaging Capability. 2721-2734 - Yashar Rajavi, Mohammad Mahdi Ghahramani, Alireza Khalili, Amirpouya Kavousian, Beomsup Kim, Michael P. Flynn:
A 48-MHz Differential Crystal Oscillator With 168-fs Jitter in 28-nm CMOS. 2735-2745 - Sijun Du, Ashwin A. Seshia:
An Inductorless Bias-Flip Rectifier for Piezoelectric Energy Harvesting. 2746-2757 - Kunhee Cho, Ranjit Gharpurey:
An Efficient Buck/Buck-Boost Reconfigurable LED Driver Employing SIN2 Reference. 2758-2768 - Zhibo Wang, Yongpan Liu, Albert Lee, Fang Su, Chieh-Pu Lo, Zhe Yuan, Jinyang Li, Chien-Chen Lin, Wei-Hao Chen, Hsiao-Yun Chiu, Wei-En Lin, Ya-Chin King, Chrong Jung Lin, Pedram Khalili Amiri, Kang-Lung Wang, Meng-Fan Chang, Huazhong Yang:
A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed. 2769-2785
Volume 52, Number 11, November 2017
- Peng Cong:
Introduction to the Special Bio-Section of the 2017 International Solid-State Circuits Conference (ISSCC). 2791-2792 - Hossein Kassiri, Muhammad Tariqus Salam, Mohammad Reza Pazhouhandeh, Nima Soltani, José Luis Pérez Velazquez, Peter L. Carlen, Roman Genov:
Rail-to-Rail-Input Dual-Radio 64-Channel Closed-Loop Neurostimulator. 2793-2810 - Hariprasad Chandrakumar, Dejan Markovic:
An 80-mVpp Linear-Input Range, 1.6- $\text{G}\Omega $ Input Impedance, Low-Power Chopper Amplifier for Closed-Loop Neural Recording That Is Tolerant to 650-mVpp Common-Mode Interference. 2811-2828 - Minseo Kim, Jaeeun Jang, Hyunki Kim, Jihee Lee, Jaehyuk Lee, Jiwon Lee, Kyoung-Rog Lee, Kwantae Kim, Yongsu Lee, Kyuho Jason Lee, Hoi-Jun Yoo:
A 1.4-m $\Omega$ -Sensitivity 94-dB Dynamic-Range Electrical Impedance Tomography SoC and 48-Channel Hub-SoC for 3-D Lung Ventilation Monitoring System. 2829-2842 - Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann:
A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. 2843-2856 - Arun Manickam, Rituraj Singh, Mark W. McDermott, Nicholas Wood, Sara Bolouki, Pejman Naraghi-Arani, Kirsten A. Johnson, Robert G. Kuimelis, Gary K. Schoolnik, Arjang Hassibi:
A Fully Integrated CMOS Fluorescence Biochip for DNA and RNA Testing. 2857-2870 - Rui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa:
64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay. 2871-2891 - Yiming Yu, Huihua Liu, Yunqiu Wu, Kai Kang:
A 54.4-90 GHz Low-Noise Amplifier in 65-nm CMOS. 2892-2904 - M. Mahdi Assefzadeh, Aydin Babakhani:
Broadband Oscillator-Free THz Pulse Generation and Radiation Based on Direct Digital-to-Impulse Architecture. 2905-2919 - Liang Wu, Shaowei Liao, Quan Xue:
A 312-GHz CMOS Injection-Locked Radiator With Chip-and-Package Distributed Antenna. 2920-2933 - Hyunik Kim, Yongjo Kim, Taeik Kim, Hyung Jong Ko, SeongHwan Cho:
A 2.4-GHz 1.5-mW Digital Multiplying Delay-Locked Loop Using Pulsewidth Comparator and Double Injection Technique. 2934-2946 - Yi-Wei Lin, Shawn S. H. Hsu:
A Sierpinski Space-Filling Clock Tree Using Multiply-by-3 Fractal-Coupled Ring Oscillators. 2947-2962 - Xuqiang Zheng, Chun Zhang, Fangxu Lv, Feng Zhao, Shuai Yuan, Shigang Yue, Ziqiang Wang, Fule Li, Zhihua Wang, Hanjun Jiang:
A 40-Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset in 65-nm CMOS. 2963-2978 - Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 7.1-fJ/Conversion-Step 88-dB SFDR SAR ADC With Energy-Free "Swap To Reset". 2979-2990 - Minglei Zhang, Kyoohyun Noh, Xiaohua Fan, Edgar Sánchez-Sinencio:
A 0.8-1.2 V 10-50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier. 2991-3005 - Shunta Iguchi, Takayasu Sakurai, Makoto Takamiya:
A Low-Power CMOS Crystal Oscillator Using a Stacked-Amplifier Architecture. 3006-3017 - Ruimin Yang, Michiel A. P. Pertijs, Stoyan N. Nihtianov:
A Precision Capacitance-to-Digital Converter With 16.7-bit ENOB and 7.5-ppm/°C Thermal Drift. 3018-3031 - Frank M. Yaul, Anantha P. Chandrakasan:
A Noise-Efficient 36 nV/ $\surd $ Hz Chopper Amplifier Using an Inverter-Based 0.2-V Supply Input Stage. 3032-3042 - Chul Kim, Sohmyung Ha, Jiwoong Park, Abraham Akinin, Patrick P. Mercier, Gert Cauwenberghs:
A 144-MHz Fully Integrated Resonant Regulating Rectifier With Hybrid Pulse Modulation for mm-Sized Implants. 3043-3055 - Hesam Sadeghi Gougheri, Mehdi Kiani:
Self-Regulated Reconfigurable Voltage/Current-Mode Inductive Power Management. 3056-3070 - Doyun Kim, Mingoo Seok:
A Fully Integrated Digital Low-Dropout Regulator Based on Event-Driven Explicit Time-Coding Architecture. 3071-3080 - Ming Sun, Zhe Yang, Kishan Joshi, Debashis Mandal, Philippe Adell, Bertan Bakkaloglu:
A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5% Frequency and ±3.6% Current-Sharing Error. 3081-3094 - Florian De Roose, Kris Myny, Marc Ameys, Jan-Laurens P. J. van der Steen, Joris Maas, Joris de Riet, Jan Genoe, Wim Dehaene:
A Thin-Film, a-IGZO, 128b SRAM and LPROM Matrix With Integrated Periphery on Flexible Foil. 3095-3103
Volume 52, Number 12, December 2017
- Tim Piessens, Seung-Tak Ryu, Chih-Ming Hung, Alyosha C. Molnar, Mounir Meghelli:
Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference. 3115-3118 - Arun Paidimarri, Anantha P. Chandrakasan:
A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power. 3119-3131 - Nicolas Butzen, Michel S. J. Steyaert:
Design of Soft-Charging Switched-Capacitor DC-DC Converters Using Stage Outphasing and Multiphase Soft-Charging. 3132-3141 - Christopher Schaef, Eric Din, Jason T. Stauth:
A Hybrid Switched-Capacitor Battery Management IC With Embedded Diagnostics for Series-Stacked Li-Ion Arrays. 3142-3154 - Xiao Wu, Kyojin David Choo, Yao Shi, Li-Xuan Chuo, Dennis Sylvester, David T. Blaauw:
A Fully Integrated Counter Flow Energy Reservoir for Peak Power Delivery in Small Form-Factor Sensor Systems. 3155-3167 - Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins:
Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting. 3168-3180 - Daniël Schinkel, Wouter Groothedde, Fred Mostert, Marto-Jan Koerts, Eric van Iersel, Daniel Groeneveld, Lucien J. Breems:
A Multiphase Class-D Automotive Audio Amplifier With Integrated Low-Latency ADCs for Digitized Feedback After the Output Filter. 3181-3193 - Hanqing Wang, Gerard Mora-Puchalt, Colin Lyden, Roberto Maurino, Christian Birk:
A 19 nV/√Hz Noise 2-µ: V Offset 75-/micro;A Capacitive-Gain Amplifier With Switched-Capacitor ADC Driving Capability. 3194-3203 - Siddharth Devarajan, Larry Singer, Dan Kelly, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow, Gabriele Manganaro:
A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology. 3204-3218 - Hajime Shibata, Victor Kozlov, Zexi Ji, Asha Ganesan, Haiyang Zhu, Donald Paterson, Jialin Zhao, Sharvil Patil, Shanthi Pavan:
A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving -164-dBFS/Hz NSD. 3219-3234 - Hai Huang, Hongda Xu, Brian Elies, Yun Chiu:
A Non-Interleaved 12-b 330-MS/s Pipelined-SAR ADC With PVT-Stabilized Dynamic Amplifier Achieving Sub-1-dB SNDR Variation. 3235-3247 - Taewook Kim, Changsok Han, Nima Maghari:
A 4th-Order Continuous-Time Delta-Sigma Modulator Using 6-bit Double Noise-Shaped Quantizer. 3248-3261 - Lucas Duncan, Brian Dupaix, Jamin J. McCue, Brandon Mathieu, Matthew LaRue, Vipul J. Patel, Mesfin Teshome, Myung-Jun Choe, Waleed Khalil:
A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR. 3262-3275 - Tolga Dinc, Aravind Nagulu, Harish Krishnaswamy:
A Millimeter-Wave Non-Magnetic Passive SOI CMOS Circulator Based on Spatio-Temporal Conductivity Modulation. 3276-3292 - Peyman Nazari, Saman Jafarlou, Payam Heydari:
Analysis and Design of a Millimeter-Wave Cavity-Backed Circularly Polarized Radiator Based on Fundamental Theory of Multi-Port Oscillators. 3293-3311 - Mohsen Hashemi, Yiyu Shen, Mohammadreza Mehrpoo, Morteza S. Alavi, Leo C. N. de Vreede:
An Intrinsically Linear Wideband Polar Digital Power Amplifier. 3312-3328 - Ahmed I. Hussein, Sriharsha Vasadi, Jeyanandh Paramesh:
A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs. 3329-3347 - Voravit Vorapipat, Cooper S. Levy, Peter M. Asbeck:
A Class-G Voltage-Mode Doherty Power Amplifier. 3348-3360 - Cheng Wang, Ruonan Han:
Dual-Terahertz-Comb Spectrometer on CMOS for Rapid, Wide-Range Gas Detection With Absolute Specificity. 3361-3372 - Bodhisatwa Sadhu, Yahya M. Tousi, Joakim Hallin, Stefan Sahl, Scott K. Reynolds, Orjan Renstrom, Kristoffer Sjogren, Olov Haapalahti, Nadav Mazor, Bo Bokinge, Gustaf Weibull, Håkan Bengtsson, Anders Carlinger, Eric Westesson, Jan-Erik Thillberg, Leonard Rexberg, Mark Yeck, Xiaoxiong Gu, Mark A. Ferriss, Duixian Liu, Daniel J. Friedman, Alberto Valdes-Garcia:
A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications. 3373-3391 - Linxiao Zhang, Harish Krishnaswamy:
Arbitrary Analog/RF Spatial Filtering for Digital MIMO Receiver Arrays. 3392-3404 - Ritesh Bhat, Jin Zhou, Harish Krishnaswamy:
Wideband Mixed-Domain Multi-Tap Finite-Impulse Response Filtering of Out-of-Band Noise Floor in Watt-Class Digital Transmitters. 3405-3420 - Nikolaj Andersen, Kristian Granhaug, Jørgen Andreas Michaelsen, Sumit Bagga, Håkon A. Hjortland, Mats Risopatron Knutsen, Tor Sverre Lande, Dag T. Wisland:
A 118-mW Pulse-Based Radar SoC in 55-nm CMOS for Non-Contact Human Vital Signs Detection. 3421-3433 - Enrico Roverato, Marko Kosunen, Koen Cornelissens, Sofia Vatti, Paul Stynen, Kaoutar Bertrand, Teuvo Korhonen, Hans Samsom, Patrick Vandenameele, Jussi Ryynänen:
All-Digital LTE SAW-Less Transmitter With DSP-Based Programming of RX-Band Noise. 3434-3445 - Chih-Wei Yao, Ronghua Ni, Chung Lau, Wanghua Wu, Kunal Godbole, Yongrong Zuo, Sangsoo Ko, Nam-Seog Kim, Sangwook Han, Ikkyun Jo, Joonhee Lee, Juyoung Han, Daehyeon Kwon, Chulho Kim, Shinwoong Kim, Sang Won Son, Thomas Byunghak Cho:
A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration. 3446-3457 - Ilter Özkaya, Alessandro Cevrero, Pier Andrea Francese, Christian Menolfi, Thomas Morf, Matthias Braendli, Daniel M. Kuchta, Lukas Kull, Christian W. Baks, Jonathan E. Proesel, Marcel A. Kossel, Danny Luu, Benjamin G. Lee, Fuad E. Doany, Mounir Meghelli, Yusuf Leblebici, Thomas Toifl:
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET. 3458-3473 - Jaeduk Han, Nicholas Sutardja, Yue Lu, Elad Alon:
Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology. 3474-3485 - Jay Im, Dave Freitas, Arianne Roldan, Ronan Casey, Stanley Chen, Adam Chou, Tim Cronin, Kevin Geary, Scott McLeod, Lei Zhou, Ian Zhuang, Jaeduk Han, Sen Lin, Parag Upadhyaya, Geoff Zhang, Yohan Frans, Ken Chang:
A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET. 3486-3502 - Sajjad Moazeni, Sen Lin, Mark T. Wade, Luca Alloatti, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic:
A 40-Gb/s PAM-4 Transmitter Based on a Ring-Resonator Optical DAC in 45-nm SOI CMOS. 3503-3516 - Wahid Rahman, Danny Yoo, Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi:
A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS. 3517-3531
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