default search action
5th ICECS 1998: Lisbon, Portugal
- 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998. IEEE 1998, ISBN 0-7803-5008-1
Volume 1
- John Malcolm Wilkinson:
Worldwide trends in the microsystems industry, technology and markets. 3-7 - Refet Ramiz, Filiz Günes:
General design method for the filters based on the requirements and a filter design chart. 11-14 - Takehisa Ueda, Naoyuki Aikawa, Masamitsu Sato:
Design method of analog lowpass filters with monotonic response and arbitrary flatness. 15-18 - Karel Hájek, Jirí Sedlácek:
Design of optimum high order crossover coefficients. 19-22 - I-Hung Khoo, Hari C. Reddy, George S. Moschytz:
Study of low sensitivity property of delta operator based sampled-data filters. 23-26 - Qiuting Huang:
The design of a direct-conversion paging receiver quadrature converter for wrist watch applications. 29-32 - Henrique José da Silva, Maria João Rosário:
Monolithic feedback LNA for active antenna simultaneously input port signal and noise matched. 33-36 - Martin T. Hill, Antonio Cantoni:
An integrated narrow band, high resolution synthesizer. 37-40 - Fernando Fortes, Maria João Rosário:
Design of low voltage BiCMOS power amplifiers for wireless communications. 41-44 - Anders Berkeman, Viktor Öwall, Mats Torkelson:
A complex multiplier with low logic depth. 47-50 - Angus Wu, K. C. Tang, C. K. Ng:
Pipelined modified Booth multiplication. 51-54 - Antonio García, Antonio Lloris-Ruíz:
Pipelined RNS multipliers: an application to scaling. 55-58 - Vassilis Paliouras, J. Karagiannis, G. Aggouras, Thanos Stouraitis:
A very-long instruction word digital signal processor based on the logarithmic number system. 59-62 - Ewa Sokolowska, Guillaume Fortin, Nacer Belabbes, Mathieu Gagnon, Bozena Kaminska:
Scalable pseudo-optical switching system for multi-protocol environment. 69-72 - Yichuang Sun, Wai Kit Lau:
Evolutionary tuning method for automatic impedance matching in communication systems. 73-77 - Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
A simplification before and during generation methodology for symbolic large-circuit analysis. 81-84 - Agnieszka Konczykowska, Wlodek M. Zuberek:
Methods and tools for characterisation of semiconductor device models. 85-88 - Wim Verhaegen, Georges G. E. Gielen:
Efficient symbolic analysis of analog integrated circuits using determinant decision diagrams. 89-92 - Luís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira, Karem A. Sakallah:
Timing analysis using propositional satisfiability. 95-98 - Hoan H. Pham, Arokia Nathan:
A new formulation for accurate numerical extraction of interconnect capacitance in ULSI. 99-102 - Takayuki Watanabe, Hideki Asai:
Transient analysis for high-speed interconnect networks based on AWE and delay evaluation technique. 103-106 - Peter Wellig, George S. Moschytz:
Analysis of wavelet features for myoelectric signal classification. 109-112 - C. Guetbi, Denis Kouamé, Abdeldjalil Ouahabi, J.-P. Chemla:
Methods based on wavelets for time delay estimation of ultrasound signals. 113-116 - Raquel Gómez-Sánchez, Diego Andina, Joaquin Torres:
Speech compression with wavelet packets. 117-120 - Datian Ye, Yu Cao, Qin Gong:
Wavelet analysis method for processing and recognition of abdominal fetal ECG waveform. 121-124 - Serdar Özoguz, Cevdet Acar:
On the current-mode current conveyor-based high-order filter realisations. 127-130 - Serdar Özoguz, Ece Olcay Günes, Hassan O. Elwan, Tuna B. Tarim:
CCII-based balanced fully integrated continuous-time filter synthesis: signal-flow graph approach. 131-133 - Yichuang Sun, Barry Jefferies:
Current-mode biquadratic filters using dual output current conveyors. 135-138 - Pedro A. Martínez, Concepción Aldea, Justo Sabadell, Santiago Celma:
Approach to the realization of state variable based oscillators. 139-142 - Takashi Kurashina, Satomi Ogawa, Kenzo Watanabe:
A high performance class AB current conveyor. 143-146 - Ellie Cijvat, Patrik Eriksson, N. Tan, Hannu Tenhunen:
A 1.8 GHz subsampling CMOS downconversion circuit for integrated radio applications. 149-152 - Chung-Yu Wu, Jeng Gong, Yu Cheng:
The design of 2 V 1 GHz CMOS low-noise bandpass amplifier with good temperature stability and low power dissipation. 153-156 - R. Akbari-Dilmaghani, Alison J. Payne, Christofer Toumazou:
A high Q RF CMOS differential active inductor. 157-160 - Kari Stadius, Risto Kaunisto, Veikko Porra:
A high frequency harmonic VCO with an artificial varactor. 161-164 - Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
Basic principles and new solutions for analog sampled-data image rejection mixers. 165-168 - J. H. Lou, James B. Kuo:
1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adder. 171-174 - Juraj Povazanec, Chiu-Sing Choy, Cheong-Fat Chan:
Asynchronous logic in bit-serial arithmetic. 175-178 - Raúl Jiménez, Antonio J. Acosta, Angel Barriga, Manuel J. Bellido, Manuel Valencia:
Efficient self-timed circuits based on weak NMOS-trees. 179-182 - R. T. Lara Sáez, Maher Kayal, Michel J. Declercq, M. C. Schneider:
An overview of the current steering logic (CSL): from the gate to the applications. 183-186 - Agnieszka Konczykowska, Mounir Meghelli:
Very high speed integrated circuits for optical communication. 189-192 - Paulo P. Monteiro, Mário J. N. Lima, José Ferreira da Rocha, António L. J. Teixeira, B. Franz, Berthold Wedding:
An electrically adjustable equalizer for very high bit rate transmission systems based on dispersion supported transmission. 193-196 - Risto Kaunisto, Kari Stadius, Veikko Porra:
A 3 GHz silicon-BJT active resonator and filter. 197-200 - José Carlos Pedro, Luís Ramos Gomes, Nuno Borges Carvalho:
Design techniques for highly efficient class-F amplifiers driven by low voltage supplies. 201-204 - Mário J. N. Lima, Paulo P. Monteiro, José Ferreira da Rocha, António L. J. Teixeira, J. Nuno Matos:
Design of clock-recovery GaAs ICs for high-speed communication systems. 205-208 - M. Helena Fino, L. J. Mourão:
SymbSI-a program for the symbolic signal flow graph generation of switched current circuits. 211-214 - Weibiao Zhang, Huimin Xia, Raed Al-Omari, Marwan Hassoun:
Symbolic synthesis of analog-to-digital conversion architectures using direct-mapping techniques. 215-218 - Jorge Guilherme, Nuno C. G. Horta, José E. Franca:
Symbolic synthesis of non-linear data converters. 219-222 - Idoia Aguirre, Alfonso Carlosena:
A symbolic expressions approximation method based on fully symbolic conditions. 223-226 - Ricardo Jorge Machado, João Miguel Fernandes, Alberto José Proença:
Hierarchical mechanisms for high-level modeling and simulation of digital systems. 229-232 - K. Kapp, Markus Bühler, D. Dallmann, Utz G. Baitinger:
TESA: Timeparallel Estimation of Switching Activity under a real delay model. 233-236 - Jose Miguel Vieira dos Santos, José Manuel Martins Ferreira:
Fault-tolerance: new trends for digital circuits. 237-240 - Mustapha Slamani, Maddi Zineb, Mounir Boukadoum:
A DSP testing approach by modeling the circuit response as a Markov chain. 241-247 - Jongdae Park, Jinwoo Son, Heedon Seo, M. Ishida:
4-subject 4-channel optical telemetry system for use in electrocardiograms. 251-254 - Nuno J. Oliveira, Paulo P. Freitas:
Spin-valve tape heads. 255-258 - Stephan Fahlbusch, Sergej Fatikow:
Force sensing in microrobotic systems - an overview. 259-262 - Arlindo Rodrigues Filho, Alexandre da Cunha Dias:
Surveying the pipeline temperature and pressure profile using an in-line acquisition tool. 263-266 - Paulo P. Freitas, Fernando B. Silva, Luis V. Melo, Jose L. Costa, Nuno Almeida, J. Bernardo:
Giant magnetoresistive sensors for rotational speed control and current monitoring applications. 267-269 - Luís F. F. Brito Palma, Adelino R. Ferreira da Silva:
A virtual instrumentation support system. 273-276 - Chung-Yu Wu, Wen-Cheng Yen:
The neuron-bipolar junction transistor (v-BJT)-a new device structure for VLSI neural network implementation. 277-280 - Young-Chul Kim, Deung-Ku Kang, Tae-Won Lee:
RISC-based coprocessor with a dedicated VLSI neural network. 281-283 - Víctor M. Brea, David López Vilariño, Diego Cabello:
An analog CMOS realisation of a reconfigurable discrete-time cellular neural network. 285-288 - Sigbjørn Næss, Tor Sverre Lande:
Low-power macro-cells for pulse code arithmetic. 289-292 - Nicolás J. Medrano-Marqués, Bonifacio Martín-del-Brío:
General purpose neuroemulator architecture: design and VHDL simulation. 293-296 - Bonifacio Martín-del-Brío, Nicolás J. Medrano-Marqués, Sergio Hernández-Sánchez:
A low-cost neuroprocessor board for emulating the SOFM neural model. 297-300 - Yoshihiko Horio, Hidekazu Yasuda, Mitsuru Hanagata, Kazuyuki Aihara:
An asynchronous pulse neural network model and its analog IC implementation. 301-304 - Tomasz Kacprzak:
Multiple-input transconductance CMOS amplifier for implementation in continuously programmable cellular neural networks. 305-308 - Loreto Rodríguez-Pardo, María José Moure, María Dolores Valdés, Enrique Mandado:
A computer assisted learning tool for electronic design training. 309-312 - Luís F. F. Brito Palma, Adelino R. Ferreira da Silva:
Remote control of a DC motor using infra-red radiation. 313-316 - M. J. Sharifi, Akbar Adibi:
Software lab for semiconductor device characterization. 317-320 - Eduard Bertran, Francesc Tarres, Gabriel Montoro:
An experimental course on digital communications. 321-324 - Tania Vassileva, Vassilliy Tchoumatchenko, Ilario Astinov, Ivan Furnadjiev:
Virtual VHDL laboratory. 325-328 - José Alberto Fonseca, Alexandre Mota, Fernando Santos, Pedro Fonseca, José Luís Azevedo, José Luis Cura:
Affordable tools for teaching embedded systems. 329-332 - Alan John Crispin, L. Ibrani, G. E. Taylor, G. Waterworth:
High performance trajectory control using a neural network cross-coupling gain scheduler. 333-336 - Justo Sabadell, Concepción Aldea, Santiago Celma, Pedro A. Martínez:
A low-voltage high-frequency integrator for CMOS continuous-time current-mode filters. 339-342 - Louis Luh, John Choma Jr., Jeffrey Draper:
A high-speed fully differential current switch. 343-346 - Louis Luh, John Choma Jr., Jeffrey Draper:
A continuous-time common-mode feedback circuit (CMFB) for high-impedance current mode application. 347-350 - Markus Helfenstein, José E. Franca, George S. Moschytz:
Exact design of multirate switched-current FIR filters with improved phase linearity. 351-354 - Andrew E. J. Ng, John I. Sewell:
Switched-current elliptic decimators based on bilinear-transformed ladder structures. 355-358 - Khayrollah Hadidi, K. Eguchi, Takashi Matsumoto, Haruo Kobayashi:
A highly linear second-order stage for 500-MHz third-order and fifth-order filters. 361-364 - M. Morimoto, Khayrollah Hadidi, K. Futami, T. Matsumoto:
A novel design technique for input differential pairs in single-ended operational amplifiers. 365-368 - Khayrollah Hadidi, Jafar Sobhi-Gheshlaghi, A. Hasankhaan, Daigo Muramatsu, Takashi Matsumoto:
A novel highly linear CMOS buffer. 369-371 - Khayrollah Hadidi, Mahta Jenabi, Jafar Sobhi-Gheshlaghi, A. Hasankhaan:
A 300 MHz 18 dB variable gain amplifier. 373-375 - Kamran Eshraghian:
Design methodology and performance estimation for complementary gallium arsenide. 379-383 - Juan A. Montiel-Nelson, Valentin de Armas, Roberto Sarmiento, Antonio Núñez:
OLYMPO: a GaAs compiler for VLSI design. 385-388 - Jean Hourany, Joseph Bellaiche, Jean-Pierre André, Etienne Delhaye:
Recent advances in 40 Gb/s digital functions for high bit rate telecommunication applications. 389-392 - Andreas Brennemann, E. Bushehri, W. Daumann, M. Agethen, R. M. Bertenburg, Wolfgang Brockerhoff, V. Staroselsky, Vladimir Bratov, Thomas Schlichter, Franz-Josef Tegude:
InP-based logic gates for low power monolithic optoelectronic circuits [InGaAs/InAlAs/InP]. 393-396 - Derek Abbott, Said F. Al-Sarawi, B. Gonzalez, José Francisco López, J. Austin-Crowe, Kamran Eshraghian:
Neu-MOS (νMOS) for smart sensors and extension to a novel neu-GaAs (νGaAs) paradigm. 397-404 - Markus Brandstetter, Torsten Harms, Helmut Reinig, Michael Vanrompay:
Codevelopment of long haul ISDN transceiver and design methodology improves time to market. 407-410 - Eduardo de Vasconcelos, Rui L. Aguiar, Dinis M. Santos:
A 0.7 μm CMOS clock recovery circuit for 622 Mb/s SDH systems. 411-414 - R. Furness, Mohammed Benaissa, Sebastian T. J. Fenn:
Circuit architectures for semi-bit-serial & programmable arithmetic in finite fields. 415-418 - Jorge A. Polar Seminario, Carlos A. dos Reis Filho:
FPGA prototype of a serial interface circuit. 419-422 - Les T. Walczowski, Keith R. Dimond, W. A. J. Waller:
A digital engineering curriculum with integrated, Windows-based EDA tools. 425-428 - Bonifacio Martín-del-Brío, Carlos Bernal Ruiz:
Visual 11: a software tool for learning microcontroller fundamentals. 429-432 - Alexandre Mota, José Alberto Fonseca, Fernando Santos:
Low cost data acquisition systems based on standard interfaces. 433-437 - Francesc Tarres, Eduard Bertran, Gabriel Montoro, Ana B. de Souza:
An application oriented short-course in image recognition. 439-442 - Raul Carneiro Martins, Helena Maria Geirinhas Ramos, Pedro Silva Girão, António Cruz Serra:
Taxonomic problems on ADC characterisation. 445-448 - Diego Bellan, Arnaldo Brandolini, Alessandro Gandelli:
Effects of ADC nonlinearities in sine-wave amplitude measurement. 449-452 - Giovanni Chiorboli, Barbara De Salvo, Giovanni Franco, Carlo Morandi:
Some thoughts on the word error rate measurement of A/D converters. 453-456 - Raul Carneiro Martins, António Manuel da Cruz Serra:
The use of a noise stimulus in ADC characterization. 457-460 - Vladimír Haasz, Jaroslav Roztocil:
Testing of dynamic quality of AD modules with standard interfaces and problems connected with it. 461-464 - R. Herzer, E. Schimanek, Christoph Bokeloh, J. Lehmann:
A universal smart control IC for high-power IGBT applications. 467-470 - Jose Luis Mora, Eduardo Galvan, Francisco Colodro, Federico Barrero, Jonathan Noel Tombs, M. Barranco, Antonio Torralba, Leopoldo García Franquelo:
ASITRON: ASIC for vectorial control of induction motors and speed regulation using fuzzy-logic. 471-475 - Domenico Rossi:
New emerging applications for smart power integrated circuits: technologies implications and new design techniques. 477-484 - Jonathan Living, Bashir M. Al-Hashimi, M. Moniri:
High performance distributed arithmetic FPGA decimators for video-frequency applications. 487-490 - Tsuyoshi Takebe, Toyoji Matsumoto, Shuitsu Matsumura, Kyoko Kato:
Design of equiripple stopband even and odd order linear phase IIR filters. 491-494 - Adrian Burian, Corneliu Rusu, Pauli Kuosmanen:
Efficient realization of the M-D nonrecursive filters: from sequential implementation to mapping on systolic array processors. 495-498 - Leonel Augusto Sousa:
Bidirectional systolic arrays for digital recursive filters. 499-502 - Angus Wu, Man F. So:
An efficient VLSI implementation of four-step search algorithm. 503-506 - António Teixeira, Francisco A. C. Vaz, José Carlos Príncipe:
Some studies of European Portuguese nasal vowels using an articulatory synthesizer. 507-510 - I. Singh, Panajotis Agathoklis, Andreas Antoniou:
Image compression using a mixed-transform technique and vector quantization. 511-514 - J. Jiang, C. V. Brett:
CAM based real-time lossless image compression. 515-518 - Vassilis E. Fotopoulos, Athanassios N. Skodras:
sMAE: an improved block matching criterion. 519-522 - Mostafa A. Ibrahim, Abdel-Wahab F. Hussein, Samia A. Mashali, Ahmed H. Mohamed:
A blind image restoration system using higher-order statistics and Radon transform. 523-530 - José M. Bioucas-Dias, José M. N. Leitão:
Group lapped iterative technique for fast solution of large linear systems. 531-534 - Francisco José Mora Mas, Angel Sebastiá:
Electronic design of a high performance interface to the SCI network. 535-538 - Sergio Curinga:
Use of a statistical model for lip synthesis. 539-541 - Marcos Faúndez-Zanuy, Francesc Vallverdú, Enric Monte:
Efficient nonlinear prediction in ADPCM. 543-546 - Carmen Peláez-Moreno, Izzet Kale, Armando Malanda:
Speech coding via Balanced Model Truncation-a novel approach. 547-551 - Vojko Pahor:
A fuzzy synchronization algorithm for bimodal speech signals. 553-556