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2020 – today
- 2024
[j36]Muhammad Khalid
, Simone Ferraresi, Gaetano Bellanca, Marina Barbiroli, Franco Fuschini, Velio Tralli, Davide Bertozzi, Vincenzo Petruzzelli, Giovanna Calò:
LNOI Wireless Switches Based on Optical Phased Arrays for On-Chip Communication. IEEE J. Sel. Areas Commun. 42(8): 2054-2065 (2024)- [c121]Federico Gavioli, Gianluca Brilli, Paolo Burgio, Davide Bertozzi:
Adaptive Localization for Autonomous Racing Vehicles with Resource-Constrained Embedded Platforms. DATE 2024: 1-6 - [c120]Alessandro Veronesi, Alessandro Nazzari, Dario Passarello, Milos Krstic, Michele Favalli, Luca Cassano, Antonio Miele, Davide Bertozzi, Cristiana Bolchini:
Cross-Layer Reliability Analysis of NVDLA Accelerators: Exploring the Configuration Space. ETS 2024: 1-6 - 2023
- [c119]M. Khalid, Giovanna Calò, Gaetano Bellanca, Jacopo Nanni, Marina Barbiroli, Franco Fuschini, Velio Tralli, Davide Bertozzi, Vincenzo Petruzzelli:
Integrated Optical Phased Arrays for on-Chip Communication. ICTON 2023: 1-4 - [c118]Elena Bellodi, Davide Bertozzi, Alice Bizzarri, Michele Favalli, Michele Fraccaroli, Riccardo Zese:
Efficient Resource-Aware Neural Architecture Search with a Neuro-Symbolic Approach. MCSoC 2023: 171-178 - [c117]Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi:
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations. NEWCAS 2023: 1-5 - 2022
- [c116]Davide Bertozzi, Kshitij Bhardwaj, Steven M. Nowick:
An Asynchronous Soft Macro for Ultra-Low Power Communication in Neuromorphic Computing. AICAS 2022: 178-181 - [c115]Alessandro Veronesi, Francesco Dall'Occo, Davide Bertozzi, Michele Favalli, Milos Krstic:
Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study. DDECS 2022: 142-147 - 2021
- [j35]Davide Bertozzi, Gabriele Miorandi, Alberto Ghiribaldi, Wayne P. Burleson, Greg Sadowski, Kshitij Bhardwaj, Weiwei Jiang, Steven M. Nowick:
Cost-Effective and Flexible Asynchronous Interconnect Technology for GALS Systems. IEEE Micro 41(1): 69-81 (2021) - [c114]Tommaso Rizzi, Emilio Pérez-Bosch Quesada, Christian Wenger, Cristian Zambelli, Davide Bertozzi:
Comparative Analysis and Optimization of the SystemC-AMS Analog Simulation Efficiency of Resistive Crossbar Arrays. DCIS 2021: 1-6 - [c113]Francesco Dall'Occo, Andrés Bueno-Crespo, José L. Abellán, Davide Bertozzi, Michele Favalli:
The Challenge of Classification Confidence Estimation in Dynamically-Adaptive Neural Networks. SAMOS 2021: 505-522 - [c112]Giovanna Calò, Marina Barbiroli, Gaetano Bellanca, Davide Bertozzi, Franco Fuschini, Velio Tralli, Giovanni Serafino, Vincenzo Petruzzelli:
Reconfigurable on-chip wireless interconnections through optical phased arrays (Invited). SLIP 2021: 33-40 - 2020
- [j34]Alexandre Truppel, Tsun-Ming Tseng, Davide Bertozzi, José Carlos Alves, Ulf Schlichtmann:
PSION+: Combining Logical Topology and Physical Layout Optimization for Wavelength-Routed ONoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5197-5210 (2020) - [c111]Alessandro Veronesi, Milos Krstic, Davide Bertozzi:
Cross-Layer Hardware/Software Assessment of the Open-Source NVDLA Configurable Deep Learning Accelerator. VLSI-SOC 2020: 58-63 - [c110]Alessandro Veronesi, Davide Bertozzi, Milos Krstic:
Assessing the Configuration Space of the Open Source NVDLA Deep Learning Accelerator on a Mainstream MPSoC Platform. VLSI-SoC (Selected Papers) 2020: 87-112
2010 – 2019
- 2019
- [c109]Mariem Turki, Davide Bertozzi:
An Interconnect-Centric Approach to the Flexible Partitioning and Isolation of Many-Core Accelerators for Fog Computing. DCIS 2019: 1-6 - [c108]Alexandre Truppel, Tsun-Ming Tseng, Davide Bertozzi, José Carlos Alves, Ulf Schlichtmann:
PSION: Combining Logical Topology and Physical Layout Optimization for Wavelength-Routed ONoCs. ISPD 2019: 49-56 - [c107]Miguel Gorgues Alonso, José Flich, Meriem Turki, Davide Bertozzi:
A Low-Latency and Flexible TDM NoC for Strong Isolation in Security-Critical Systems. MCSoC 2019: 149-156 - 2018
- [j33]Maddalena Nonato, Davide Bertozzi, Marco Gavanelli, Andrea Peano:
A network model for routing-fault-free wavelength selection in WRONoCs design. Electron. Notes Discret. Math. 64: 285-294 (2018) - [c106]Marcello Dalpasso, Davide Bertozzi, Michele Favalli:
A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices. DATE 2018: 297-300 - [c105]Mahdi Tala, Oliver Schrape, Milos Krstic, Davide Bertozzi:
Exploring the Performance-Energy Optimization Space of a Bridge Between 3D-Stacked Electronic and Optical Networks-on-Chip. DCIS 2018: 1-6 - [c104]Mahdi Tala, Oliver Schrape, Milos Krstic, Davide Bertozzi:
Interfacing 3D-stacked Electronic and Optical NoCs with Mixed CMOS-ECL Bridges: a Realistic Preliminary Assessment. ACM Great Lakes Symposium on VLSI 2018: 81-86 - [c103]Davide Bertozzi, Marco Gavanelli, Maddalena Nonato:
Wavelength-Routed Optical Networks-on-Chip: Design Methods and Tools to Bridge the Gap Between Logic Topologies and Physical Ones in 3D Architectures. ACM Great Lakes Symposium on VLSI 2018: 311-316 - [c102]Mengchu Li, Tsun-Ming Tseng, Davide Bertozzi, Mahdi Tala, Ulf Schlichtmann:
CustomTopo: a topology generation method for application-specific wavelength-routed optical NoCs. ICCAD 2018: 100 - [c101]Cristian Zambelli, Marco Castellari, Piero Olivo, Davide Bertozzi:
Correlating Power Efficiency and Lifetime to Programming Strategies in RRAM-Based FPGAs. NGCAS 2018: 21-24 - [c100]Mahdi Tala, Davide Bertozzi:
Understanding the Design Space of Wavelength-Routed Optical NoC Topologies for Power-Performance Optimization. VLSI-SoC 2018: 255-260 - [c99]Sudeep Pasricha, Davide Bertozzi, Hui Li:
Special session on overcoming reliability and energy-efficiency challenges with silicon photonics for future manycore computing. VTS 2018: 1 - 2017
- [j32]Marco Gavanelli, Maddalena Nonato, Andrea Peano, Davide Bertozzi:
Logic programming approaches for routing fault-free and maximally parallel wavelength-routed optical networks-on-chip (Application paper). Theory Pract. Log. Program. 17(5-6): 800-818 (2017) - [j31]Marta Ortín-Obón, Mahdi Tala, Luca Ramini, Víctor Viñals Yúfera, Davide Bertozzi:
Contrasting Laser Power Requirements of Wavelength-Routed Optical NoC Topologies Subject to the Floorplanning, Placement, and Routing Constraints of a 3-D-Stacked System. IEEE Trans. Very Large Scale Integr. Syst. 25(7): 2081-2094 (2017) - [c98]Marta Ortín-Obón, Luca Ramini, Víctor Viñals Yúfera, Davide Bertozzi:
A tool for synthesizing power-efficient and custom-tailored wavelength-routed optical rings. ASP-DAC 2017: 300-305 - [c97]Gabriele Miorandi, Marco Balboni, Steven M. Nowick, Davide Bertozzi:
Accurate Assessment of Bundled-Data Asynchronous NoCs Enabled by a Predictable and Efficient Hierarchical Synthesis Flow. ASYNC 2017: 10-17 - [c96]Weiwei Jiang, Davide Bertozzi, Gabriele Miorandi, Steven M. Nowick, Wayne P. Burleson, Greg Sadowski:
An asynchronous NoC router in a 14nm FinFET library: Comparison to an industrial synchronous counterpart. DATE 2017: 732-733 - [c95]Marco Balboni, Davide Bertozzi:
Transparent lifetime built-in self-testing of networks-on-chip through the selective non-concurrent testing of their communication channels. AISTECS@HiPEAC 2017: 12-17 - [c94]Marco Balboni, Davide Bertozzi:
Concurrent network-on-chip lifetime testing through selective disconnection of its communication channels. NEWCAS 2017: 69-72 - [c93]Davide Bertozzi, Gabriele Miorandi, Mahdi Tala, Steven M. Nowick:
Cost-Effective and Flexible Asynchronous Interconnect Technology for GALS Networks-on-Chip. NGCAS 2017: 77-80 - [c92]Davide Bertozzi, Sébastien Rumley:
Propelling breakthrough embedded microprocessors by means of integrated photonics. SoCC 2017: 1-3 - [i1]Marco Gavanelli, Maddalena Nonato, Andrea Peano, Davide Bertozzi:
Logic Programming approaches for routing fault-free and maximally-parallel Wavelength Routed Optical Networks on Chip (Application paper). CoRR abs/1707.05858 (2017) - 2016
- [j30]Anja von Beuningen, Luca Ramini, Davide Bertozzi, Ulf Schlichtmann:
PROTON+: A Placement and Routing Tool for 3D Optical Networks-on-Chip with a Single Optical Layer. ACM J. Emerg. Technol. Comput. Syst. 12(4): 44:1-44:28 (2016) - [c91]Gabriele Miorandi, Mahdi Tala, Marco Balboni, Luca Ramini, Davide Bertozzi:
Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems. AISTECS@HiPEAC 2016: 3:1-3:6 - [c90]Andrea Peano, Luca Ramini, Marco Gavanelli, Maddalena Nonato, Davide Bertozzi:
Design technology for fault-free and maximally-parallel wavelength-routed optical networks-on-chip. ICCAD 2016: 3 - [c89]Gabriele Miorandi, Alberto Celin, Michele Favalli, Davide Bertozzi:
A built-in self-testing framework for asynchronous bundled-data NoC switches resilient to delay variations. NOCS 2016: 1-8 - [c88]Mahdi Tala, Marco Castellari, Marco Balboni, Davide Bertozzi:
Populating and exploring the design space of wavelength-routed optical network-on-chip topologies by leveraging the add-drop filtering primitive. NOCS 2016: 1-8 - 2015
- [j29]Davide Bertozzi, Giorgos Dimitrakopoulos, José Flich, Sören Sonntag:
The fast evolving landscape of on-chip communication - Selected future challenges and research avenues. Des. Autom. Embed. Syst. 19(1-2): 59-76 (2015) - [j28]Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Davide Bertozzi, Piero Olivo:
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10): 1627-1638 (2015) - [j27]Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli:
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers. ACM Trans. Embed. Comput. Syst. 14(1): 7:1-7:24 (2015) - [c87]Ernesto Villegas Castillo, Gabriele Miorandi, Davide Bertozzi, Jiang Chau Wang:
DyAFNoC: Dynamically Reconfigurable NoC Characterization Using a Simple Adaptive Deadlock-Free Routing Algorithm with a Low Implementation Cost. ARC 2015: 419-426 - [c86]Gabriele Miorandi, Davide Bertozzi, Steven M. Nowick:
Increasing Impartiality and Robustness in High-Performance N-Way Asynchronous Arbiters. ASYNC 2015: 108-115 - [c85]Marco Balboni, José Flich, Davide Bertozzi:
Synergistic use of multiple on-chip networks for ultra-low latency and scalable distributed routing reconfiguration. DATE 2015: 806-811 - [c84]Luca Ramini, Mahdi Tala, Davide Bertozzi:
Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems. INA-OCMC@HiPEAC 2015: 5-8 - [c83]Marta Ortín, Luca Ramini, Marco Balboni, Lorenzo Zuolo, Maddalena Nonato, Víctor Viñals, Davide Bertozzi:
Partitioning Strategies of Wavelength-Routed Optical Networks-on-Chip for Laser Power Minimization. SiPhotonics@HiPEAC 2015: 17-24 - [c82]Marco Balboni, Davide Bertozzi:
NoC-centric partitioning and reconfiguration technologies for the efficient sharing of multi-core programmable accelerators. HPCS 2015: 643-645 - [c81]Ernesto Villegas Castillo, Jiang Chau Wang, Gabriele Miorandi, Davide Bertozzi:
Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost. LASCAS 2015: 1-4 - 2014
- [j26]Marta Ortín-Obón, Luca Ramini, Víctor Viñals, Davide Bertozzi:
Capturing the sensitivity of optical network quality metrics to its network interface parameters. Concurr. Comput. Pract. Exp. 26(15): 2504-2517 (2014) - [j25]Davide Bertozzi, Giorgos Dimitrakopoulos, Sören Sonntag:
Editorial. Des. Autom. Embed. Syst. 18(3-4): 119-120 (2014) - [j24]Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto, Davide Bertozzi, Piero Olivo, Cristian Zambelli:
FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories. ACM Trans. Archit. Code Optim. 11(3): 26:1-26:25 (2014) - [c80]Alberto Ghiribaldi, Hervé Tatenguem Fankem, Federico Angiolini, Mikkel Bystrup Stensgaard, Tobias Bjerregaard, Davide Bertozzi:
A vertically integrated and interoperable multi-vendor synthesis flow for predictable noc design in nanoscale technologies. ASP-DAC 2014: 337-342 - [c79]Valentina Mazzoni, Luigina Mortari, Federico Corni, Davide Bertozzi:
Guided Participatory Research on Parallel Computer Architectures for K-12 Students Through a Narrative Approach. CSEDU (3) 2014: 111-117 - [c78]Luca Ramini, Alberto Ghiribaldi, Paolo Grani, Sandro Bartolini, Hervé Tatenguem Fankem, Davide Bertozzi:
Assessing the energy break-even point between an optical NoC architecture and an aggressive electronic baseline. DATE 2014: 1-6 - [c77]Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi:
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives. DATE 2014: 1-6 - [c76]Valentina Mazzoni, Davide Bertozzi:
Interdisciplinary design of a research experience on microelectronic systems for K-12 students. EWME 2014: 64-69 - [c75]Marta Ortín-Obón, Luca Ramini, Hervé Tatenguem Fankem, Víctor Viñals, Davide Bertozzi:
A complete electronic network interface architecture for global contention-free communication over emerging optical networks-on-chip. ACM Great Lakes Symposium on VLSI 2014: 267-272 - [c74]Alessandro Strano, Alberto Ghiribaldi, Hervé Tatenguem Fankem, Davide Bertozzi:
A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems. INA-OCMC@HiPEAC 2014: 2:1-2:4 - [c73]Marco Balboni, Marta Ortín-Obón, Alessandro Capotondi, Hervé Tatenguem Fankem, Alberto Ghiribaldi, Luca Ramini, Víctor Viñals, Andrea Marongiu, Davide Bertozzi:
Augmenting manycore programmable accelerators with photonic interconnect technology for the high-end embedded computing domain. NOCS 2014: 72-79 - [c72]Gabriele Miorandi, Alberto Ghiribaldi, Steven M. Nowick, Davide Bertozzi:
Crossbar replication vs. sharing for virtual channel flow control in asynchronous NoCs: A comparative study. VLSI-SoC 2014: 1-6 - [e2]Davide Bertozzi, Luca Benini, Sudhakar Yalamanchili, Jörg Henkel:
Eighth IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2014, Ferrara, Italy, September 17-19, 2014. IEEE 2014, ISBN 978-1-4799-5347-9 [contents] - 2013
- [j23]Alessandro Strano, Nicola Caselli, Simone Terenzi, Davide Bertozzi:
Optimising pseudo-random built-in self-testing of fully synchronous as well as multisynchronous networks-on-chip. IET Comput. Digit. Tech. 7(2) (2013) - [j22]Alberto Ghiribaldi, Daniele Ludovici, Francisco Triviño, Alessandro Strano, José Flich, José L. Sánchez, Francisco J. Alfaro, Michele Favalli, Davide Bertozzi:
A complete self-testing and self-configuring NoC infrastructure for cost-effective MPSoCs. ACM Trans. Embed. Comput. Syst. 12(4): 106:1-106:29 (2013) - [j21]Frank Olaf Sem-Jacobsen, Samuel Rodrigo, Tor Skeie, Alessandro Strano, Davide Bertozzi:
An efficient, low-cost routing framework for convex mesh partitions to support virtualization. ACM Trans. Embed. Comput. Syst. 12(4): 107:1-107:24 (2013) - [j20]Frank Olaf Sem-Jacobsen, Samuel Rodrigo, Alessandro Strano, Tor Skeie, Davide Bertozzi, Francisco Gilabert Villamón:
Enabling power efficiency through dynamic rerouting on-chip. ACM Trans. Embed. Comput. Syst. 12(4): 111:1-111:23 (2013) - [c71]Alberto Ghiribaldi, Davide Bertozzi, Steven M. Nowick:
A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems. DATE 2013: 332-337 - [c70]Luca Ramini, Paolo Grani, Sandro Bartolini, Davide Bertozzi:
Contrasting wavelength-routed optical NoC topologies for power-efficient 3D-stacked multicore processors using physical-layer analysis. DATE 2013: 1589-1594 - [c69]Olav Lysne, Torsten Hoefler, Pedro López, Davide Bertozzi:
Topic 13: High-Performance Networks and Communication - (Introduction). Euro-Par 2013: 684 - [c68]Francisco Triviño, Davide Bertozzi, José Flich:
A fast algorithm for runtime reconfiguration to maximize the lifetime of nanoscale NoCs. INA-OCMC@HiPEAC 2013: 1-4 - [c67]Anja Boos, Luca Ramini, Ulf Schlichtmann, Davide Bertozzi:
PROTON: an automatic place-and-route tool for optical networks-on-chip. ICCAD 2013: 138-145 - [c66]Marco Balboni, Francisco Triviño, José Flich, Davide Bertozzi:
Optimizing the overhead for network-on-chip routing reconfiguration in parallel multi-core platforms. ISSoC 2013: 1-6 - [c65]Lorenzo Zuolo, Gabriele Miorandi, Cristian Zambelli, Piero Olivo, Davide Bertozzi:
System interconnect extensions for fully transparent demand paging in low-cost MMU-less embedded systems. ISSoC 2013: 1-6 - 2012
- [j19]Milos Krstic, Xin Fan, Eckhard Grass, Luca Benini, Mohammad Reza Kakoee, Christoph Heer, Birgit Sanders, Alessandro Strano, Davide Bertozzi:
Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience. Int. J. Embed. Real Time Commun. Syst. 3(4): 1-18 (2012) - [c64]Vladimir Todorov, Alberto Ghiribaldi, Helmut Reinig, Davide Bertozzi, Ulf Schlichtmann:
Non-intrusive trace & debug noc architecture with accurate timestamping for GALS SoCs. CODES+ISSS 2012: 181-186 - [c63]José L. Abellán, Juan Fernández Peinador, Manuel E. Acacio, Davide Bertozzi, Daniele Bortolotti, Andrea Marongiu, Luca Benini:
Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs. DATE 2012: 491-496 - [c62]Cristian Zambelli, Marco Indaco, Michele Fabiano, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi:
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories. DATE 2012: 881-886 - [c61]Samuel Rodrigo, Frank Olaf Sem-Jacobsen, Hervé Tatenguem, Tor Skeie, Davide Bertozzi:
Cost-Effective Contention Avoidance in a CMP with Shared Memory Controllers. Euro-Par 2012: 741-752 - [c60]Alberto Ghiribaldi, Alessandro Strano, Michele Favalli, Davide Bertozzi:
Power efficiency of switch architecture extensions for fault tolerant NoC design. IGCC 2012: 1-6 - [c59]Simone Terenzi, Alessandro Strano, Davide Bertozzi:
Optimizing built-in pseudo-random self-testing for network-on-chip switches. INA-OCMC@HiPEAC 2012: 21-24 - [c58]Alessandro Strano, Davide Bertozzi, Federico Angiolini, Leonardo Di G. Gregorio, Frank Olaf Sem-Jacobsen, Vladimir Todorov, José Flich, José Silla, Tobias Bjerregaard:
Quest for the ultimate network-on-chip: the NaNoC project. INA-OCMC@HiPEAC 2012: 43-46 - [c57]Davide Bertozzi, Luca Benini:
A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip. ICCD 2012: 43-44 - [c56]Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini:
Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs. ICCD 2012: 45-48 - [c55]Hervé Tatenguem, Alessandro Strano, Vineeth Govind, Jaan Raik, Davide Bertozzi:
Ultra-low latency NoC testing via pseudo-random test pattern compaction. ISSoC 2012: 1-6 - [c54]Nicola Caselli, Alessandro Strano, Daniele Ludovici, Davide Bertozzi:
Cooperative Built-in Self-Testing and Self-Diagnosis of NoC Bisynchronous Channels. MCSoC 2012: 159-166 - [c53]Luca Ramini, Davide Bertozzi:
Power efficiency of wavelength-routed optical NoC topologies for global connectivity of 3D multi-core processors. NoCArc@MICRO 2012: 25-30 - [c52]Luca Ramini, Davide Bertozzi, Luca P. Carloni:
Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core Processor with Awareness of Layout Constraints. NOCS 2012: 185-192 - [c51]Alessandro Strano, Davide Bertozzi, Francisco Triviño, José L. Sánchez, Francisco J. Alfaro, José Flich:
OSR-Lite: Fast and deadlock-free NoC reconfiguration framework. ICSAMOS 2012: 86-95 - 2011
- [j18]Cristian Zambelli, Davide Bertozzi, Andrea Chimenton, Piero Olivo:
Nonvolatile Memory Partitioning Scheme for Technology-Based Performance-Reliability Tradeoff. IEEE Embed. Syst. Lett. 3(1): 13-15 (2011) - [j17]Giacomo Paci, Davide Bertozzi, Luca Benini:
Variability compensation for full-swing against low-swing on-chip communication. IET Comput. Digit. Tech. 5(5): 355-365 (2011) - [j16]Alessandro Strano, Carles Hernández, Federico Silla, Davide Bertozzi:
Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-on-Chip Design. Int. J. Embed. Real Time Commun. Syst. 2(4): 1-20 (2011) - [j15]Samuel Rodrigo, José Flich, Antoni Roca, Simone Medardoni, Davide Bertozzi, Jesús Camacho Villanueva, Federico Silla, José Duato:
Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(4): 534-547 (2011) - [c50]Alessandro Strano, Davide Bertozzi, Arnaud Grasset, Sami Yehia:
Exploiting structural redundancy of SIMD accelerators for their built-in self-testing/diagnosis and reconfiguration. ASAP 2011: 141-148 - [c49]Alessandro Strano, Crispín Gómez Requena, Daniele Ludovici, Michele Favalli, María Engracia Gómez, Davide Bertozzi:
Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture. DATE 2011: 661-666 - [c48]Daniele Ludovici, Alessandro Strano, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi:
Mesochronous NoC technology for power-efficient GALS MPSoCs. INA-OCMC@HiPEAC 2011: 27-30 - [c47]Alberto Parini, Luca Ramini, Gaetano Bellanca, Davide Bertozzi:
Abstract modelling of switching elements for optical networks-on-chip with technology platform awareness. INA-OCMC@HiPEAC 2011: 31-34 - [c46]Milos Krstic, Xin Fan, Eckhard Grass, Christoph Heer, Birgit Sanders, Luca Benini, Mohammad Reza Kakoee, Alessandro Strano, Davide Bertozzi:
Moonrake chip - GALS demonstrator in 40 nm CMOS technology. SoC 2011: 9-13 - [c45]Marco Ferraresi, Giuseppina Gobbo, Daniele Ludovici, Davide Bertozzi:
Bringing Network-on-Chip links to 45nm. SoC 2011: 122-127 - [c44]Hervé Tatenguem, Daniele Ludovici, Alessandro Strano, Davide Bertozzi, Helmut Reinig:
Contrasting multi-synchronous MPSoC design styles for fine-grained clock domain partitioning: the full-HD video playback case study. NoCArc@MICRO 2011: 37-42 - [c43]Alberto Ghiribaldi, Daniele Ludovici, Michele Favalli, Davide Bertozzi:
System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic. VLSI-SoC 2011: 308-313 - [e1]José Flich, Davide Bertozzi, Tor Skeie, Daniele Ludovici:
Proceedings of the Fifth International Workshop on Interconnection Network Architecture - On-Chip, Multi-Chip, INA-OCMC '11, Heraklion, Greece, January 23, 2011. ACM 2011, ISBN 978-1-4503-0272-2 [contents] - 2010
- [c42]Daniele Ludovici, Alessandro Strano, Georgi Nedeltchev Gaydadjiev, Luca Benini, Davide Bertozzi:
Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs. DATE 2010: 679-684 - [c41]Alessandro Strano, Carles Hernández, Federico Silla, Davide Bertozzi:
Process variation and layout mismatch tolerant design of source synchronous links for GALS networks-on-chip. SoC 2010: 43-48 - [c40]Daniele Ludovici, Georgi Nedeltchev Gaydadjiev, Francisco Gilabert Villamón, María Engracia Gómez, Davide Bertozzi:
Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology. NoCArc@MICRO 2010: 37-42 - [c39]