29. ARCS 2016: Nuremberg, Germany

Configurable and In-Memory Accelerators

Network-on-Chip and Secure Computing Architectures

Cache Architectures and Protocols

Mapping of Applications on Heterogeneous Architectures and Real-Time Tasks on Multiprocessors

All About Time: Timing, Tracing, and Performance Modeling

Approximate and Energy-Efficient Computing

Allocation: From Memories to FPGA Hardware Modules

Organic Computing Systems

Reliability Aspects in NoCs, Caches, and GPUs

maintained by Schloss Dagstuhl LZI at University of Trier