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ORCIDVLSIC 2015: Kyoto, Japan
- Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. IEEE 2015, ISBN 978-4-86348-502-0
- Myungjoon Choi, Junhua Gu, David T. Blaauw, Dennis Sylvester:
Wide input range 1.7μW 1.2kS/s resistive sensor interface circuit with 1 cycle/sample logarithmic sub-ranging. 330- - Scott Sills, Shuichiro Yasuda, Alessandro Calderoni, Christopher Cardon, Jonathan Strand, Katsuhisa Aratani, Nirmal Ramaswamy:
Challenges for high-density 16Gb ReRAM with 27nm technology. 106- - Yukihiro Sasagawa, Atsuhiro Mori:
High-level video analytics PC subsystem using SoC with heterogeneous multi-core architecture. 148- - Kyeongryeol Bong, Injoon Hong, Gyeonghoon Kim, Hoi-Jun Yoo:
A 0.5-degree error 10mW CMOS image sensor-based gaze estimation processor with logarithmic processing. 46- - Joonseok Yang, Minbok Lee, Myeong-Jae Park, Sung-Youb Jung, Jaeha Kim:
A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications. 282- - Kaiyuan Yang
, David T. Blaauw, Dennis Sylvester:
A robust -40 to 120°C all-digital true random number generator in 40nm CMOS. 248- - Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic:
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. 316- - Atsutake Kosuge, Junki Hashiba, Toru Kawajiri, So Hasegawa, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda, Ken Takeuchi:
Inductively-powered wireless solid-state drive (SSD) system with merged error correction of high-speed non-contact data links and NAND flash memory. 128- - Kazuo Yano, Tomoaki Akitomi, Koji Ara, Jun-ichiro Watanabe, Satomi Tsuji, Nobuo Sato, Miki Hayakawa, Norihiko Moriwaki:
Profiting from IoT: The key is very-large-scale happiness integration. 24- - Koichi Ishida, Reza Shabanpour, Tilo Meister, Bahman Kheradmand Boroujeni, Corrado Carta, Luisa Petti, Niko Münzenrieder, Giovanni A. Salvatore, Gerhard Tröster, Frank Ellinger:
15 dB Conversion gain, 20 MHz carrier frequency AM receiver in flexible a-IGZO TFT technology with textile antennas. 194- - Bongjin Kim, Somnath Kundu, Chris H. Kim:
A 0.4-1.6GHz spur-free bang-bang digital PLL in 65nm with a D-flip-flop based frequency subtractor circuit. 140- - Sae Kyu Lee, Tao Tong, Xuan Zhang, David M. Brooks, Gu-Yeon Wei:
A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter. 318- - Sohmyung Ha, Abraham Akinin, Jongkil Park, Chul Kim, Hui Wang, Christoph Maier, Gert Cauwenberghs, Patrick P. Mercier:
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation. 106- - Shunichi Wakashima, Fumiaki Kusuhara, Rihito Kuroda, Shigetoshi Sugawa:
A linear response single exposure CMOS image sensor with 0.5e- readout noise and 76ke- full well capacity. 88- - Alessandro Cevrero, Cosimo Aprile, Pier Andrea Francese, Urs Bapst, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Lukas Kull, Hazar Yueksel, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher, Thomas Toifl:
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS. 228- - Kuan-I Wu, I-Shing Shen, Christina F. Jou, Charlie Chung-Ping Chen:
A -194 dBc/Hz FOM interactive current-reused QVCO (ICR-QVCO) with capacitor-coupling self-switching sinusoidal current biasing (CSSCB) phase noise reduction technique. 236- - Christian Bachmann, Maja Vidojkovic, Xiongchuan Huang, Maarten Lont, Yao-Hong Liu, Ming Ding, Benjamin Busze, Jordy Gloudemans, Hans Giesen, Adnane Sbai, Gert-Jan van Schaik, Nauman F. Kiyani, Kouichi Kanda, Kazuaki Oishi, Shoichi Masui, Kathleen Philips, Harmke de Groot:
A 3.5mW 315/400MHz IEEE802.15.6/proprietary mode digitally-tunable radio SoC with integrated digital baseband and MAC processor in 40nm CMOS. 94- - Kyung-Hoae Koo, Liqiong Wei, John Keane, Uddalak Bhattacharya, Eric A. Karl, Kevin Zhang:
A 0.094um2 high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV VMIN with read and write assist. 266- - Jo De Boeck:
IoT: The Impact of Things. 82- - Masayuki Takemura, Takeshi Shima, Shoji Muramatsu:
Embedded image recognition systems for advanced safety vehicles. 146- - Saurabh Saxena, Guanghua Shu, Romesh Kumar Nandwana, Mrunmay Talegaonkar, Ahmed Elkholy, Tejasvi Anand, Seong Joong Kim, Woo-Seok Choi, Pavan Kumar Hanumolu:
A 2.8mW/Gb/s 14Gb/s serial link transceiver in 65nm CMOS. 352- - Taewook Kim, Changsok Han, Nima Maghari:
A 7.2 mW 75.3 dB SNDR 10 MHz BW CT delta-sigma modulator using Gm-C-based noise-shaped quantizer and digital integrator. 258- - Paul N. Whatmough, George Smart, Shidhartha Das, Yiannis Andreopoulos, David M. Bull:
A 0.6V all-digital body-coupled wakeup transceiver for IoT applications. 98- - Adam E. Mendrela, Jihyun Cho, Jeffrey A. Fredenburg, Cynthia A. Chestek, Michael P. Flynn, Euisik Yoon:
Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression. 108- - Myungjoon Choi, Suyoung Bang, Tae-Kwang Jang, David T. Blaauw, Dennis Sylvester:
A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability. 238- - Hirohisa Hirukawa:
Robotics for innovation. 2- - Koji Takinami, Naganori Shirakata, Koichiro Tanaka, Takayuki Tsukizawa, Hiroyuki Motozuka, Yohei Morishita, Kenji Miyanaga, Takenori Sakamoto, Tomoya Urushihara, Masashi Kobayashi, Hiroshi Takahashi, Masatake Irie, Hiroyuki Yoshikawa, Atsushi Yoshimoto, Maki Nakamura, Takeaki Watanabe, Hiroshi Komori, Noriaki Saito:
A 60GHz wireless transceiver employing hybrid analog/digital beamforming with interference suppression for multiuser gigabit/s radio access. 306- - Guowen Wei, Pradeep Shettigar, Feng Su, Xinyu Yu, Tom Kwan:
A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time ΔΣ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer. 292- - Osama Elhadidy, Ashkan Roshan-Zamir, Hae-Woong Yang, Samuel Palermo:
A 32 Gb/s 0.55 mW/Gbps PAM4 1-FIR 2-IIR tap DFE receiver in 65-nm CMOS. 224- - Lingyu Hong, Simon McManus, Haw Yang, Kaushik Sengupta:
A fully integrated CMOS fluorescence biosensor with on-chip nanophotonic filter. 206- - Dejan Rozgic, Dejan Markovic:
A 0.78mW/cm2 autonomous thermoelectric energy-harvester for biomedical sensors. 278- - Ankireddy Nalamalpu, Nasser A. Kurd, Anant Deval, Christopher Mozak, Jonathan Douglas, Ashish Khanna, Fabrice Paillet, Gerhard Schrom, Boyd Phelps:
Broadwell: A family of IA 14nm processors. 314- - Dongjoo Shin, Injoon Hong, Gyeonghoon Kim, Hoi-Jun Yoo:
A 33 nJ/vector descriptor generation processor for low-power object recognition. 52- - Pouya Hashemi, Takashi Ando, Karthik Balakrishnan, John Bruley, Sebastian U. Engelmann, John A. Ott, Vijay Narayanan, D.-G. Park, Renee T. Mo, Effendi Leobandung:
High-mobility high-Ge-content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width. 16- - Bardia Bozorgzadeh, Douglas R. Schuweiler, Martin J. Bobák, Paul A. Garris, Pedram Mohseni:
Neurochemical thermostat: A neural interface SoC with integrated chemometrics for closed-loop regulation of brain dopamine. 110- - Chang-Kyo Lee, Min-Su Ahn, Daesik Moon, Kiho Kim, Yoon-Joo Eom, Won-Young Lee, Jongmin Kim, Sanghyuk Yoon, Baekkyu Choi, Seokhong Kwon, Joon-Young Park, Seung-Jun Bae, Yong-Cheol Bae, Jung-Hwan Choi, Seong-Jin Jang, Gyo-Young Jin:
A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface. 182- - Liechao Huang, Josue Sanz-Robinson, Tiffany Moy, Yingzhe Hu, Warren Rieutort-Louis, Sigurd Wagner, James C. Sturm, Naveen Verma:
Reconstruction of multiple-user voice commands using a hybrid system based on thin-film electronics and CMOS. 196- - Iman Madadi, Massoud Tohidian, Koen Cornelissens, Patrick Vandenameele, Robert Bogdan Staszewski:
A TDD/FDD SAW-less superheterodyne receiver with blocker-resilient band-pass filter and multi-stage HR in 28nm CMOS. 308- - Zhijie Chen, Masaya Miyahara, Akira Matsuzawa:
A 9.35-ENOB, 14.8 fJ/conv.-step fully-passive noise-shaping SAR ADC. 64- - Supreet Jeloka, Naveen Akesh, Dennis Sylvester, David T. Blaauw:
A configurable TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell. 272- - Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, W. Boullart, E. Vecchio, T. Vandeweyer, T. Witters, D. Crotti, M. Jurczak, S. Fujii, S. Ito, Y. Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda:
Highly reliable TaOx ReRAM with centralized filament for 28-nm embedded application. 14- - Zhiqiang Huang, Howard Cam Luong:
A dithering-less 54.79-to-63.16GHz DCO with 4-Hz frequency resolution using an exponentially-scaling C-2C switched-capacitor ladder. 234- - Makoto Ueki, K. Takeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi:
Low-power embedded ReRAM technology for IoT applications. 108- - Masayuki Ikebe, Daisuke Uchida, Yasuhiro Take, Makito Someya, Satoshi Chikuda, Kento Matsuyama, Tetsuya Asai, Tadahiro Kuroda, Masato Motomura:
Image sensor/digital logic 3D stacked module featuring inductive coupling channels for high speed/low-noise image transfer. 82- - Jaeduk Han, Yue Lu, Nicholas Sutardja, Kwangmo Jung, Elad Alon:
A 60Gb/s 173mW receiver frontend in 65nm CMOS technology. 230- - Yasumasa Tsukamoto, Masao Morimoto, Makoto Yabuuchi, Miki Tanaka, Koji Nii:
1.8 Mbit/mm2 ternary-CAM macro with 484 ps search access time in 16 nm Fin-FET bulk CMOS technology. 274- - Xuan Zhang, Mario Lok, Tao Tong, Simon Chaput, Sae Kyu Lee, Brandon Reagen, Hyunkwang Lee, David M. Brooks, Gu-Yeon Wei:
A multi-chip system optimized for insect-scale flapping-wing robots. 152- - Dina El-Damak, Anantha P. Chandrakasan:
Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power. 280- - Philippe Magarshack:
Breakthrough technologies and reference designs for new IoT applications. 42- - Yuan Gao, Lisong Li, Philip K. T. Mok:
A 5.5W AC input converter-free LED driver with 82% low-frequency-flicker reduction, 88.2% efficiency and 0.92 power factor. 286- - Suyoung Bang, Jae-sun Seo, Inhee Lee, Seokhyeon Jeong, Nathaniel Ross Pinckney, David T. Blaauw, Dennis Sylvester, Leland Chang:
A fully-integrated 40-phase flying-capacitance-dithered switched-capacitor voltage regulator with 6mV output ripple. 336- - Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan:
4.2 pW timer for heavily duty-cycled systems. 240- - Nam-Seog Kim, Jan M. Rabaey:
A 1Gb/s energy efficient triple-channel UWB-based cognitive radio. 96- - Sebastian Loeda, Jeffrey Harrison, Franck Pourchet, Andrew Adams:
A 10/20/30/40 MHz feed-forward FIR DAC continuous-time ΔΣ ADC with robust blocker performance for radio receivers. 262- - Carlos Briseno-Vidrios, Alexander Edward, Ayman Shafik, Samuel Palermo, José Silva-Martínez:
A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique. 254- - Tadaaki Yamauchi, Hiroyuki Kondo, Koji Nii:
Automotive low power technology for IoT society. 80- - Tsung-Kai Kao, Ping Chen, Jui-Yuan Tsai, Pao-Cheng Chiu:
A 16nm FinFet 19/39MHz 78/72dB DR noise-injected aggregated CTSDM ADC for configurable LTE advanced CCA/NCCA Application. 260- - Alireza Sharif Bakhtiar, Anthony Chan Carusone:
A 19.6-Gbps CMOS optical receiver with local feedback IIR DFE. 116- - Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae:
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards. 212- - Wooyeol Choi, Zeshan Ahmad, Amit Jha, Ja-Yol Lee, Insoo Kim, Kenneth K. O:
410-GHz CMOS imager using a 4th sub-harmonic mixer with effective NEP of 0.3 fW/Hz0.5 at 1-kHz noise bandwidth. 302- - Geert Hellings, Mirko Scholz, Mikael Detalle, Dimitrios Velenis, Muriel de Potter de ten Broeck, C. Roda Neve, Y. Li, Stefaan Van Huylenbroeck, Shih-Hung Chen, Erik Jan Marinissen, Antonio La Manna, Geert Van der Plas, Dimitri Linten, Eric Beyne, Aaron Thean:
Active-lite interposer for 2.5 & 3D integration. 222- - Gerard Villar Piqué, Henk Jan Bergveld, Ravi Karadi:
A 1W 8-ratio switched-capacitor boost power converter in 140nm CMOS with 94.5% efficiency, 0.5mm thickness and 8.1mm2 PCB area. 338- - Matthew J. Turnquist, Markus Hiienkari, Jani Mäkipää, Ruzica Jevtic, Elina Pohjalainen, Tanja Kallio, Lauri Koskinen:
Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery. 320- - Kiarash Gharibdoust, Armin Tajalli, Yusuf Leblebici:
A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS. 180- - Takayuki Onishi, Takashi Sano, Yukikuni Nishida, Kazuya Yokohari, Jia Su, Ken Nakamura, Koyo Nitta, Kimiko Kawashima, Jun Okamoto, Naoki Ono, Ritsu Kusaba, Atsushi Sagata, Hiroe Iwasaki, Mitsuo Ikeda, Atsushi Shimizu:
Single-chip 4K 60fps 4: 2: 2 HEVC video encoder LSI with 8K scalability. 54- - Hae-Kang Jung, Jaemo Yang, Jeonghun Lee, Hyeongjun Ko, Hyuk Lee, Taeksang Song, Jongjoo Shim, Sangkwon Lee, Keunsoo Song, Dongkyun Kim, Hyungsoo Kim, Yunsaing Kim:
A 4.35Gb/s/pin LPDDR4 I/O interface with multi-VOH level, equalization scheme, and duty-training circuit for mobile applications. 184- - Chun C. Lee, Cho-Ying Lu, Ramya Narayanaswamy, Jad B. Rizk:
A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS. 62- - Ting-Kuei Kuan, Shen-Iuan Liu:
A digital bang-bang phase-locked loop with automatic loop gain control and loop latency reduction. 138- - Saleh Heidary Shalmany, Gottfried Beer, Dieter Draxelmayr, Kofi A. A. Makinwa:
A fully integrated ±5A current-sensing system with ±0.25% gain error and 12μΑ offset from -40°C to +85°C. 298- - Sungchun Jang, Sungwoo Kim, Sang-Hyeok Chu, Gyu-Seob Jeong, Yoonsoo Kim, Deog-Kyoon Jeong:
An all-digital bang-bang PLL using two-point modulation and background gain calibration for spread spectrum clock generation. 136- - Yongsu Lee, Kiseok Song, Hoi-Jun Yoo:
A 4.84mW 30fps dual frequency division multiplexing electrical impedance tomography SoC for lung ventilation monitoring system. 204- - Senju Yamazaki, Shuhei Tanakamaru, Sakuya Suzuki, Tomoko Ogura Iwasaki, Shogo Hachiya, Ken Takeuchi:
Reliability enhancement of 1Xnm TLC for cold flash and millennium memories. 112- - Tamer A. Ali, Lakshmi P. Rao, Ullas Singh, Mohammed M. Abdul-Latif, Yang Liu, Amr Amin Hafez, Henry Park, Anand Vasani, Zhi Huang, Arvindh Iyer, Bo Zhang, Afshin Momtaz, Namik Kocaman:
A 3.8 mW/Gbps quad-channel 8.5-13 Gbps serial link with a 5-tap DFE and a 4-tap transmit FFE in 28 nm CMOS. 348- - Tejasvi Anand, Kofi A. A. Makinwa, Pavan Kumar Hanumolu:
A self-referenced VCO-based temperature sensor with 0.034°C/mV supply sensitivity in 65nm CMOS. 200- - Shuhei Tanakamaru, Hiroki Yamazawa, Ken Takeuchi:
Privacy-protection solid-state storage (PP-SSS) system: Automatic lifetime management of internet-data's right to be forgotten. 130- - Jung Kuk Kim, Phil Knag, Thomas Chen, Zhengya Zhang:
A 640M pixel/s 3.65mW sparse event-driven neuromorphic object recognition processor with on-chip learning. 50- - An Steegen:
Technology innovation in an IoT Era. 170- - Ming-Shuan Chen, Mau-Chung Frank Chang, Chih-Kong Ken Yang:
A low-PDP and low-area repeater using passive CTLE for on-chip interconnects. 244- - Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester:
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. 48- - Si-Duk Sung, Sung-Wan Hong, Jun-Suk Bang, Ji-Seon Paek, Seung-Chul Lee, Thomas Byunghak Cho, Gyu-Hyeong Cho:
86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor. 342- - Jiangfeng Wu, Giuseppe Cusmai, Acer Wei-Te Chou, Tao Wang, Bo Shen, Vijayaramalingam Periasamy, Ming-Hung Hsieh, Chun-Ying Chen, Lin He, Loke Tan, Aravind Padyana, Cheng-Hsun Yang, Gregory Unruh, Jackie Koon Lun Wong, Juo-Jung Hung, Massimo Brandolini, Sha-Ting Lin, Xi Chen, Yen Ding, Yen-Jen Ko, Young Shin, Ada Hing T. Hung, Binning Chen, Cynthia Dang, Deepak Lakshminarasimhan, Iris Hong Liu, Jerry Lin, Kowen Lai, Larry Wassermann, Ayaskant Shrivastava, Chi-Ming Hsiao, Chun-Sheng Huang, Jianlong Chen, Lakshminarasimhan Krishnan, Ning-Yi Wang, Pin-En Su, Tianwei Li, Wei-Ta Shih, Yau-Cheng Yang, Peter Cangiane, Randall Perlow, William Ngai, Hung Sen Huang, James Y. C. Chang, Xicheng Jiang, Ardie G. Venes, Ramon Gomez:
A 2.7mW/Channel 48-to-1000MHz Direct Sampling Full-Band Cable Receiver. 214- - Adam Fuks:
Sensor-hub sweet-spot analysis for ultra-low-power always-on operation. 154- - Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo:
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS. 158- - Seung Chul Song, J. Xu, N. N. Mojumder, K. Rim, D. Yang, Jerry Bao, J. Zhu, Joseph Wang, Mustafa Badaroglu, V. Machkaoutsan, Praneeth Narayanasetti, B. Bucki, Jeff Fischer, Geoffrey Yeap:
Holistic technology optimization and key enablers for 7nm mobile SoC. 198- - Sarvesh H. Kulkarni, Zhanping Chen, Balaji Srinivasan, Brian Pedersen, Uddalak Bhattacharya, Kevin Zhang:
Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process. 174- - Fang-Li Yuan, Rakesh Kumar Palani, Sina Basir-Kazeruni, Hundo Shin, Anindya Saha, Ramesh Harjani, Dejan Markovic:
A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS. 150- - Joseph Palackal Mathew, Long Kong, Behzad Razavi:
A 12-bit 200-MS/s 3.4-mW CMOS ADC with 0.85-V supply. 66- - Yosuke Bando, Konosuke Watanabe, Ken-ichi Maeda, Hiroki Kudo, Masahiro Ishiyama, Atsushi Kunimatsu, Hiroto Nakai, Masafumi Takahashi, Yukihito Oowaki:
Caching mechanisms towards single-level storage systems for Internet of Things. 132- - Wei-Hsuan Wu, Wei-Cheng Sun, Chia-Hsiang Yang, Yeong-Luh Ueng:
A 794Mbps 135mW iterative detection and decoding receiver for 4×4 LDPC-coded MIMO systems in 40nm. 102- - Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper:
A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR. 350- - Mahmood Khayatzadeh, Fabio Frustaci, David T. Blaauw, Dennis Sylvester, Massimo Alioto:
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS. 270- - Yukihide Tsuji, Xu Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Nobuyuki Sugii, Hiromitsu Hada:
Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM. 86- - Y.-S. Shu, Naveen Verma, K. Yano, T. Someya, H.-J. Yoo, Karthik Vasanth, David T. Blaauw, L. Krishnamurthy, S. J. Kim:
Circuits evening panel discussion 2: Wearable electronics: Still an oasis or just a mirage for the semiconductor industry? 222- - Loai G. Salem, Patrick P. Mercier:
A battery-connected 24-ratio switched capacitor PMIC achieving 95.5%-efficiency. 340- - Toru Kondo, Yoshiaki Takemoto, Kenji Kobayashi, Mitsuhiro Tsukimura, Naohiro Takazawa, Hideki Kato, Shunsuke Suzuki, Jun Aoki, Haruhisa Saito, Yuichi Gomi, Seisuke Matsuda, Yoshitaka Tadaki:
A 3D stacked CMOS image sensor with 16Mpixel global-shutter mode and 2Mpixel 10000fps mode using 4 million interconnections. 90- - Shang-Fu Yeh, Kuo-Yu Chou, Honyih Tu, Calvin Yi-Ping Chao, Fu-Lung Hsueh:
A 0.66e-rms temporal-readout-noise 3D-stacked CMOS image sensor with conditional correlated multiple sampling (CCMS) technique. 84- - Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper:
A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. 346- - Neha Sinha, Mansour Rachid, Sudhakar Pamarti:
A sharp programmable passive filter based on filtering by Aliasing. 58- - Swaminathan Sankaran, Bradley Kramer, Gregory Howard, Benjamin Sutton, Randall Walberg, Vijaylaxmi Khanolkar, Robert Payne, Mark Morgan:
An efficient and resilient ultra-high speed galvanic data isolator leveraging broad-band multi resonant tank electro-magnetic coupling. 210- - Karthikeyan Reddy, Siladitya Dey, Sachin Rao, Brian Young, Praveen Prabha, Pavan Kumar Hanumolu:
A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS. 256- - Jun-Chau Chien, Erh-Chia Yeh, Luke P. Lee, Mekhail Anwar, Ali M. Niknejad:
A near-field modulation chopping stabilized injection-locked oscillator sensor for protein conformation detection at microwave frequency. 332- - Daisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Hideo Sato, Shunsuke Fukami, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu:
Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure. 172- - Pei-Wen Luo, Chi-Kang Chen, Yu-Hui Sung, Wei Wu, Hsiu-Chuan Shih, Chia-Hsin Lee, Kuo-Hua Lee, Ming-Wei Li, Mei-Chiang Lung, Chun-Nan Lu, Yung-Fa Chou, Po-Lin Shih, Chung-Hu Ke, Chun Shiah, Patrick Stolt, Shigeki Tomishima, Ding-Ming Kwai, Bor-Doou Rong, Nicky Lu, Shih-Lien Lu, Cheng-Wen Wu:
A computer designed half Gb 16-channel 819Gb/s high-bandwidth and 10ns low-latency DRAM for 3D stacked memory devices using TSVs. 186- - Gil Engel, Martin Clara, Haiyang Zhu, Paul Wilkins:
A 16-bit 10Gsps current steering RF DAC in 65nm CMOS achieving 65dBc ACLR multi-carrier performance at 4.5GHz Fout. 166- - Sang Min Lee, Dongwon Seo, Shahin Mehdizad Taleie, Derui Kong, Michael Joseph McGowan, Tongyu Song, Ganesh R. Saripalli, Jenny Kuo, Seyfi S. Bazarjani:
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture. 164- - Albert Yen-Chih Chiou, Chih-Cheng Hsieh:
A 0.4V self-powered CMOS imager with 140dB dynamic range and energy harvesting. 86- - Yida Duan, Elad Alon:
A 6b 46GS/s ADC with >23GHz BW and sparkle-code error correction. 162- - Hyeongseok Kim, Gyouho Kim, Yoonmyung Lee, Zhiyoong Foo, Dennis Sylvester, David T. Blaauw, David D. Wentzloff:
A 10.6mm3 fully-integrated, wireless sensor node with 8GHz UWB transmitter. 202- - Rajiv V. Joshi, Matthew M. Ziegler, Holger Wetter, C. Wandel, Herschel A. Ainspan:
14nm FinFET based supply voltage boosting techniques for extreme low Vmin operation. 268- - Chia-Hong Jan, F. Al-amoody, H.-Y. Chang, T. Chang, Y.-W. Chen, N. Dias, Walid M. Hafez, Doug B. Ingerly, M. Jang, Eric Karl, S. K.-Y. Shi, K. Komeyli, H. Kilambi, A. Kumar, K. Byon, C.-G. Lee, J. Lee, T. Leo, P.-C. Liu, N. Nidhi, R. Olac-vaw, C. Petersburg, K. Phoa, Chetan Prasad, C. Quincy, R. Ramaswamy, T. Rana, L. Rockford, Aravinth Subramaniam, C. Tsai, Peter Vandervoorn, L. Yang, A. Zainuddin, Peng Bai:
A 14 nm SoC platform technology featuring 2nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized for low power, high performance and high density SoC products. 12- - N. N. Mojumder, Seung Chul Song, K. Rim, J. Xu, Joseph Wang, J. Zhu, Milena Vratonjic, K. Lin, Martin Saint-Laurent, Paul Bassett, Geoffrey Yeap:
Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization. 84- - Cimang Lu, Choong Hyun Lee, Tomonori Nishimura, Akira Toriumi:
Design and demonstration of reliability-aware Ge gate stacks with 0.5 nm EOT. 18- - Sung-Wan Hong, Gyu-Hyeong Cho:
7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin. 296- - Chul Kim, Siddharth Joshi, Chris M. Thomas, Sohmyung Ha, Abraham Akinin, Lawrence E. Larson, Gert Cauwenberghs:
A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW. 304- - Jri Lee, Ping-Chuan Chiang, Chih-Chi Weng:
56Gb/s PAM4 and NRZ SerDes transceivers in 40nm CMOS. 118- - Babar Hussain, Fengyu Che, Feng Zhang, Tak-Sang Yim, Lin Cheng, Wing-Hung Ki, C. Patrick Yue, Liang Wu:
A fully integrated IEEE 802.15.7 visible light communication transmitter with on-chip 8-W 85% efficiency boost LED driver. 216- - Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon:
Toward 1024-channel parallel neural recording: Modular Δ-ΔΣ analog front-end architecture with 4.84fJ/C-s·mm2 energy-area product. 112- - João L. A. de Melo, João Goes, Nuno Paulino:
A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW. 290- - Mina Kim, Seojin Choi, Jaehyouk Choi:
A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells. 142- - Chul Kim, Sohmyung Ha, Jiwoong Park, Abraham Akinin, Patrick P. Mercier, Gert Cauwenberghs:
A 144MHz integrated resonant regulating rectifier with hybrid pulse modulation. 284- - Abishek Manian, Behzad Razavi:
A 40-Gb/s 9.2-mW CMOS equalizer. 226- - Albert Lee, Meng-Fan Chang, Chien-Chen Lin, Chien-Fu Chen, Mon-Shu Ho, Chia-Chen Kuo, Pei-Ling Tseng, Shyh-Shyuan Sheu, Tzu-Kun Ku:
RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications. 76- - Pascal Urard, G. Romagnello, Andrei Banciu, J. C. Grasset, V. Heinrich, Mounir Boulemnakher, F. Todeschni, Laurent Damon, Roberto Guizzetti, L. Andre, Andreia Cathelin:
A self-powered IPv6 bidirectional wireless sensor & actuator network for indoor conditions. 100- - David Shan, Phillip J. Restle, Doug Malone, Robert A. Groves, Eric Lai, Michael Koch, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot:
Resonant clock mega-mesh for the IBM z13TM. 322- - P. Yue, Bing J. Sheu, A. Matsuzawa, K. Asada, L. Loh, Kofi A. A. Makinwa, Shekhar Borkar, Vladimir Stojanovic:
Circuits evening panel discussion 1: Is university circuit design research and education keeping up with industry needs? 220- - Shengshuo Lu, Zhengya Zhang, Marios C. Papaefthymiou:
1.32GHz high-throughput charge-recovery AES core with resistance to DPA attacks. 246- - Takashi Takenaka, Hiroaki Inoue, Takeo Hosomi, Yuichi Nakamura:
FPGA-accelerated complex event processing. 126- - Kevin Tien, Noah Sturcken, Naigang Wang, Jae-Woong Nah, Bing Dang, Eugene J. O'Sullivan, Paul S. Andry, Michele Petracca, Luca P. Carloni, William J. Gallagher, Kenneth L. Shepard:
An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors. 192- - Eric Shiu, Simon Prakash:
System challenges and hardware requirements for future consumer devices: From wearable to ChromeBooks and devices in-between. 1-5 - Liang Wu, Xianbo Li, Wing Cheung Chong, Zhaojun Liu, Fengyu Che, Babar Hussain, Kei May Lau, C. Patrick Yue:
An AMLED microdisplay driver SoC with built-in 1.25-Mb/s VLC transmitter. 328- - Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis:
A 3-10fJ/conv-step 0.0032mm2 error-shaping alias-free asynchronous ADC. 160- - N. Sugii, G. Jurczak, Masanao Yamaoka, A. Molnar, J. Tham, T. Piliszczuk, O. Nalamasu, J. Hausner, Shu Tanaka, Tadaaki Yamauchi, S. Sivaram, C. Diaz, W. Dai:
Technology/circuits joint evening panel discussion semiconductor industry in 2020: Evolution or revolution? 22- - Seokhyeon Jeong, Wanyeong Jung, Dongsuk Jeon, Omer Berenfeld, Hakan Oral, Grant H. Kruger, David T. Blaauw, Dennis Sylvester:
A 120nW 8b sub-ranging SAR ADC with signal-dependent charge recycling for biomedical applications. 60- - Jun-Suk Bang, Hyunsik Kim, Sang-Hui Park, Kiduk Kim, Sung-Won Choi, Ohjo Kwon, Choongsun Shin, Joohyung Lee, Gyu-Hyeong Cho:
Hybrid driver IC for real-time TFT non-uniformity compensation of ultra high-definition AMOLED display. 326- - Hiroaki Yoda, E. Kitagawa, Naoharu Shimomura, S. Fujita, Minoru Amano:
The progresses of MRAM as a memory to save energy consumption and its potential for further reduction. 104- - Michael Fausten, Thorsten Huck, Armin Ruhle, Tuelin Baysal, Robert Kornhaas:
Automated driving - Impacts on the vehicle architecture. 28- - Chen Sun, Mark T. Wade, Michael Georgas, Sen Lin, Luca Alloatti, Benjamin Moss, Rajesh Kumar, Amir Atabaki, Fabio Pavanello, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic:
A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning. 122- - Imran Ahmed, James A. Cherry, Ayaz Hasan, Akram Nafee, David Halupka, Younis Allasasmeh, W. Martin Snelgrove:
A low-power Gm-C-based CT-ΔΣ audio-band ADC in 1.1V 65nm CMOS. 294- - Zeshan Ahmad, Kenneth K. O:
0.65-0.73THz quintupler with an on-chip antenna in 65-nm CMOS. 310- - Shih-Hao Huang, Wei-Zen Chen:
A 25-Gb/s, -10.8-dBm input sensitivity, PD-bandwidth tolerant CMOS optical receiver. 120- - Jiangyi Li, Mingoo Seok:
A 3.07μm2/bitcell physically unclonable function with 3.5% and 1% bit-instability across 0 to 80°C and 0.6 to 1.2V in a 65nm CMOS. 250-
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