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2020 – today
- 2024
[i3]Tzu-Chien Hsueh, Yeshaiahu Fainman, Bill Lin:
Monolithic Silicon-Photonics Linear-Algebra Accelerators Enabling Next-Gen Massive MIMO. CoRR abs/2402.08192 (2024)- [i2]Sumilak Chaudhury, Karl Johnson, Chengkuan Gao, Bill Lin, Yeshaiahu Fainman, Tzu-Chien Hsueh:
Micro-Ring Modulator Linearity Enhancement for Analog and Digital Optical Links. CoRR abs/2407.11172 (2024) - 2023
- [j7]Ruoman Yang, Tony Wu, Tzu-Chien Hsueh
:
A High-Accuracy Single-Photon Time-Interval Measurement in Mega-Hz Detection Rates With Collaborative Variance Reduction: Theoretical Analysis and Realization Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 176-189 (2023) - [i1]Tzu-Chien Hsueh, Yeshaiahu Fainman, Bill Lin:
ChatGPT at the Speed of Light: Optical Comb-Based Monolithic Photonic-Electronic Linear-Algebra Accelerators. CoRR abs/2311.11224 (2023) - 2022
- [j6]Tony Wu, Ruoman Yang, Tzu-Chien Hsueh:
Random Sampling-and-Averaging Techniques for Single-Photon Arrival-Time Detections in Quantum Applications: Theoretical Analysis and Realization Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1452-1465 (2022)
2010 – 2019
- 2019
- [j5]Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper:
A Low-Power Bidirectional Link With a Direct Data-Sequencing Blind Oversampling CDR. IEEE J. Solid State Circuits 54(6): 1669-1681 (2019) - 2015
- [j4]Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper:
An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements. IEEE J. Solid State Circuits 50(7): 1711-1721 (2015) - [c8]Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper:
A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. VLSIC 2015: 346- - [c7]Sudip Shekhar, Rajesh Inti, James E. Jaussi, Tzu-Chien Hsueh, Bryan Casper:
A 1.2-5Gb/s 1.4-2pJ/b serial link in 22nm CMOS with a direct data-sequencing blind oversampling CDR. VLSIC 2015: 350- - 2014
- [j3]Tawfiq Musah, James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Gokce Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper:
A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS. IEEE J. Solid State Circuits 49(12): 3079-3090 (2014) - [c6]Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper:
An on-die all-digital power supply noise analyzer with enhanced spectrum measurements. ESSCIRC 2014: 251-254 - [c5]James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Tawfiq Musah, Gökçe Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper:
26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS. ISSCC 2014: 440-441 - [c4]Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper:
26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS. ISSCC 2014: 444-445 - 2013
- [j2]Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper:
A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. IEEE J. Solid State Circuits 48(12): 3229-3242 (2013) - [c3]Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper:
A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS. ISSCC 2013: 402-403 - 2010
- [j1]Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti:
A 3 , ˟, 3.8 Gb/s Four-Wire High Speed I/O Link Based on CDMA-Like Crosstalk Cancellation. IEEE J. Solid State Circuits 45(8): 1522-1532 (2010) - [c2]Tzu-Chien Hsueh, Sudhakar Pamarti:
A 16 Gb/s four-wire CDMA-based high speed I/O link with transmitter timing adjustment. CICC 2010: 1-4
2000 – 2009
- 2009
- [c1]Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti:
A 3×3.8Gb/s four-wire high speed I/O link based on CDMA-like crosstalk cancellation. CICC 2009: 121-124
Coauthor Index
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