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Ilter Özkaya
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2020 – today
- 2020
- [j7]Gain Kim, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg
, Thomas Toifl, Yusuf Leblebici, Lukas Kull, Danny Luu, Matthias Braendli
, Christian Menolfi, Pier Andrea Francese
, Hazar Yueksel, Cosimo Aprile, Thomas Morf:
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET. IEEE J. Solid State Circuits 55(1): 38-48 (2020)
2010 – 2019
- 2019
- [c21]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli
, Christian Menolfi, Pier Andrea Francese
, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Hyeon-Min Bae, Andreas Burg
, Thomas Toifl, Yusuf Leblebici:
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET. A-SSCC 2019: 239-240 - [c20]Alessandro Cevrero, Ilter Özkaya, Pier Andrea Francese
, Matthias Brändli
, Christian Menolfi, Thomas Morf, Marcel A. Kossel, Lukas Kull, Danny Luu, Martino Dazzi, Thomas Toifl:
A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET. ISSCC 2019: 112-114 - [c19]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli
, Christian Menolfi, Pier Andrea Francese
, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg
, Thomas Toifl, Yusuf Leblebici:
A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET. ISSCC 2019: 476-478 - 2018
- [j6]Cosimo Aprile, Alessandro Cevrero, Pier Andrea Francese
, Christian Menolfi, Matthias Braendli
, Marcel A. Kossel, Thomas Morf, Lukas Kull, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher
, Thomas Toifl:
An Eight-Lane 7-Gb/s/pin Source Synchronous Single-Ended RX With Equalization and Far-End Crosstalk Cancellation for Backplane Channels. IEEE J. Solid State Circuits 53(3): 861-872 (2018) - [j5]Jonathan E. Proesel
, Zeynep Toprak Deniz, Alessandro Cevrero, Ilter Özkaya
, Seongwon Kim, Daniel M. Kuchta
, Sungjae Lee
, Sergey V. Rylov
, Herschel A. Ainspan, Timothy O. Dickson
, John F. Bulzacchelli
, Mounir Meghelli:
A 32 Gb/s, 4.7 pJ/bit Optical Link With -11.7 dBm Sensitivity in 14-nm FinFET CMOS. IEEE J. Solid State Circuits 53(4): 1214-1226 (2018) - [j4]Ilter Özkaya, Alessandro Cevrero, Pier Andrea Francese
, Christian Menolfi, Thomas Morf, Matthias Braendli
, Daniel M. Kuchta, Lukas Kull, Christian W. Baks, Jonathan E. Proesel, Marcel A. Kossel, Danny Luu, Benjamin G. Lee, Fuad E. Doany, Mounir Meghelli, Yusuf Leblebici, Thomas Toifl:
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 53(4): 1227-1237 (2018) - [j3]Danny Luu, Lukas Kull, Thomas Toifl, Christian Menolfi, Matthias Braendli
, Pier Andrea Francese
, Thomas Morf, Marcel A. Kossel, Hazar Yueksel, Alessandro Cevrero, Ilter Özkaya, Qiuting Huang:
A 12-bit 300-MS/s SAR ADC With Inverter-Based Preamplifier and Common-Mode-Regulation DAC in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 53(11): 3268-3279 (2018) - [j2]Lukas Kull, Danny Luu, Christian Menolfi, Matthias Brändli
, Pier Andrea Francese
, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl:
A 24-72-GS/s 8-b Time-Interleaved SAR ADC With 2.0-3.3-pJ/Conversion and >30 dB SNDR at Nyquist in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 53(12): 3508-3516 (2018) - [c18]Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli
, Christian Menolfi, Pier Andrea Francese
, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl, Yusuf Leblebici:
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver. ISCAS 2018: 1-5 - [c17]Christian Menolfi, Matthias Braendli
, Pier Andrea Francese
, Thomas Morf, Alessandro Cevrero, Marcel A. Kossel, Lukas Kull, Danny Luu, Ilter Özkaya, Thomas Toifl:
A 112Gb/S 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOS. ISSCC 2018: 104-106 - [c16]Ilter Özkaya, Alessandro Cevrero, Pier Andrea Francese
, Christian Menolfi, Matthias Braendli
, Thomas Morf, Daniel M. Kuchta, Lukas Kull, Marcel A. Kossel, Danny Luu, Mounir Meghelli, Yusuf Leblebici, Thomas Toifl:
A 56Gb/s burst-mode NRZ optical receiver with 6.8ns power-on and CDR-Lock time for adaptive optical links in 14nm FinFET CMOS. ISSCC 2018: 266-268 - [c15]Lukas Kull, Danny Luu, Christian Menolfi, Matthias Braendli
, Pier Andrea Francese
, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl:
A 24-to-72GS/s 8b time-interleaved SAR ADC with 2.0-to-3.3pJ/conversion and >30dB SNDR at nyquist in 14nm CMOS FinFET. ISSCC 2018: 358-360 - [c14]Alessandro Cevrero, Ilter Özkaya, Thomas Morf, Thomas Toifl, M. Seifried, Frank Ellinger, Mohammad Mahdi Khafaji, Jan Plíva, Ronny Henker, Nikolay N. Ledentsov, J.-R. Kropp, V. A. Shchukin, M. Zoldak, L. Halmo, I. Eddie, Jaroslaw P. Turkiewicz:
4×40 Gb/s 2 pJ/bit Optical RX with 8ns Power-on and CDR-Lock Time in 14nm CMOS. OFC 2018: 1-3 - [c13]Thomas Toifl, Christian Menolfi, Matthias Brändli
, Alessandro Cevrero, Pier Andrea Francese
, Marcel A. Kossel, Lukas Kull, Danny Luu, Thomas Morf, Ilter Özkaya:
A 0.3PJ/Bit 112GB/S PAM4 1+0.5D TX-DFE Precoder and 8-Tap FFE in 14NM CMOS. VLSI Circuits 2018: 53-54 - [c12]Pier Andrea Francese
, Alessandro Cevrero, Ilter Özkaya, Matthias Brändli
, Christian Menolfi, Thomas Morf, Marcel A. Kossel, Lukas Kull, Danny Luu, Thomas Toifl:
A 50GB/S 1.6PJ/B RX Data-Path with Quarter-Rate 3-Tap Speculative DFE. VLSI Circuits 2018: 267-268 - [c11]Lukas Kull, Danny Luu, Christian Menolfi, Thomas Morf, Pier Andrea Francese
, Matthias Braendli
, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl:
A 10-Bit 20-40 GS/S ADC with 37 dB SNDR at 40 GHz Input Using First Order Sampling Bandwidth Calibration. VLSI Circuits 2018: 275-276 - 2017
- [j1]Ilter Özkaya
, Alessandro Cevrero, Pier Andrea Francese
, Christian Menolfi, Thomas Morf, Matthias Braendli
, Daniel M. Kuchta, Lukas Kull, Christian W. Baks, Jonathan E. Proesel, Marcel A. Kossel, Danny Luu, Benjamin G. Lee, Fuad E. Doany, Mounir Meghelli, Yusuf Leblebici, Thomas Toifl:
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 52(12): 3458-3473 (2017) - [c10]Marcel A. Kossel, Christian Menolfi, Pier Andrea Francese
, Lukas Kull, Thomas Morf, Thomas Toifl, Matthias Braendli
, Alessandro Cevrero, Danny Luu, Ilter Özkaya, Hazar Yueksel:
DDR4 transmitter with AC-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS technology. ESSCIRC 2017: 115-118 - [c9]Danny Luu, Lukas Kull, Thomas Toifl, Christian Menolfi, Matthias Braendli
, Pier Andrea Francese
, Thomas Morf, Marcel A. Kossel, Hazar Yueksel, Alessandro Cevrero, Ilter Özkaya, Qiuting Huang:
Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFET. ESSCIRC 2017: 183-186 - [c8]Ronny Henker, Thomas Toifl, Alessandro Cevrero, Ilter Oezkaya, Michael Georgiades
, Mahdi M. Khafaji, Jan Plíva, Frank Ellinger:
Adaptive high-speed and ultra-low power optical interconnect for data center communications. ICTON 2017: 1-4 - [c7]Lukas Kull, Danny Luu, Christian Menolfi, Matthias Braendli
, Pier Andrea Francese
, Thomas Morf, Marcel A. Kossel, Hazar Yueksel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl:
28.5 A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET. ISSCC 2017: 474-475 - [c6]Alessandro Cevrero, Ilter Özkaya, Pier Andrea Francese
, Christian Menolfi, Thomas Morf, Matthias Braendli
, Daniel M. Kuchta, Lukas Kull, Jonathan E. Proesel, Marcel A. Kossel, Danny Luu, Benjamin G. Lee, Fuad E. Doany, Mounir Meghelli, Yusuf Leblebici, Thomas Toifl:
29.1 A 64Gb/s 1.4pJ/b NRZ optical-receiver data-path in 14nm CMOS FinFET. ISSCC 2017: 482-483 - 2016
- [c5]Thomas Toifl, Matthias Braendli
, Alessandro Cevrero, Pier Andrea Francese
, Marcel A. Kossel, Lukas Kull, Danny Luu, Christian Menolfi, Thomas Morf, Ilter Özkaya, Hazar Yueksel:
Design considerations for 50G+ backplane links. ESSCIRC 2016: 477-482 - [c4]Pier Andrea Francese
, Matthias Braendli
, Christian Menolfi, Marcel A. Kossel, Thomas Morf, Lukas Kull, Alessandro Cevrero, Hazar Yueksel, Ilter Oezkaya, Danny Luu, Thomas Toifl:
23.6 A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-path. ISSCC 2016: 408-409 - 2015
- [c3]Alessandro Cevrero, Cosimo Aprile, Pier Andrea Francese
, U. Bapst, Christian Menolfi, Matthias Braendli
, Marcel A. Kossel, Thomas Morf, Lukas Kull, Hazar Yueksel, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher
, Thomas Toifl:
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS. VLSIC 2015: 228- - 2014
- [c2]Ilter Özkaya, Cagri Gurleyuk, Atilim Ergul, Arda Akkaya, Devrim Yilmaz Aksin
:
A 50V input range 14bit 250kS/s ADC with 97.8dB SFDR and 80.2dB SNR. ESSCIRC 2014: 71-74
2000 – 2009
- 2009
- [c1]Devrim Yilmaz Aksin
, Ilter Özkaya:
25V sampling switch for power management data converters in 0.35µm CMOS with DNMOS. ESSCIRC 2009: 136-139
Coauthor Index
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last updated on 2024-08-05 21:11 CEST by the dblp team
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