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Publication search results
found 212 matches
- 2022
- Qirui Zhang, Hyochan An, Zichen Fan, Zhehong Wang, Ziyun Li, Guanru Wang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence. VLSI Technology and Circuits 2022: 72-73 - Su-Hyun Han, Bumjun Kim, Seonghyeok Park, Yongjae Park, Jung-Hoon Chun, Jaehyuk Choi, Seong-Jin Kim:
A 100×80 CMOS Flash LiDAR Sensor with 0.0011mm2 In-Pixel Histogramming TDC Based on Analog Counter and Self-Calibrated Single-Slope ADC. VLSI Technology and Circuits 2022: 82-83 - Yusung Kim, Clifford Ong, Anandkumar Mahadevan Pillai, Harish Jagadeesh, Gwanghyeon Baek, Iqbal Rajwani, Zheng Guo, Eric Karl:
Energy-Efficient High Bandwidth 6T SRAM Design on Intel 4 CMOS Technology. VLSI Technology and Circuits 2022: 212-213 - Jaehoon Lee, Yong Lim, Jongmi Lee, Taejin Jang, Kwonwoo Kang, Jongpil Cho, Seunghyun Oh, Jongwoo Lee:
A 0.56mW 63.6dB SNDR 250MS/s SAR ADC in 8nm FinFET. VLSI Technology and Circuits 2022: 90-92 - Khandker Akif Aabrar, Sharadindu Gopal Kirtania, A. Lu, A. Khanna, Wriddhi Chakraborty, M. San Jose, Shimeng Yu, Suman Datta:
A Thousand State Superlattice(SL) FEFET Analog Weight Cell. VLSI Technology and Circuits 2022: 242-243 - Rohith Acharya, Anton Potocnik, Steven Brebels, Alexander Grill, Jeroen Verjauw, Tsvetan Ivanov, Daniel Perez Lozano, Danny Wan, Fahd A. Mohiyaddin, Jacques Van Damme, A. M. Vadiraj, Massimo Mongillo, Georges G. E. Gielen, Francky Catthoor, Jan Craninckx, Iuliana P. Radu, Bogdan Govoreanu:
Scalable 1.4 μW cryo-CMOS SP4T multiplexer operating at 10 mK for high-fidelity superconducting qubit measurements. VLSI Technology and Circuits 2022: 230-231 - Karim Ali Ahmed, Longyang Lin, Praveenakumar Shivappa Salamani, Massimo Alioto:
Imager with Dynamic LSB Adaptation and Ratiometric Readout for Low-Bit Depth 5-μW Peak Power in Purely-Harvested Systems. VLSI Technology and Circuits 2022: 50-51 - Tomohiro Akazawa, D. Wu, Kai Sumita, N. Sekine, Makoto Okano, Kasidit Toprasertpong, Shinichi Takagi, Mitsuru Takenaka:
Low-capacitance Ultrathin InGaAs Membrane Photodetector on Si Slot Waveguide towards Receiver-less System. VLSI Technology and Circuits 2022: 411-412 - Nail Etkin Can Akkaya, Gary Chan, Hung-Jen Liao, Yih Wang, Jonathan Chang:
A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology. VLSI Technology and Circuits 2022: 110-111 - Md Nur K. Alam, Yusuke Higashi, Brecht Truijen, Ben Kaczer, Mihaela Ioana Popovici, Bj O'Sullivan, Philippe Roussel, Robin Degraeve, Marc M. Heyns, Jan Van Houdt:
Insight to Data Retention loss in ferroelectric Hf0.5Zr0.5O2 pFET and nFET from simultaneous PV and IV measurements. VLSI Technology and Circuits 2022: 340-342 - Gabriele Atzeni, Rosario M. Incandela, Youngwoo Ji, Alessandro Novello, Hesam Ghiasi, Giorgio Cristiano, Jiawei Liao, Qiuting Huang, Taekwang Jang:
An Impedance-boosted Switched-capacitor Low-noise Amplifier Achieving 0.4 NEF. VLSI Technology and Circuits 2022: 116-117 - Gabriele Atzeni, Jongyup Lim, Jiawei Liao, Alessandro Novello, Jungho Lee, Eunseong Moon, Michael Barrow, Joseph G. Letner, Joseph T. Costello, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David T. Blaauw, Taekwang Jang:
A 260×274 μm2 572 nW Neural Recording Micromote Using Near-Infrared Power Transfer and an RF Data Uplink. VLSI Technology and Circuits 2022: 64-65 - Hong-Hyun Bae, Jeong-Hyun Cho, Gyeong-Gu Kang, Yousung Park, Hyun-Sik Kim:
A 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/μs DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique. VLSI Technology and Circuits 2022: 194-195 - Goeun Baek, Seunghun Bae, Minki Lee, Hyuncheol Park, Kangseop Lee, Jae-Yoon Sim, Moonjoo Lee, Ho-Jin Song:
13-K Tnoise Cryo-CMOS Parametric Amplifier at 80 mK for Quantum Computers. VLSI Technology and Circuits 2022: 236-237 - Mohammad Bagherbeik, Wentao Xu, Seyed Farzad Mousavi, Kouichi Kanda, Hirotaka Tamura, Ali Sheikholeslami:
MAQO: A Scalable Many-Core Annealer for Quadratic Optimization. VLSI Technology and Circuits 2022: 76-77 - Seungyeob Baik, Taeryoung Seol, Sehwan Lee, Geunha Kim, SeongHwan Cho, Arup K. George, Junghyup Lee:
A 2.54μJ∙ppm2-FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS. VLSI Technology and Circuits 2022: 114-115 - Martin van den Brink, Anthony Yen, Paul van Wijnen, Michael Lercel, Boudewijn Sluijk:
Holistic Patterning to Advance Semiconductor Manufacturing in the 2020s and Beyond. VLSI Technology and Circuits 2022: 3-7 - Lee Brogan, Jon Reid:
Impact of Material Interface Geometry on Interconnect Resistance. VLSI Technology and Circuits 2022: 425-426 - Kaiming Cai, Simon Van Beek, Siddharth Rao, K. Fan, M. Gupta, V. D. Nguyen, Ganesh Jayakumar, Giacomo Talmelli, S. Couet, Gouri Sankar Kar:
Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories. VLSI Technology and Circuits 2022: 375-376 - Qiankai Cao, Jie Gu:
A Sparse Convolution Neural Network Accelerator for 3D/4D Point-Cloud Image Recognition on Low Power Mobile Device with Hopping-Index Rule Book for Efficient Coordinate Management. VLSI Technology and Circuits 2022: 106-107 - Alex Carsello, Kathleen Feng, Taeyoung Kong, Kalhan Koul, Qiaoyi Liu, Jackson Melchert, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Rick Bahr, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. VLSI Technology and Circuits 2022: 70-71 - Wriddhi Chakraborty, P. Shrestha, A. Gupta, Rakshith Saligram, Samuel Spetalnick, J. Campbell, Arijit Raychowdhury, Suman Datta:
Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing. VLSI Technology and Circuits 2022: 302-303 - Umesh Chand, Mohamed M. Sabry Aly, Manohar Lal, Chen Chun-Kuei, Sonu Hooda, Shih-Hao Tsai, Zihang Fang, Hasita Veluri, Aaron Voon-Yew Thean:
Sub-10nm Ultra-thin ZnO Channel FET with Record-High 561 µA/µm ION at VDS 1V, High µ-84 cm2/V-s and1T-1RRAM Memory Cell Demonstration Memory Implications for Energy-Efficient Deep-Learning Computing. VLSI Technology and Circuits 2022: 326-327 - Dong-Jin Chang, Seung-Tak Ryu:
A Relative-Prime Rotation Based Fully On-Chip Background Skew Calibration for Time-Interleaved ADCs. VLSI Technology and Circuits 2022: 174-175 - Ruicong Chen, Hanrui Wang, Anantha P. Chandrakasan, Hae-Seung Lee:
RaM-SAR: A Low Energy and Area Overhead, 11.3fJ/conv.-step 12b 25MS/s Secure Random-Mapping SAR ADC with Power and EM Side-channel Attack Resilience. VLSI Technology and Circuits 2022: 94-95 - Wei-Chen Chen, F. Huang, S. Qin, Z. Yu, Q. Lin, Paul C. McIntyre, S. S. Wong, H.-S. Philip Wong:
4 Bits/cell Hybrid 1F1R for High Density Embedded Non-Volatile Memory and its Application for Compute in Memory. VLSI Technology and Circuits 2022: 244-245 - Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy:
An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS. VLSI Technology and Circuits 2022: 68-69 - Kaifei Chen, Jiebin Niu, Guanhua Yang, Menggan Liu, Wendong Lu, Fuxi Liao, Kailiang Huang, XinLv Duan, Congyan Lu, Jiawei Wang, Lingfei Wang, Mengmeng Li, Di Geng, Chao Zhao, Guilei Wang, Nianduan Lu, Ling Li, Ming Liu:
Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high Gm, max of 559 µS/µm at VDS=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec. VLSI Technology and Circuits 2022: 298-299 - Rongmei Chen, Giuliano Sisto, Michele Stucchi, Anne Jourdain, Kenichi Miyaguchi, Pieter Schuddinck, P. Woeltgens, H. Lin, Naveen Kakarla, Anabela Veloso, Dragomir Milojevic, Odysseas Zografos, Pieter Weckx, Geert Hellings, Geert Van der Plas, Julien Ryckaert, Eric Beyne:
Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node. VLSI Technology and Circuits 2022: 429-430 - Kuan-Yu Chen, Chi-Sheng Yang, Yu-Hsiu Sun, Chien-Wei Tseng, Morteza Fayazi, Xin He, Siying Feng, Yufan Yue, Trevor N. Mudge, Ronald G. Dreslinski, Hun-Seok Kim, David T. Blaauw:
A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET. VLSI Technology and Circuits 2022: 202-203
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