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2010 – 2019
- 2019
[c6]Eddy Simoen, Alberto Vinicius Oliveira, Anabela Veloso, Adrian Vaisman Chasin, Romain Ritzenthaler, Hans Mertens, Naoto Horiguchi, Cor Claeys:
Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors. ASICON 2019: 1-4- [c5]Trong Huynh Bao, Anabela Veloso, Sushil Sakhare, Philippe Matagne, Julien Ryckaert, Manu Perumkunnil, Davide Crotti, Farrukh Yasin, Alessio Spessot, Arnaud Furnémont, Gouri Sankar Kar, Anda Mocuta:
Process, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications. DAC 2019: 13 - 2018
- [c4]Bertrand Parvais
, Geert Hellings, Marco Simicic, Pieter Weckx, Jérôme Mitard, Doyoung Jang, V. Deshpande, B. van Liempc, Anabela Veloso, A. Vandooren, Niamh Waldron, Piet Wambacq, Nadine Collaert, Diederik Verkest:
Scaling CMOS beyond Si FinFET: an analog/RF perspective. ESSDERC 2018: 158-161 - 2016
- [c3]Nadine Collaert, AliReza Alian, H. Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, Dennis Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, Marc Schaekers, A. Sibaya-Hernandez, S. Sioncke, Quentin Smets, Abhitosh Vais, A. Vandooren, Anabela Veloso, Anne S. Verhulst, D. Verreck, Niamh Waldron, Amey Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean:
Beyond-Si materials and devices for more Moore and more than Moore applications. ICICDT 2016: 1-5 - 2014
- [c2]Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq:
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC 2014: 102-105 - 2012
- [c1]Eddy Simoen, Marc Aoulaiche, Anabela Veloso, M. Jurczak, Cor Claeys, L. Mendes Almeida, Maria Glória Caño de Andrade, A. Luque Rodriguez, J. A. Jimenez Tejada, C. Caillat, Pierre Fazan:
On the correlation between the retention time of FBRAM and the low-frequency noise of UTBOX SOI nMOSFETs. ESSDERC 2012: 338-341
2000 – 2009
- 2007
- [j3]A. Shickova, Ben Kaczer, Anabela Veloso, Marc Aoulaiche, M. Houssa, H. E. Maes, Guido Groeseneken, J. A. Kittl:
NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase. Microelectron. Reliab. 47(4-5): 505-507 (2007) - [j2]A. Kerber, Luigi Pantisano, Anabela Veloso, Guido Groeseneken, Martin Kerber:
Reliability screening of high-k dielectrics based on voltage ramp stress. Microelectron. Reliab. 47(4-5): 513-517 (2007) - [j1]A. Rothschild, R. Mitsuhashi, Christoph Kerner, X. Shi, J. L. Everaert, L. Date, Thierry Conard, Olivier Richard, C. Vrancken, R. Verbeeck, Anabela Veloso, A. Lauwers, M. de Potter de ten Broeck, I. Debusschere, M. Jurczak, M. Niwa, Philippe Absil, S. Biesemans:
Optimization of HfSiON using a design of experiment (DOE) approach on 0.45 V Vt Ni-FUSI CMOS transistors. Microelectron. Reliab. 47(4-5): 521-524 (2007)
Coauthor Index
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