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Nail Etkin Can Akkaya
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2020 – today
- 2022
- [c9]Nail Etkin Can Akkaya, Gary Chan, Hung-Jen Liao, Yih Wang
, Jonathan Chang:
A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology. VLSI Technology and Circuits 2022: 110-111
2010 – 2019
- 2019
- [j1]Burak Erbagci, Nail Etkin Can Akkaya, Mudit Bhargava, Rachel Dondero, Ken Mai:
Secure hardware-entangled field programmable gate arrays. J. Parallel Distributed Comput. 131: 81-96 (2019) - [c8]Burak Erbagci, Nail Etkin Can Akkaya, Cagri Erbagci, Ken Mai:
An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS. ESSCIRC 2019: 65-68 - 2018
- [c7]Prashanth Mohan, Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai:
A compact energy-efficient pseudo-static camouflaged logic family. HOST 2018: 96-102 - [c6]Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai:
Secure chip odometers using intentional controlled aging. HOST 2018: 111-117 - [c5]Nail Etkin Can Akkaya, Burak Erbagci, Ken Mai:
A secure camouflaged logic family using post-manufacturing programming with a 3.6GHz adder prototype in 65nm CMOS at 1V nominal VDD. ISSCC 2018: 128-130 - 2016
- [c4]Burak Erbagci, Cagri Erbagci, Nail Etkin Can Akkaya, Ken Mai:
A secure camouflaged threshold voltage defined logic family. HOST 2016: 229-235 - 2015
- [c3]Burak Erbagci, Fangfei Liu, Cagla Cakir, Nail Etkin Can Akkaya, Ruby B. Lee, Ken Mai:
A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS. A-SSCC 2015: 1-4 - [c2]Burak Erbagci, Nail Etkin Can Akkaya, Craig Teegarden, Ken Mai:
A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm. CICC 2015: 1-4 - [c1]Nail Etkin Can Akkaya, Burak Erbagci, Raymond Carley, Ken Mai:
A DPA-resistant self-timed three-phase dual-rail pre-charge logic family. HOST 2015: 112-117
Coauthor Index
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