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Hong-Hyun Bae
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2020 – today
- 2024
- [j2]Jeong-Hyun Cho, Hong-Hyun Bae, Gyu-Wan Lim, Tae-Hwang Kong, Jun-Hyeok Yang, Hyun-Sik Kim:
A Fully Integrated Multi-Phase Voltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling Gate Driver. IEEE J. Solid State Circuits 59(8): 2529-2544 (2024) - [c7]Hong-Hyun Bae, Jeong-Hyun Cho, Kihyun Kim, Seunghwa Shin, Doojin Jang, Jun-Hyeok Yang, Hyun-Sik Kim:
A 7V/μs-DVS Class-G Digital-Shunt-Aided Buck Voltage Regulator Achieving a 7% Dynamic-Efficiency Drop at a 600kHz DVS Occurrence Frequency in 28nm CMOS. CICC 2024: 1-2 - [c6]Yong-Jin Lee, Woojin Jang, Hong-Hyun Bae, Jeong-Hyun Cho, Hyun-Sik Kim:
14.10 34.7A/mm2 Scalable Distributed All-Digital 6×6 Dot-LDOs Featuring Freely Linkable Current-Sharing Network: A Fine-Grained On-Chip Power Delivery Solution in 28nm CMOS. ISSCC 2024: 272-274 - [c5]Jun-Gi Lee, Hong-Hyun Bae, Seunghyun Jang, Hyun-Sik Kim:
28.1 A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving -28dB Worst-Case Power-Supply Rejection Across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip Capacitance. ISSCC 2024: 456-458 - 2022
- [j1]Jeong-Hyun Cho, Dong-Kyu Kim, Hong-Hyun Bae, Yong-Jin Lee, Seok-Tae Koh, Young-Hwan Choo, Ji-Seon Paek, Hyun-Sik Kim:
A Fully Integrated Multi-Phase Buck Converter With On-Chip Capacitor Dynamic Re-Allocation and Fine-Grained Phase-Shedding Techniques. IEEE J. Solid State Circuits 57(12): 3840-3852 (2022) - [c4]Jeong-Hyun Cho, Dong-Kyu Kim, Hong-Hyun Bae, Yong-Jin Lee, Seok-Tae Koh, Young-Hwan Choo, Ji-Seon Paek, Hyun-Sik Kim:
A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor Current Balancing and Fast DVS of 75mV/ns. ISSCC 2022: 1-3 - [c3]Hyun-Ki Han, Min-Woo Ko, Jeong-Hyun Cho, Gyeong-Gu Kang, Seok-Tae Koh, Hong-Hyun Bae, Hyun-Sik Kim:
A Monolithic 48V-to-1V 10A Quadruple Step-Down DC-DC Converter with Hysteretic Copied On-Time 4-Phase Control and 2× Slew Rate All-Hysteretic Mode. VLSI Technology and Circuits 2022: 182-183 - [c2]Hong-Hyun Bae, Jeong-Hyun Cho, Gyeong-Gu Kang, Yousung Park, Hyun-Sik Kim:
A 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/μs DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique. VLSI Technology and Circuits 2022: 194-195 - [c1]Jeong-Hyun Cho, Hong-Hyun Bae, Gyu-Wan Lim, Tae-Hwang Kong, Jun-Hyeok Yang, Hyun-Sik Kim:
A Fully-Integrated 0.9W/mm2 79.1%-Efficiency 200MHz Multi-Phase Buck Converter with Flying-Capacitor-Based Inter-Inductor Current Balancing Technique. VLSI Technology and Circuits 2022: 196-197
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last updated on 2024-10-07 22:10 CEST by the dblp team
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