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ORCIDKrste Asanovic
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- affiliation: SiFive, USA
- affiliation: University of California at Berkeley, CA, USA
- affiliation (former): MIT, Cambridge, USA
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2020 – today
- 2024
[j40]Seah Kim
, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao:
AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator Integration. IEEE Micro 44(4): 97-105 (2024)- [c116]Tianrui Wei, Kevin Laeufer, Katie Lim, Jerry Zhao, Koushik Sen, Jonathan Balkind, Krste Asanovic:
Zoomie: A Software-like Debugging Tool for FPGAs. ASPLOS (3) 2024: 1048-1062 - [c115]Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic:
FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs. ISCA 2024: 501-515 - 2023
- [j39]Ron Diamant, Krste Asanovic:
Special Issue on Hot Chips 34. IEEE Micro 43(3): 7-8 (2023) - [c114]Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao:
MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. HPCA 2023: 828-841 - [c113]Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan:
CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. ISCA 2023: 39:1-39:17 - [c112]Abraham Gonzalez, Aasheesh Kolli, Samira Manabi Khan, Sihang Liu, Vidushi Dadu, Sagar Karandikar, Jichuan Chang, Krste Asanovic, Parthasarathy Ranganathan:
Profiling Hyperscale Big Data Processing. ISCA 2023: 47:1-47:16 - [c111]Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao:
AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads. MICRO 2023: 62-76 - [i16]Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao:
MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. CoRR abs/2305.05843 (2023) - 2022
- [j38]Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woorham Bae, Sean Huang, Vladimir M. Milovanovic, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic:
An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET. IEEE J. Solid State Circuits 57(1): 140-152 (2022) - [c110]Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic:
Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing. CCS 2022: 1871-1885 - [c109]Harrison Liew, Daniel Grubb, John Wright, Colin Schmidt, Nayiri Krzysztofowicz, Adam M. Izraelevitz, Edward Wang, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic:
Hammer: a modular and reusable physical design flow tool: invited. DAC 2022: 1335-1338 - [i15]Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic:
Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing. CoRR abs/2209.15253 (2022) - [i14]Kevin Cheang, Cameron Rasmussen, Dayeol Lee, David W. Kohlbrenner, Krste Asanovic, Sanjit A. Seshia:
Verifying RISC-V Physical Memory Protection. CoRR abs/2211.02179 (2022) - 2021
- [j37]Tae Jun Ham, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Jae W. Lee, David Bruns-Smith, Brendan Sweeney, Krste Asanovic, Young H. Oh, Lisa Wu Wills:
Accelerating Genomic Data Analytics With Composable Hardware Acceleration Framework. IEEE Micro 41(3): 42-49 (2021) - [j36]David Biancolin, Albert Magyar, Sagar Karandikar, Alon Amid, Borivoje Nikolic, Jonathan Bachrach, Krste Asanovic:
Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. IEEE Micro 41(4): 58-66 (2021) - [c108]Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao:
Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. DAC 2021: 769-774 - [c107]Abraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt, John Charles Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic:
A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET. ESSCIRC 2021: 259-262 - [c106]Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic:
Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs. ISCAS 2021: 1-5 - [c105]Jerry Zhao, Abraham Gonzalez, Alon Amid, Sagar Karandikar, Krste Asanovic:
COBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors. ISPASS 2021: 310-320 - [c104]Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woo-Rham Bae, Sean Huang, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic:
4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET. ISSCC 2021: 58-60 - [c103]Sagar Karandikar, Chris Leary, Chris Kennelly, Jerry Zhao, Dinesh Parimi, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan:
A Hardware Accelerator for Protocol Buffers. MICRO 2021: 462-478 - 2020
- [j35]David Kohlbrenner, Shweta Shinde, Dayeol Lee, Krste Asanovic, Dawn Song:
Building Open Trusted Execution Environments. IEEE Secur. Priv. 18(5): 47-56 (2020) - [j34]Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic:
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro 40(4): 10-21 (2020) - [j33]John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic:
A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28(12): 2721-2725 (2020) - [c102]Sagar Karandikar, Albert J. Ou, Alon Amid, Howard Mao, Randy H. Katz, Borivoje Nikolic, Krste Asanovic:
FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design. ASPLOS 2020: 715-731 - [c101]Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica:
NeuroVectorizer: end-to-end vectorization with deep reinforcement learning. CGO 2020: 242-255 - [c100]Ckristian Duran, Megan Wachs, Luis E. Rueda G., Albert Huntington, Javier Ardila, Jack Kang, Andres Amaya, Héctor Gómez, Juan Romero, Laude Fernandez, Felipe Flechas, Rolando Torres, Juan Sebastian Moya, Wilmer Ramirez, Julian Arenas, Juan Gomez, Hanssel Morales, Camilo Rojas, Alex Mantilla, Elkim Roa, Krste Asanovic:
An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications. CICC 2020: 1-4 - [c99]Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic:
Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC 2020: 1-6 - [c98]Dayeol Lee, David Kohlbrenner, Shweta Shinde, Krste Asanovic, Dawn Song:
Keystone: an open framework for architecting trusted execution environments. EuroSys 2020: 38:1-38:16 - [c97]Tae Jun Ham, David Bruns-Smith, Brendan Sweeney, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Young H. Oh, Krste Asanovic, Jae W. Lee, Lisa Wu Wills:
Genesis: A Hardware Acceleration Framework for Genomic Data Analysis. ISCA 2020: 254-267 - [c96]Ameer Haj-Ali, Qijing (Jenny) Huang, William S. Moses, John Xiang, Krste Asanovic, John Wawrzynek, Ion Stoica:
AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning. MLSys 2020 - [c95]Bin Li, Yipeng Wang, Ren Wang, Charlie Tai, Ravi R. Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj-Ali, Ion Stoica, Krste Asanovic:
RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization. NetSoft 2020: 335-343 - [i13]Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek:
AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning. CoRR abs/2003.00671 (2020) - [i12]Ameer Haj-Ali, Hasan Genc, Qijing Huang, William S. Moses, John Wawrzynek, Krste Asanovic, Ion Stoica:
ProTuner: Tuning Programs with Monte Carlo Tree Search. CoRR abs/2005.13685 (2020)
2010 – 2019
- 2019
- [j32]Alon Amid, Kiseok Kwon, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer:
Co-design of deep neural nets and neural net accelerators for embedded vision applications. IBM J. Res. Dev. 63(6): 6:1-6:14 (2019) - [j31]Christopher Celio, Pi-Feng Chiu, Krste Asanovic, Borivoje Nikolic, David A. Patterson:
BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS. IEEE Micro 39(2): 52-60 (2019) - [j30]Martin Maas, Krste Asanovic, John Kubiatowicz:
A Hardware Accelerator for Tracing Garbage Collection. IEEE Micro 39(3): 38-46 (2019) - [j29]Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic:
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. IEEE Micro 39(3): 56-65 (2019) - [c94]Elad Alon, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic:
Open-Source EDA Tools and IP, A View from the Trenches. DAC 2019: 79 - [c93]Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas:
Sanctorum: A lightweight security monitor for secure enclaves. DATE 2019: 1142-1147 - [c92]Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek:
AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning. FCCM 2019: 308 - [c91]David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic:
FASED: FPGA-Accelerated Simulation and Evaluation of DRAM. FPGA 2019: 330-339 - [c90]Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph:
FPGA Accelerated INDEL Realignment in the Cloud. HPCA 2019: 277-290 - [c89]Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek:
Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. ICCAD 2019: 1-8 - [c88]Albert Magyar, David Biancolin, John Koenig, Sanjit Seshia, Jonathan Bachrach, Krste Asanovic:
Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes. ICCAD 2019: 1-8 - [c87]Donggyu Kim, Jerry Zhao, Jonathan Bachrach, Krste Asanovic:
Simmani: Runtime Power Modeling for Arbitrary RTL with Automatic Signal Selection. MICRO 2019: 1050-1062 - [i11]Ameer Haj Ali, Qijing Huang, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek:
AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning. CoRR abs/1901.04615 (2019) - [i10]Dayeol Lee, David Kohlbrenner, Shweta Shinde, Dawn Song, Krste Asanovic:
Keystone: A Framework for Architecting TEEs. CoRR abs/1907.10119 (2019) - [i9]Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Joseph Gonzalez, Krste Asanovic, Ion Stoica:
Deep Reinforcement Learning in System Optimization. CoRR abs/1908.01275 (2019) - [i8]Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica:
NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning. CoRR abs/1909.13639 (2019) - [i7]Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic:
Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. CoRR abs/1911.09925 (2019) - [i6]Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas:
Sanctorum: A lightweight security monitor for secure enclaves. IACR Cryptol. ePrint Arch. 2019: 1 (2019) - 2018
- [c86]Kiseok Kwon, Alon Amid, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer:
Co-design of deep neural nets and neural net accelerators for embedded vision applications. DAC 2018: 148:1-148:6 - [c85]Borivoje Nikolic, Elad Alon, Krste Asanovic:
Generating the Next Wave of Custom Silicon. ESSCIRC 2018: 6-11 - [c84]Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic:
DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. FPL 2018: 76-80 - [c83]Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic:
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. ISCA 2018: 29-42 - [c82]Martin Maas, Krste Asanovic, John Kubiatowicz:
A Hardware Accelerator for Tracing Garbage Collection. ISCA 2018: 138-151 - [c81]Pi-Feng Chiu, Christopher Celio, Krste Asanovic, David A. Patterson, Borivoje Nikolic:
An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS. VLSI Circuits 2018: 61-62 - [i5]Kiseok Kwon, Alon Amid, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer:
Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications. CoRR abs/1804.10642 (2018) - [i4]Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas:
Sanctorum: A lightweight security monitor for secure enclaves. CoRR abs/1812.10605 (2018) - 2017
- [j28]Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic:
A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. IEEE J. Solid State Circuits 52(7): 1863-1875 (2017) - [j27]Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic:
Reprogrammable Redundancy for SRAM-Based Cache Vmin Reduction in a 28-nm RISC-V Processor. IEEE J. Solid State Circuits 52(10): 2589-2600 (2017) - [c80]Jack Koenig, David Biancolin, Jonathan Bachrach, Krste Asanovic:
A Hardware Accelerator for Computing an Exact Dot Product. ARITH 2017: 114-121 - [c79]Martin Maas, Krste Asanovic, John Kubiatowicz:
Return of the Runtimes: Rethinking the Language Runtime System for the Cloud 3.0 Era. HotOS 2017: 138-143 - [c78]Jonathan Bachrach, Albert Magyar, Daniel Palmer Dabbelt, Patrick Li, Richard Lin, Krste Asanovic:
Cyclist: Accelerating hardware development. ICCAD 2017: 1011-1018 - [c77]Scott Beamer, Krste Asanovic, David A. Patterson:
Reducing Pagerank Communication via Propagation Blocking. IPDPS 2017: 820-831 - [c76]Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael S. Georgas, Andrew S. Waterman, Jeffrey M. Shainline, Rimas R. Avizienis, Sen Lin, Benjamin R. Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry M. Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic:
Microprocessor chip with photonic I/O. OFC 2017: 1-3 - [i3]Aydin Buluç, Scott Beamer, Kamesh Madduri, Krste Asanovic, David A. Patterson:
Distributed-Memory Breadth-First Search on Massive Graphs. CoRR abs/1705.04590 (2017) - 2016
- [j26]Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic:
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE J. Solid State Circuits 51(4): 930-942 (2016) - [j25]Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic:
An Agile Approach to Building RISC-V Microprocessors. IEEE Micro 36(2): 8-20 (2016) - [c75]Martin Maas, Krste Asanovic, Tim Harris, John Kubiatowicz:
Taurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications. ASPLOS 2016: 457-471 - [c74]Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic:
Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor. A-SSCC 2016: 121-124 - [c73]Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic:
Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. ESSCIRC 2016: 269-272 - [c72]Daniel Palmer Dabbelt, Colin Schmidt, Eric Love, Howard Mao, Sagar Karandikar, Krste Asanovic:
Vector Processors for Energy-Efficient Embedded Systems. MES@ISCA 2016: 10-16 - [c71]Donggyu Kim, Adam M. Izraelevitz, Christopher Celio, Hokeun Kim, Brian Zimmer, Yunsup Lee, Jonathan Bachrach, Krste Asanovic:
Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL. ISCA 2016: 128-139 - [i2]Christopher Celio, Daniel Palmer Dabbelt, David A. Patterson, Krste Asanovic:
The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V. CoRR abs/1607.02318 (2016) - 2015
- [j24]Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic:
Single-chip microprocessor that communicates directly using light. Nat. 528(7581): 534-538 (2015) - [j23]Ruzica Jevtic, Hanh-Phuc Le, Milovan Blagojevic, Stevo Bailey, Krste Asanovic, Elad Alon, Borivoje Nikolic:
Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 723-730 (2015) - [c70]Zhangxi Tan, Zhenghao Qian, Xi Chen, Krste Asanovic, David A. Patterson:
DIABLO: A Warehouse-Scale Computer Network Simulator using FPGAs. ASPLOS 2015: 207-221 - [c69]Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic:
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. Hot Chips Symposium 2015: 1-45 - [c68]Martin Maas, Tim Harris, Krste Asanovic, John Kubiatowicz:
Trash Day: Coordinating Garbage Collection in Distributed Systems. HotOS 2015 - [c67]Scott Beamer, Krste Asanovic, David A. Patterson:
Locality Exists in Graph Processing: Workload Characterization on an Ivy Bridge Server. IISWC 2015: 56-65 - [c66]Scott Beamer, Krste Asanovic, David A. Patterson:
GAIL: the graph algorithm iron law. IA3@SC 2015: 13:1-13:4 - [c65]Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic:
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. VLSIC 2015: 316- - [i1]Scott Beamer, Krste Asanovic, David A. Patterson:
The GAP Benchmark Suite. CoRR abs/1508.03619 (2015) - 2014
- [c64]Yunsup Lee, Andrew Waterman, Rimas Avizienis, Henry Cook, Chen Sun, Vladimir Stojanovic, Krste Asanovic:
A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators. ESSCIRC 2014: 199-202 - [c63]Brian Zimmer, Olivier Thomas, Seng Oon Toh, Taylor Vincent, Krste Asanovic, Borivoje Nikolic:
Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM. ESSDERC 2014: 98-101 - [c62]Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, Jim Demmel:
Author retrospective for optimizing matrix multiply using PHiPAC: a portable high-performance ANSI C coding methodology. ICS 25th Anniversary 2014: 42-44 - [c61]Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic:
Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures. MICRO 2014: 101-113 - 2013
- [j22]Scott Beamer, Krste Asanovic, David A. Patterson:
Direction-optimizing breadth-first search. Sci. Program. 21(3-4): 137-148 (2013) - [j21]Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic:
Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators. ACM Trans. Comput. Syst. 31(3): 6 (2013) - [c60]Martin Maas, Eric Love, Emil Stefanov, Mohit Tiwari, Elaine Shi, Krste Asanovic, John Kubiatowicz, Dawn Song:
PHANTOM: practical oblivious computation in a secure processor. CCS 2013: 311-324 - [c59]Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanovic:
Convergence and scalarization for data-parallel architectures. CGO 2013: 32:1-32:11 - [c58]Juan A. Colmenares, Gage Eads, Steven A. Hofmeyr, Sarah Bird, Miquel Moretó, David Chou, Brian Gluzman, Eric Roman, Davide B. Bartolini, Nitesh Mor, Krste Asanovic, John Kubiatowicz:
Tessellation: refactoring the OS around explicit resource containers with continuous adaptation. DAC 2013: 76:1-76:10 - [c57]Krste Asanovic, Jan-Willem van de Waerdt:
Welcome from general chairs. Hot Chips Symposium 2013: 1-2 - [c56]Yunsup Lee, David Sheffield, Andrew Waterman, Michael J. Anderson, Kurt Keutzer, Krste Asanovic:
Measuring the gap between programmable and fixed-function accelerators: A case study on speech recognition. Hot Chips Symposium 2013: 1-2 - [c55]Andrew Waterman, Yunsup Lee, Rimas Avizienis, Henry Cook, David A. Patterson, Krste Asanovic:
The RISC-V instruction set. Hot Chips Symposium 2013: 1 - [c54]Scott Beamer, Aydin Buluç, Krste Asanovic, David A. Patterson:
Distributed Memory Breadth-First Search Revisited: Enabling Bottom-Up Search. IPDPS Workshops 2013: 1618-1627 - [c53]Henry Cook, Miquel Moretó, Sarah Bird, Khanh Dao, David A. Patterson, Krste Asanovic:
A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness. ISCA 2013: 308-319 - 2012
- [j20]Christopher Batten, Ajay Joshi, Vladimir Stojanovic, Krste Asanovic:
Designing Chip-Level Nanophotonic Interconnection Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 137-153 (2012) - [j19]Jae W. Lee, Man Cheuk Ng, Krste Asanovic:
Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks. J. Parallel Distributed Comput. 72(11): 1401-1411 (2012) - [j18]Brian Zimmer, Seng Oon Toh, Huy Vo, Yunsup Lee, Olivier Thomas, Krste Asanovic, Borivoje Nikolic:
SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 59-II(12): 853-857 (2012) - [c52]Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic:
Chisel: constructing hardware in a Scala embedded language. DAC 2012: 1216-1225 - [c51]Martin Maas, Philip Reames, Jeffrey Morlan, Krste Asanovic, Anthony D. Joseph, John Kubiatowicz:
GPUs as an opportunity for offloading garbage collection. ISMM 2012: 25-36 - [c50]Scott Beamer, Krste Asanovic, David A. Patterson:
Direction-optimizing breadth-first search. SC 2012: 12 - [c49]Mohit Tiwari, Prashanth Mohan, Andrew Osheroff, Hilfi Alkaff, Elaine Shi, Eric Love, Dawn Song, Krste Asanovic:
Context-centric Security. HotSec 2012 - 2011
- [c48]Juan A. Colmenares, Sarah Bird, Gage Eads, Steven A. Hofmeyr, Albert Kim, Rohit Poddar, Hilfi Alkaff, Krste Asanovic, John Kubiatowicz:
Tessellation operating system: Building a real-time, responsive, high-throughput client OS for many-core architectures. Hot Chips Symposium 2011: 1 - [c47]Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic:
The Maven vector-thread architecture. Hot Chips Symposium 2011: 1 - [c46]Juan A. Colmenares, Ian Saxton, Eric Battenberg, Rimas Avizienis, Nils Peters, Krste Asanovic, John Kubiatowicz, David Wessel:
Real-time Musical Applications on an Experimental Operating System for Multi-Core Processors. ICMC 2011 - [c45]Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic:
Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators. ISCA 2011: 129-140 - 2010
- [j17]Krste Asanovic, Ralph Wittig:
Guest Editors' Introduction: Hot Chips 21. IEEE Micro 30(2): 5-6 (2010) - [c44]Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic:
RAMP gold: an FPGA-based architecture simulator for multiprocessors. DAC 2010: 463-468 - [c43]Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic, Krste Asanovic:
Re-architecting DRAM memory systems with monolithically integrated silicon photonics. ISCA 2010: 129-140 - [c42]Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson:
A case for FAME: FPGA architecture model execution. ISCA 2010: 290-301 - [c41]Heidi Pan, Benjamin Hindman, Krste Asanovic:
Composing parallel software efficiently with lithe. PLDI 2010: 376-387
2000 – 2009
- 2009
- [j16]Krste Asanovic, Rastislav Bodík, James Demmel, Tony M. Keaveny, Kurt Keutzer, John Kubiatowicz, Nelson Morgan, David A. Patterson, Koushik Sen, John Wawrzynek, David Wessel, Katherine A. Yelick:
A view of the parallel computing landscape. Commun. ACM 52(10): 56-67 (2009) - [j15]Christopher Batten, Ajay Joshi, Jason Orcutt, Anatol Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic:
Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics. IEEE Micro 29(4): 8-21 (2009) - [c40]Scott Beamer, Krste Asanovic, Christopher Batten, Ajay Joshi, Vladimir Stojanovic:
Designing multi-socket systems using silicon photonics. ICS 2009: 521-522 - [c39]Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanovic, Vladimir Stojanovic:
Silicon-photonic clos networks for global on-chip communication. NOCS 2009: 124-133 - 2008
- [j14]Ronny Krashinsky, Christopher Batten, Krste Asanovic:
Implementing the scale vector-thread processor. ACM Trans. Design Autom. Electr. Syst. 13(3): 41:1-41:24 (2008) - [c38]Mark Hampton, Krste Asanovic:
Compiling for vector-thread architectures. CGO 2008: 205-215 - [c37]Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic:
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics. Hot Interconnects 2008: 21-30 - [c36]Jae W. Lee, Man Cheuk Ng, Krste Asanovic:
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. ISCA 2008: 89-100 - [c35]Patrick Schaumont, Krste Asanovic, James C. Hoe:
MEMOCODE 2008 Co-Design Contest. MEMOCODE 2008: 151-154 - 2007
- [j13]John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos E. Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic:
RAMP: Research Accelerator for Multiple Processors. IEEE Micro 27(2): 46-57 (2007) - [j12]Seongmoo Heo, Ronny Krashinsky, Krste Asanovic:
Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. IEEE Trans. Very Large Scale Integr. Syst. 15(9): 1060-1064 (2007) - [c34]Krste Asanovic:
Transactors for parallel hardware and software co-design. HLDVT 2007: 140-142 - [c33]Jae W. Lee, Myron King, Krste Asanovic:
Continual hashing for efficient fine-grain state inconsistency detection. ICCD 2007: 33-40 - 2006
- [j11]C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie:
Unbounded Transactional Memory. IEEE Micro 26(1): 59-69 (2006) - [j10]Kenneth C. Barr, Krste Asanovic:
Energy-aware lossless data compression. ACM Trans. Comput. Syst. 24(3): 250-291 (2006) - [c32]David A. Patterson, Arvind, Krste Asanovic, Derek Chiou, James C. Hoe, Christos Kozyrakis, Shih-Lien Lu, Mark Oskin, Jan M. Rabaey, John Wawrzynek:
Research accelerator for multiple processors. Hot Chips Symposium 2006: 1-42 - [c31]Mark Hampton, Krste Asanovic:
Implementing virtual memory in a vector processor with software restart markers. ICS 2006: 135-144 - [c30]Rose F. Liu, Krste Asanovic:
Accelerating architectural exploration using canonical instruction segments. ISPASS 2006: 13-24 - [c29]Kenneth C. Barr, Krste Asanovic:
Branch trace compression for snapshot-based simulation. ISPASS 2006: 25-36 - [c28]Jae W. Lee, Krste Asanovic:
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors. IEEE Real Time Technology and Applications Symposium 2006: 135-147 - [c27]Vern Paxson, Krste Asanovic, Sarang Dharmapurikar, John W. Lockwood, Ruoming Pang, Robin Sommer, Nicholas Weaver:
Rethinking Hardware Support for Network Analysis and Intrusion Prevention. HotSec 2006 - 2005
- [j9]Heidi Pan, Krste Asanovic, Robert Cohn, Chi-Keung Luk:
Controlling program execution through binary instrumentation. SIGARCH Comput. Archit. News 33(5): 45-50 (2005) - [j8]Jessica H. Tseng, Krste Asanovic:
A Speculative Control Scheme for an Energy-Efficient Banked Register Fil. IEEE Trans. Computers 54(6): 741-751 (2005) - [c26]C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie:
Unbounded Transactional Memory. HPCA 2005: 316-327 - [c25]Michael Zhang, Krste Asanovic:
Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. ISCA 2005: 336-345 - [c24]Seongmoo Heo, Krste Asanovic:
Replacing global wires with an on-chip network: a power analysis. ISLPED 2005: 369-374 - [c23]Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic:
Accelerating Multiprocessor Simulation with a Memory Timestamp Record. ISPASS 2005: 66-77 - [c22]Emmett Witchel, Junghwan Rhee, Krste Asanovic:
Mondrix: memory isolation for linux using mondriaan memory protection. SOSP 2005: 31-44 - 2004
- [j7]Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic:
The Vector-Thread Architecture. IEEE Micro 24(6): 84-90 (2004) - [c21]Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic:
The Vector-Thread Architecture. ISCA 2004: 52-63 - [c20]Seongmoo Heo, Krste Asanovic:
Power-optimal pipelining in deep submicron technology. ISLPED 2004: 218-223 - [c19]Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic:
Cache Refill/Access Decoupling for Vector Machines. MICRO 2004: 331-342 - 2003
- [c18]Emmett Witchel, Krste Asanovic:
Hardware Works, Software Doesn't: Enforcing Modularity with Mondriaan Memory Protection. HotOS 2003: 139-144 - [c17]Jessica H. Tseng, Krste Asanovic:
Banked Multiported Register Files for High-Frequency Superscalar Microprocessors. ISCA 2003: 62-71 - [c16]Seongmoo Heo, Kenneth C. Barr, Krste Asanovic:
Reducing power density through activity migration. ISLPED 2003: 217-222 - [c15]Kenneth C. Barr, Krste Asanovic:
Energy Aware Lossless Data Compression. MobiSys 2003: 231-244 - 2002
- [c14]Emmett Witchel, Josh Cates, Krste Asanovic:
Mondrian memory protection. ASPLOS 2002: 304-316 - [c13]Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic:
Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines. ISCA 2002: 137-147 - [c12]Michael Zhang, Krste Asanovic:
Fine-grain CAM-tag cache resizing using miss tags. ISLPED 2002: 130-135 - 2001
- [j6]Michael Sung, Ronny Krashinsky, Krste Asanovic:
Multithreading decoupled architectures for complexity-effective general purpose computing. SIGARCH Comput. Archit. News 29(5): 56-61 (2001) - [c11]Seongmoo Heo, Ronny Krashinsky, Krste Asanovic:
Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. ARVLSI 2001: 59-74 - [c10]Heidi Pan, Krste Asanovic:
Heads and tails: a variable-length instruction format supporting parallel fetch and decode. CASES 2001: 168-175 - [c9]Emmett Witchel, Samuel Larsen, C. Scott Ananian, Krste Asanovic:
Direct addressed caches for reduced power consumption. MICRO 2001: 124-133 - 2000
- [c8]Luis Villa, Michael Zhang, Krste Asanovic:
Dynamic zero compression for cache energy reduction. MICRO 2000: 214-220 - [c7]Jessica H. Tseng, Krste Asanovic:
Energy-Efficient Register Access. SBCCI 2000: 377-384
1990 – 1999
- 1997
- [j5]Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick:
Scalable Processors in the Billion-Transistor Era: IRAM. Computer 30(9): 75-78 (1997) - [c6]Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel:
Using PHiPAC to speed error back-propagation learning. ICASSP 1997: 4153-4156 - [c5]David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David R. Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick:
Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. ICCD 1997: 2-7 - [c4]Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel:
Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology. International Conference on Supercomputing 1997: 340-347 - [c3]Krste Asanovic:
A Fast Kohonen Net Implementation for Spert-II. IWANN 1997: 792-800 - 1996
- [j4]John Wawrzynek, Krste Asanovic, Brian Kingsbury, David Johnson, James Beck, Nelson Morgan:
Spert-II: A Vector Microprocessor System. Computer 29(3): 79-86 (1996) - 1995
- [c2]John Wawrzynek, Krste Asanovic, Brian Kingsbury, James Beck, David Johnson, Nelson Morgan:
SPERT-II: A Vector Microprocessor System and its Application to Large Problems in Backpropagation Training. NIPS 1995: 619-625 - 1993
- [j3]Krste Asanovic, James Beck, Jerry Feldman, Nelson Morgan, John Wawrzynek:
Designing A Connectionist Network Supercomputer. Int. J. Neural Syst. 4(4): 317-326 (1993) - [j2]John Wawrzynek, Krste Asanovic, Nelson Morgan:
The design of a neuro-microprocessor. IEEE Trans. Neural Networks 4(3): 394-399 (1993) - [j1]Krste Asanovic, Nelson Morgan, John Wawrzynek:
Using simulations of reduced precision arithmetic to design a neuro-microprocessor. J. VLSI Signal Process. 6(1): 33-44 (1993) - 1992
- [c1]Krste Asanovic, James Beck, Brian Kingsbury, Phil Kohn, Nelson Morgan, John Wawrzynek:
SPERT: a VLIW/SIMD microprocessor for artificial neural network computations. ASAP 1992: 178-190
Coauthor Index
Rimas Avizienis
aka: Rimas R. Avizienis
aka: Rimas R. Avizienis
Vladimir Stojanovic
aka: Vladimir Marko Stojanovic
aka: Vladimir Marko Stojanovic
Andrew Waterman
aka: Andrew S. Waterman
aka: Andrew S. Waterman
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