Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008.
, Karam S. Chatha
: Automated techniques for energy efficient scheduling on homogeneous and heterogeneous chip multi-processor architectures.
, Chao Huang
: Reconfigurable RTD-based circuit elements of complete logic functionality.
, In-Cheol Park
: Area and power efficient design of coarse time synchronizer and frequency offset estimator for fixed WiMAX systems.
, Yusuke Matsunaga
: Area recovery under depth constraint by Cut Substitution for technology mapping for LUT-based FPGAs.
, Ngai Wong
: Efficient numerical modeling of random rough surface effects for interconnect internal impedance extraction.
Sani R. Nassif
: Technology modeling and characterization beyond the 45nm node.
David Z. Pan
, Minsik Cho
: Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond.
, David Z. Pan
: MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks.
, Bill Lin
: Application-specific Network-on-Chip architecture synthesis based on set partitions and Steiner Trees.
: Floating-point reconfiguration array processor for 3D graphics physics engine.
: Super-K: A SoC for single-chip ultra mobile computer.
: The evolution of SoC platform according to the new mobile paradigm.
, Shanq-Jang Ruan
: Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block selection algorithm.
, David Z. Pan
: DPlace2.0: A stable and efficient analytical placement based on diffusion.
: In-band mobile digital TV transmission technology for advanced television systems committee.
: Multi-core DSP for base stations: Large and small.
, Masayuki Miyazaki
, Goichi Ono
, Ryosuke Fujiwara
, Takayasu Norimatsu
, Takahide Terada
, Akira Maeki
, Yuji Ogata
, Shinsuke Kobayashi
, Noboru Koshizuka
, Ken Sakamura
: 1-cc computer using UWB-IR for wireless sensor network.
, Qiang Xu
: A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems.
, Youngrae Cho
, Namdo Kim
, Hyuncheol Baik
, Kyungkuk Kim
, Dusung Kim
, Jaebum Kim
, Byeongun Min
, Kyumyung Choi
, Maciej J. Ciesielski
, Seiyang Yang
: A fast two-pass HDL simulation with on-demand dump.
: Hybrid solid-state disks: Combining heterogeneous NAND flash in large SSDs.
F. C. Tseng
: The future of semiconductor industry - A foundry's perspective.
, Kaushik Roy
: Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching.
, Sikun Li
, Yong Dou
: Collaborative hardware/software partition of coarse-grained reconfigurable system using evolutionary ant colony optimization.
, Taewhan Kim
: Optimal allocation and placement of thermal sensors for reconfigurable systems and its practical extension.
Reinaldo A. Bergamaschi
, Guoling Han
, Alper Buyuktosunoglu
, Hiren D. Patel
, Indira Nair
, Gero Dittmann
, Geert Janssen
, Nagu R. Dhanwada
, Zhigang Hu
, Pradip Bose
, John A. Darringer
: Exploring power management in multi-core systems.
, Masaki Ito
, Kunio Uchiyama
, Toshihiko Odaka
, Akihiro Hayashi
, Takeshi Masuura
, Masayoshi Mase
, Jun Shirako
, Yasutaka Wada
, Keiji Kimura
, Hironori Kasahara
: Software-cooperative power-efficient heterogeneous multi-core for media processing.
, Jaijeet S. Roychowdhury
: An efficient, fully nonlinear, variability-aware non-monte-carlo yield estimation procedure with applications to SRAM cells and ring oscillators.
, Nikil Dutt
: ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip.
: Panel: Best ways to use billions of devices on a chip.
: Quo vadis, BTSoC (Billion Transistor SoC)?
: Best ways to use billions of devices on a wireless mobile SoC.