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This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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2020 – today
- 2023
[j36]Tianzong Yu, Chunyuan Zhang
, Meng Ma, Yuan Wang:
Recursive least squares method for training and pruning convolutional neural networks. Appl. Intell. 53(20): 24603-24618 (2023)- [j35]Siqing Fu, Tiejun Li, Chunyuan Zhang, Hanqing Li, Sheng Ma, Jianmin Zhang, Ruiyi Zhang, Lizhou Wu:
RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1578-1591 (2023) - 2022
- [c95]Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang:
BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. ICCD 2022: 415-418 - [i8]Chunyuan Zhang, Chao Liu, Qi Song, Jie Zhao:
Recursive Least Squares Policy Control with Echo State Network. CoRR abs/2201.04781 (2022) - [i7]Tianzong Yu, Chunyuan Zhang, Yuan Wang, Meng Ma, Qi Song:
Recursive Least Squares for Training and Pruning Convolutional Neural Networks. CoRR abs/2201.04813 (2022) - [i6]Yuan Wang, Chunyuan Zhang, Tianzong Yu, Meng Ma:
Recursive Least Squares Advantage Actor-Critic Algorithms. CoRR abs/2201.05918 (2022) - [i5]Jianchao Yang, Mei Wen, Junzhong Shen, Yasong Cao, Minjin Tang, Renyu Yang, Jiawei Fei, Chunyuan Zhang:
BP-Im2col: Implicit Im2col Supporting AI Backpropagation on Systolic Arrays. CoRR abs/2209.09434 (2022) - 2021
- [j34]Chunyuan Zhang, Qi Song, Zeng Meng:
Minibatch Recursive Least Squares Q-Learning. Comput. Intell. Neurosci. 2021: 5370281:1-5370281:9 (2021) - [c94]Jianchao Yang, Mei Wen, Minjin Tang, Junzhong Shen, Chunyuan Zhang:
SAI: Self-Adjusting Incremental Quantile Estimation for Sparse Training of Neural Networks on Hardware Accelerators. HPCC/DSS/SmartCity/DependSys 2021: 1049-1058 - [c93]Xiaolei Zhao, Mei Wen, Zhaoyun Chen, Yang Shi, Chunyuan Zhang:
Automatic mapping and code optimization for OpenCL kernels on FT-matrix architecture (WIP paper). LCTES 2021: 37-41 - [i4]Chunyuan Zhang, Qi Song, Hui Zhou, Yigui Ou, Hongyao Deng, Laurence Tianruo Yang:
Revisiting Recursive Least Squares for Training Deep Neural Networks. CoRR abs/2109.03220 (2021) - 2020
- [j33]Zhuang Cao, Huayou Su, Qianming Yang, Junzhong Shen, Mei Wen, Chunyuan Zhang:
P4 to FPGA-A Fast Approach for Generating Efficient Network Processors. IEEE Access 8: 23440-23456 (2020) - [j32]Hongyao Deng, Jinsong Tao, Xiuli Song, Chunyuan Zhang:
Estimation of the parameters of a weighted nuclear norm model and its application in image denoising. Inf. Sci. 528: 246-264 (2020) - [j31]Zhaoyun Chen, Dafei Huang, Lei Luo, Mei Wen, Chunyuan Zhang:
Efficient Parallel TLD on CPU-GPU Platform for Real-Time Tracking. KSII Trans. Internet Inf. Syst. 14(1): 201-220 (2020) - [j30]Junzhong Shen, You Huang, Mei Wen, Chunyuan Zhang:
Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(7): 1442-1455 (2020) - [j29]Zhaoyun Chen, Wei Quan, Mei Wen, Jianbin Fang, Jie Yu, Chunyuan Zhang, Lei Luo:
Deep Learning Research and Development Platform: Characterizing and Scheduling with QoS Guarantees on GPU Clusters. IEEE Trans. Parallel Distributed Syst. 31(1): 34-50 (2020) - [c92]Minjin Tang, Mei Wen, Junzhong Shen, Xiaolei Zhao, Chunyuan Zhang:
Towards Memory-Efficient Streaming Processing with Counter-Cascading Sketching on FPGA. DAC 2020: 1-6 - [c91]Junzhong Shen, Mei Wen, Minjin Tang, Xiaolei Zhao, Chunyuan Zhang:
Scalable FPGA-based Architecture for High-Performance Per-Flow Traffic Measurement. FPGA 2020: 315 - [c90]Qixuan Cheng, Mei Wen, Junzhong Shen, Deguang Wang, Chunyuan Zhang:
Towards a Deep-Pipelined Architecture for Accelerating Deep GCN on a Multi-FPGA Platform. ICA3PP (1) 2020: 528-547 - [c89]Xiaolei Zhao, Mei Wen, Minjin Tang, Qun Huang, Chunyuan Zhang:
Optimized HybridSketch: More Efficient with Analysis and Algorithm. ICA3PP (1) 2020: 614-626 - [c88]Xiaolei Zhao, Mei Wen, Minjin Tang, Qun Huang, Chunyuan Zhang:
HybridSketch: A Memory-centric Precise Approach for Flow Measurement. ICC 2020: 1-7 - [c87]Yang Shi, Mei Wen, Chunyuan Zhang:
Towards High-Efficiency Data Centers via Job-Aware Network Scheduling. ICPP 2020: 19:1-19:10 - [c86]Chunyuan Zhang, Chao Liu, Jie Zhao:
Efficient Mini-batch Training for Echo State Networks. ICRAI 2020: 236-240 - [c85]Yang Shi, Mei Wen, Chunyuan Zhang:
Incremental Deployment of Programmable Switches for Sketch-based Network Measurement. ISCC 2020: 1-7
2010 – 2019
- 2019
- [j28]Zijun Hang, Mei Wen, Yang Shi, Chunyuan Zhang:
Interleaved Sketch: Toward Consistent Network Telemetry for Commodity Programmable Switches. IEEE Access 7: 146745-146758 (2019) - [j27]Yang Shi, Jiawei Fei, Mei Wen, Chunyuan Zhang:
Application-Oriented Network Scheduling With Metaflow. IEEE Access 7: 175531-175541 (2019) - [j26]Zhuang Cao, Huiguo Zhang, Junnan Li, Mei Wen, Chunyuan Zhang:
A Fast Approach for Generating Efficient Parsers on FPGAs. Symmetry 11(10): 1265 (2019) - [c84]Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang:
Scale-out Acceleration for 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System. DAC 2019: 207 - [c83]Zhaoyun Chen, Lei Luo, Haoduo Yang, Jie Yu, Mei Wen, Chunyuan Zhang:
GENIE: QoS-guided Dynamic Scheduling for CNN-based Tasks on SME Clusters. DATE 2019: 1599-1602 - [c82]Junzhong Shen, Deguang Wang, You Huang, Mei Wen, Chunyuan Zhang:
Accelerating 3D CNN-based Lung Nodule Segmentation on a Multi-FPGA System. FPGA 2019: 117 - [c81]Zijun Hang, Yang Shi, Mei Wen, Wei Quan, Chunyuan Zhang:
SWAP: a sliding window algorithm for in-network packet measurement. HP3C 2019: 84-89 - [c80]Zijun Hang, Yang Shi, Mei Wen, Chunyuan Zhang:
TBSW: Time-Based Sliding Window Algorithm for Network Traffic Measurement. HPCC/SmartCity/DSS 2019: 1305-1310 - [c79]Jiawei Fei, Yang Shi, Mei Wen, Chunyuan Zhang:
SACC: Configuring Application-Level Cache Intelligently for In-Memory Database Based on Long Short-Term Memory. HPCC/SmartCity/DSS 2019: 1350-1357 - [c78]Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang:
An Efficient Design Flow for Accelerating Complicated-connected CNNs on a Multi-FPGA Platform. ICPP 2019: 98:1-98:10 - [c77]Zhaoyun Chen, Lei Luo, Wei Quan, Mei Wen, Chunyuan Zhang:
Poster Abstract: Deep Learning Workloads Scheduling with Reinforcement Learning on GPU Clusters. INFOCOM Workshops 2019: 1023-1024 - [c76]Zhuang Cao, Huayou Su, Qianming Yang, Mei Wen, Chunyuan Zhang:
Poster Abstract: A Template-based Framework for Generating Network Processor in FPGA. INFOCOM Workshops 2019: 1057-1058 - [c75]Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang:
Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs. ISCAS 2019: 1-5 - [c74]Yang Shi, Jiawei Fei, Mei Wen, Chunyuan Zhang:
KVSwitch: An In-network Load Balancer for Key-Value Stores. ISCC 2019: 1-7 - [i3]Deguang Wang, Junzhong Shen, Mei Wen, Chunyuan Zhang:
Towards a Uniform Architecture for the Efficient Implementation of 2D and 3D Deconvolutional Neural Networks on FPGAs. CoRR abs/1903.02550 (2019) - 2018
- [j25]You Huang, Junzhong Shen, Yuran Qiao, Mei Wen, Chunyuan Zhang:
MALMM: A multi-array architecture for large-scale matrix multiplication on FPGA. IEICE Electron. Express 15(10): 20180286 (2018) - [j24]Haoduo Yang, Huayou Su, Qiang Lan, Mei Wen, Chunyuan Zhang:
HPGraph: High-Performance Graph Analytics with Productivity on the GPU. Sci. Program. 2018: 9340697:1-9340697:11 (2018) - [c73]Juan Chen, Li Shen, Jianping Yin, Chunyuan Zhang:
Parallel programming course development based on parallel computational thinking. TURC 2018: 103-109 - [c72]Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang:
Towards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA. FPGA 2018: 97-106 - [c71]Haoduo Yang, Huayou Su, Qiang Lan, Mei Wen, Chunyuan Zhang:
High performance graph analytics with productivity on hybrid CPU-GPU platforms. HP3C 2018: 17-21 - [c70]Zhaoyun Chen, Lei Luo, Wei Quan, Yang Shi, Jie Yu, Mei Wen, Chunyuan Zhang:
Multiple CNN-based Tasks Scheduling across Shared GPU Platform in Research and Development Scenarios. HPCC/SmartCity/DSS 2018: 578-585 - [c69]Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang:
Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs. ISCAS 2018: 1-5 - [c68]Juan Chen, Li Shen, Jianping Yin, Chunyuan Zhang:
Design of Practical Experiences to Improve Student Understanding of Efficiency and Scalability Issues in High Performance Computing: (Abstract Only). SIGCSE 2018: 1090 - [i2]Junzhong Shen, Yuran Qiao, You Huang, Mei Wen, Chunyuan Zhang:
Towards a Multi-array Architecture for Accelerating Large-scale Matrix Multiplication on FPGAs. CoRR abs/1803.03790 (2018) - 2017
- [j23]Qiang Lan, Zelong Wang, Mei Wen, Chunyuan Zhang, Yijie Wang:
High Performance Implementation of 3D Convolutional Neural Networks on a GPU. Comput. Intell. Neurosci. 2017: 8348671:1-8348671:8 (2017) - [j22]Yuran Qiao, Junzhong Shen, Tao Xiao, Qianming Yang, Mei Wen, Chunyuan Zhang:
FPGA-accelerated deep convolutional neural networks for high throughput and energy efficiency. Concurr. Comput. Pract. Exp. 29(20) (2017) - [j21]Dafei Huang, Lei Luo, Zhaoyun Chen, Mei Wen, Chunyuan Zhang:
Applying Detection Proposals to Visual Tracking for Scale and Aspect Ratio Adaptability. Int. J. Comput. Vis. 122(3): 524-541 (2017) - [j20]Zhaoyun Chen, Lei Luo, Dafei Huang, Mei Wen, Chunyuan Zhang:
Exploiting a depth context model in visual tracking with correlation filter. Frontiers Inf. Technol. Electron. Eng. 18(5): 667-679 (2017) - [j19]Yun-gang Xue, Huayou Su, Ju Ren, Mei Wen, Chunyuan Zhang, Li-Quan Xiao:
A Highly Parallel and Scalable Motion Estimation Algorithm with GPU for HEVC. Sci. Program. 2017: 1431574:1-1431574:15 (2017) - [c67]Yanpeng Wang, Mei Wen, Chunyuan Zhang, Jie Lin:
RVNet: A fast and high energy efficiency network packet processing system on RISC-V. ASAP 2017: 107-110 - [c66]Zelong Wang, Qiang Lan, Hongjun He, Chunyuan Zhang:
Winograd Algorithm for 3D Convolution Neural Networks. ICANN (2) 2017: 609-616 - [c65]Shenling Liu, Chunyuan Zhang, Yujiao Chen:
DCC: Distributed Cache Consistency. ICPCSEE (2) 2017: 377-387 - [c64]Yuran Qiao, Junzhong Shen, Dafei Huang, Qianming Yang, Mei Wen, Chunyuan Zhang:
Optimizing OpenCL Implementation of Deep Convolutional Neural Network on FPGA. NPC 2017: 100-111 - 2016
- [j18]Chunyuan Zhang, Qingxin Zhu, Xinzheng Niu:
Kernel Recursive Least-Squares Temporal Difference Algorithms with Sparsification and Regularization. Comput. Intell. Neurosci. 2016: 2305854:1-2305854:11 (2016) - [c63]Shenling Liu, Chunyuan Zhang, Le Bo:
Improve security and availability for cloud storage. CCIS 2016: 382-387 - [c62]Chunyuan Zhang, Qingxin Zhu, Xinzheng Niu:
Multikernel Recursive Least-Squares Temporal Difference Learning. ICIC (3) 2016: 205-217 - [c61]Johannes Langguth, Qiang Lan, Namit Gaur, Xing Cai, Mei Wen, Chunyuan Zhang:
Enabling Tissue-Scale Cardiac Simulations Using Heterogeneous Computing on Tianhe-2. ICPADS 2016: 843-852 - 2015
- [j17]Xinnan Dong, Mei Wen, Jun Chai, Xing Cai, Mandan Zhao, Chunyuan Zhang:
Communication-hiding programming for clusters with multi-coprocessor nodes. Concurr. Comput. Pract. Exp. 27(16): 4172-4185 (2015) - [j16]Dafei Huang, Changqing Xun, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai, Qianming Yang:
Enabling a Uniform OpenCL Device View for Heterogeneous Platforms. IEICE Trans. Inf. Syst. 98-D(4): 812-823 (2015) - [j15]Jun Chai, Johan Hake, Nan Wu, Mei Wen, Xing Cai, Glenn Terje Lines, Jing Yang, Huayou Su, Chunyuan Zhang, Xiangke Liao:
Towards simulation of subcellular calcium dynamics at nanometre resolution. Int. J. High Perform. Comput. Appl. 29(1): 51-63 (2015) - [j14]Lei Luo, Chunhua Shen, Xinwang Liu, Chunyuan Zhang:
A Computational Model of the Short-Cut Rule for 2D Shape Decomposition. IEEE Trans. Image Process. 24(1): 273-283 (2015) - [j13]Huayou Su, Xing Cai, Mei Wen, Chunyuan Zhang:
An analytical GPU performance model for 3D stencil computations from the angle of data traffic. J. Supercomput. 71(7): 2433-2453 (2015) - [c60]Dafei Huang, Lei Luo, Mei Wen, Zhaoyun Chen, Chunyuan Zhang:
Enable Scale and Aspect Ratio Adaptability in Visual Tracking with Detection Proposals. BMVC 2015: 185.1-185.12 - [c59]Zhaoyun Chen, Lei Luo, Mei Wen, Chunyuan Zhang:
Fast tracking via context depth model learning. ICIP 2015: 4215-4218 - 2014
- [j12]Mei Wen, Huayou Su, Wenjie Wei, Nan Wu, Xing Cai, Chunyuan Zhang:
High efficient sedimentary basin simulations on hybrid CPU-GPU clusters. Clust. Comput. 17(2): 359-369 (2014) - [c58]Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang:
Rethread: A Low-Cost Transient Fault Recovery Scheme for Multithreaded Processors. ARES 2014: 88-93 - [c57]Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang:
A fault detection mechanism in a Data-flow scheduled Multithreaded processor. DATE 2014: 1-4 - [c56]Dafei Huang, Mei Wen, Changqing Xun, Dong Chen, Xing Cai, Yuran Qiao, Nan Wu, Chunyuan Zhang:
Automated Transformation of GPU-Specific OpenCL Kernels Targeting Performance Portability on Multi-Core/Many-Core CPUs. Euro-Par 2014: 210-221 - [c55]Xinnan Dong, Jun Chai, Jing Yang, Mei Wen, Nan Wu, Xing Cai, Chunyuan Zhang, Zhaoyun Chen:
Utilizing Multiple Xeon Phi Coprocessors on One Compute Node. ICA3PP (2) 2014: 68-81 - [i1]Lei Luo, Chunhua Shen, Xinwang Liu, Chunyuan Zhang:
A Computational Model of the Short-Cut Rule for 2D Shape Decomposition. CoRR abs/1409.2104 (2014) - 2013
- [j11]Jun Chai, Mei Wen, Nan Wu, Dafei Huang, Jing Yang, Xing Cai, Chunyuan Zhang, Qianming Yang:
Simulating Cardiac Electrophysiology in the Era of GPU-Cluster Computing. IEICE Trans. Inf. Syst. 96-D(12): 2587-2595 (2013) - [j10]Changqing Xun, Dong Chen, Qiang Lan, Chunyuan Zhang:
Efficient fine-grained shared buffer management for multiple OpenCL devices. J. Zhejiang Univ. Sci. C 14(11): 859-872 (2013) - [j9]Qianming Yang, Mei Wen, Nan Wu, Chunyuan Zhang:
Accelerating thread-intensive and explicit memory management programs with dynamic partial reconfiguration. J. Supercomput. 63(2): 508-537 (2013) - [j8]Jun Chai, Huayou Su, Mei Wen, Xing Cai, Nan Wu, Chunyuan Zhang:
Resource-efficient utilization of CPU/GPU-based heterogeneous supercomputers for Bayesian phylogenetic inference. J. Supercomput. 66(1): 364-380 (2013) - [j7]Lei Luo, Chunhua Shen, Chunyuan Zhang, Anton van den Hengel:
Shape Similarity Analysis by Self-Tuning Locally Constrained Mixed-Diffusion. IEEE Trans. Multim. 15(5): 1174-1183 (2013) - [c54]Nan Wu, Yuran Qiao, Mei Wen, Chunyuan Zhang:
ACF: Networks-on-Chip Deadlock Recovery with Accurate Detection and Elastic Credit. APPT 2013: 319-333 - [c53]Dong Chen, Changqing Xun, Dafei Huang, Mei Wen, Chunyuan Zhang:
Automatic Mapping Single-Device OpenCL Program to Heterogeneous Multi-device Platform. HPCC/EUC 2013: 135-142 - [c52]Jing Yang, Jun Chai, Mei Wen, Nan Wu, Chunyuan Zhang:
Solving the Cardiac Model Using Multi-core CPU and Many Integrated Cores (MIC). HPCC/EUC 2013: 1009-1015 - [c51]Wentao Jia, Chunyuan Zhang, Jian Fu:
Device View Redundancy: An Adaptive Low-Overhead Fault Tolerance Mechanism for Many-Core System. HPCC/EUC 2013: 2080-2087 - [c50]Huayou Su, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai:
Performance of Sediment Transport Simulations on NVIDIA's Kepler Architecture. ICCS 2013: 1275-1281 - [c49]Huayou Su, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai:
On the GPU-CPU Performance Portability of OpenCL for 3D Stencil Computations. ICPADS 2013: 78-85 - [c48]Wentao Jia, Rui Li, Chunyuan Zhang:
An Adaptive Low-Overhead Mechanism for Dependable General-Purpose Many-Core Processors. ICT-EurAsia 2013: 337-342 - [c47]Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang:
On-demand thread-level fault detection in a concurrent programming environment. ICSAMOS 2013: 255-262 - [c46]Huayou Su, Nan Wu, Mei Wen, Chunyuan Zhang, Xing Cai:
On the GPU Performance of 3D Stencil Computations Implemented in OpenCL. ISC 2013: 125-135 - 2012
- [j6]Hong-Lin Zhang, Chunyuan Zhang, Dong Liu:
Identification method of independent module for dynamic fault tree with interdependent basic events and repeated events. Int. J. Comput. Appl. Technol. 43(2): 168-178 (2012) - [c45]Mei Wen, Huayou Su, Wenjie Wei, Nan Wu, Xing Cai, Chunyuan Zhang:
Using 1000+ GPUs and 10000+ CPUs for Sedimentary Basin Simulations. CLUSTER 2012: 27-35 - [c44]Mei Wen, Nan Wu, Qianming Yang, Chunyuan Zhang, Liang Zhao:
The masala machine: accelerating thread-intensive and explicit memory management programs with dynamically reconfigurable FPGAs (abstract only). FPGA 2012: 265 - [c43]Changqing Xun, Mei Wen, Nan Wu, Chunyuan Zhang, Hayden Kwok-Hay So:
Extending BORPH for shared memory reconfigurable computers. FPL 2012: 563-566 - [c42]Yi He, Maolin Guan, Chunyuan Zhang, Tian Tian, Qianming Yang:
Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW Compression. HPCC-ICESS 2012: 25-32 - [c41]Huayou Su, Jun Chai, Mei Wen, Ju Ren, Chunyuan Zhang:
Parallelization Design of Irregular Algorithms of Video Processing on GPUs. ICME 2012: 997-1002 - [c40]Nan Wu, Mei Wen, Huayou Su, Ju Ren, Chunyuan Zhang:
A Parallel H.264 Encoder with CUDA: Mapping and Evaluation. ICPADS 2012: 276-283 - [c39]Wentao Jia, Chunyuan Zhang, Jian Fu, Rui Li:
Architecting Dependable Many-Core Processors Using Core-Level Dynamic Redundancy. ISCTCS 2012: 681-688 - [c38]Qiang Lan, Changqing Xun, Mei Wen, Huayou Su, Lifang Liu, Chunyuan Zhang:
Improving Performance of GPU Specific OpenCL Program on CPUs. PDCAT 2012: 356-360 - 2011
- [j5]Nan Wu, Qianming Yang, Mei Wen, Yi He, Ju Ren, Maolin Guan, Chunyuan Zhang:
Tiled Multi-Core Stream Architecture. Trans. High Perform. Embed. Archit. Compil. 4: 274-293 (2011) - [c37]Huayou Su, Nan Wu, Chunyuan Zhang, Mei Wen, Ju Ren:
A Multilevel Parallel Intra Coding for H.264/AVC Based on CUDA. ICIG 2011: 76-81 - [c36]Huayou Su, Chunyuan Zhang, Jun Chai, Mei Wen, Nan Wu, Ju Ren:
High-efficient software parallel CAVLC encoder based on programmable stream processor. ACM Multimedia 2011: 1333-1336 - [c35]Huayou Su, Chunyuan Zhang, Jun Chai, Mei Wen, Nan Wu, Ju Ren:
A high-efficient software parallel CAVCL encoder based on GPU. TSP 2011: 534-540 - 2010
- [c34]Qianming Yang, Nan Wu, Mei Wen, Yi He, Huayou Su, Chunyuan Zhang:
SAT: A Stream Architecture Template for Embedded Applications. CIT 2010: 1711-1718 - [c33]Yi He, Ju Ren, Mei Wen, Qianming Yang, Nan Wu, Chunyuan Zhang:
Software Managed Instruction Scratchpad Memory Optimization in Stream Architecture Based on Hot Code Analysis of Kernels. DSD 2010: 823-830 - [c32]Ju Ren, Mei Wen, Chunyuan Zhang, Huayou Su, Yi He, Nan Wu:
A Parallel Streaming Motion Estimation for Real-Time HD H.264 Encoding on Programmable Processors. FCST 2010: 154-160 - [c31]Hong-Lin Zhang, Chunyuan Zhang, Dong Liu, Gui-Wu Xie:
Importance Measure Method for Dynamic Fault Tree Based on Isomorphic Node. ICICA (LNCS) 2010: 9-16
2000 – 2009
- 2009
- [j4]Li Li, Chunyuan Zhang:
Optimal Channel Width Adaptation, Logical Topology Design, and Routing in Wireless Mesh Networks. EURASIP J. Wirel. Commun. Netw. 2009 (2009) - [c30]Li Li, Chunyuan Zhang:
Joint Channel Width Adaptation, Topology Control, and Routing for Multi-Radio Multi-Channel Wireless Mesh Networks. CCNC 2009: 1-5 - [c29]Ju Ren, Yi He, Wei Wu, Mei Wen, Nan Wu, Chunyuan Zhang:
Software parallel CAVLC encoder based on stream processing. ESTIMedia 2009: 126-133 - [c28]Nan Wu, Mei Wen, Ju Ren, Yi He, Changqing Xun, Wei Wu, Chunyuan Zhang:
Cache streamization for high performance stream processor. HiPC 2009: 140-149 - [c27]Nan Wu, Mei Wen, Wei Wu, Ju Ren, Huayou Su, Changqing Xun, Chunyuan Zhang:
Streaming HD H.264 encoder on programmable processors. ACM Multimedia 2009: 371-380 - [c26]