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Philippe Hurat
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2000 – 2009
- 2008
- [c8]Nishath Verghese, Richard Rouse, Philippe Hurat:
Predictive models and CAD methodology for pattern dependent variability. ASP-DAC 2008: 213-218 - 2007
- [c7]Pei-Hua Wang, Brian Lee, Gus Han, Richard Rouse, Philippe Hurat, Nishath Verghese:
Addressing Parametric Impact of Systematic Pattern Variations in Digital IC Design. CICC 2007: 587-590 - [c6]Thierry Devoivre, Richard Rouse, Nishath Verghese, Philippe Hurat:
Modeling and Validation of Silicon Contour-Based Extraction and Simulation of Non-Uniform Devices. CICC 2007: 615-618 - [c5]Darsun Tsiena, Chien Kuo Wang, William W. J. Wang, Yajun Ran, Philippe Hurat, Nishath Verghese:
Context-specific leakage and delay analysis of a 65nm standard cell library for lithography-induced variability. SoCC 2007: 261-268 - 2005
- [c4]Michel Côté, Philippe Hurat:
Standard Cell Printability Grading and Hot Spot Detection. ISQED 2005: 264-269 - [c3]Srinivas Raghvendra, Philippe Hurat:
DFM: Linking Design and Manufacturing. VLSI Design 2005: 705-708 - 2004
- [c2]Michel Côté, Philippe Hurat:
Layout Printability Optimization Using a Silicon Simulation Methodology. ISQED 2004: 159-164 - 2001
- [c1]Michael Sanie, Michel Côté, Philippe Hurat, Vinod Malhotra:
A Practical Application of Full-Feature Alternating Phase-Shifting Technology for a Phase-Aware Standard-Cell Design Flow. DAC 2001: 93-96
1980 – 1989
- 1989
- [b1]Philippe Hurat:
APLYSIE : un circuit neuro-mimétique : réalisation et intégration sur tranche. (APLYSIE: a neuro-mimetic integrated circuit. Design and wafer scale integration). Grenoble Institute of Technology, France, 1989
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