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Robert W. Dutton
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- affiliation: Stanford University, USA
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Books and Theses
- 1993
- [b1]Robert W. Dutton, Zhiping Yu:
Technology CAD - computer simulation of IC processes and devices. The Kluwer international series in engineering and computer science 243, Kluwer 1993, ISBN 978-0-7923-9379-5, pp. I-XVI, 1-373
Journal Articles
- 2011
- [j52]Shuqing Cao, Jung-Hoon Chun, Akram A. Salman, Stephen G. Beebe, Robert W. Dutton:
Gate-controlled field-effect diodes and silicon-controlled rectifier for charged-device model ESD protection in advanced SOI technology. Microelectron. Reliab. 51(4): 756-764 (2011) - [j51]Evelyn Mintarno, Joëlle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao
, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra
:
Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 760-773 (2011) - 2010
- [j50]Reza Navid, Thomas H. Lee, Robert W. Dutton:
Circuit-Based Characterization of Device Noise Using Phase Noise Data. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1265-1272 (2010) - [j49]Shuqing Cao, Jung-Hoon Chun, Stephen G. Beebe, Robert W. Dutton:
ESD Design Strategies for High-Speed Digital and RF Circuits in Deeply Scaled Silicon Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2301-2311 (2010) - 2007
- [j48]Wolfgang Soldner, Martin Streibl, U. Hodel, Marc Tiebout, Harald Gossner
, Doris Schmitt-Landsiedel, Jung-Hoon Chun, Choshu Ito, Robert W. Dutton:
RF ESD protection strategies: Codesign vs. low-C protection. Microelectron. Reliab. 47(7): 1008-1015 (2007) - [j47]Cosmin Iorga, Yi-Chang Lu
, Robert W. Dutton:
A Built-in Technique for Measuring Substrate and Power-Supply Digital Switching Noise Using PMOS-Based Differential Sensors and a Waveform Sampler in System-on-Chip Applications. IEEE Trans. Instrum. Meas. 56(6): 2330-2337 (2007) - 2006
- [j46]Hai Lan, Tze Wee Chen, Chi On Chui, Parastoo Nikaeen, Jae Wook Kim, Robert W. Dutton:
Synthesized Compact Models and Experimental Verifications for Substrate Noise Coupling in Mixed-Signal ICs. IEEE J. Solid State Circuits 41(8): 1817-1829 (2006) - [j45]Tze Wee Chen, Choshu Ito, William Loh, Robert W. Dutton:
Post-breakdown leakage resistance and its dependence on device area. Microelectron. Reliab. 46(9-11): 1612-1616 (2006) - 2005
- [j44]Reza Navid, Thomas H. Lee, Robert W. Dutton:
Minimum achievable phase noise of RC oscillators. IEEE J. Solid State Circuits 40(3): 630-637 (2005) - [j43]Reza Navid, Thomas H. Lee, Robert W. Dutton:
An analytical formulation of phase noise of signals with Gaussian-distributed jitter. IEEE Trans. Circuits Syst. II Express Briefs 52-II(3): 149-153 (2005) - 2004
- [j42]Binh Quang Le, Michael Achter, Chin Ghee Chng, Xin Guo, Lee Cleveland, Pau-Ling Chen, Michael Van Buskirk, Robert W. Dutton:
Virtual-ground sensing techniques for a 49-ns/200-MHz access time 1.8-V 256-Mb 2-bit-per-cell flash memory. IEEE J. Solid State Circuits 39(11): 2014-2023 (2004) - 2002
- [j41]Bendik Kleveland, Xiaoning Qi, Liam Madden, Takeshi Furusawa, Robert W. Dutton, Mark A. Horowitz, S. Simon Wong:
High-frequency characterization of on-chip digital interconnects. IEEE J. Solid State Circuits 37(6): 716-725 (2002) - [j40]Jung-Suk Goo, Hee-Tae Ahn, Donald J. Ladwig, Zhiping Yu, Thomas H. Lee, Robert W. Dutton:
A noise optimization technique for integrated low-noise amplifiers. IEEE J. Solid State Circuits 37(8): 994-1002 (2002) - 2000
- [j39]Robert W. Dutton, Andrzej J. Strojwas:
Perspectives on technology and technology-driven CAD. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(12): 1544-1560 (2000) - 1999
- [j38]Edward K. Chan, Krishna Garikipati, Robert W. Dutton:
Comprehensive Static Characterization of Vertical Electrostatically Actuated Polysilicon Beams. IEEE Des. Test Comput. 16(4): 58-65 (1999) - 1998
- [j37]Jaejune Jang, Edwin C. Kan, Torkel Arnborg, Ted Johansson
, Robert W. Dutton:
Characterization of RF power BJT and improvement of thermal stability with nonlinear base ballasting. IEEE J. Solid State Circuits 33(9): 1428-1432 (1998) - [j36]Zhiping Yu, Robert W. Dutton:
Second Order Newton Iteration Method and Its Application to MOS Compact Modeling and Circuit Simulation. VLSI Design 6(1-4): 141-145 (1998) - [j35]Edwin C. Kan, Gyoyoung Jin, Zhiping Yu, Robert W. Dutton:
Observation of Anomalous Negative Differential Resistance in Diode Breakdown Simulation Using Carrier Temperature Dependent Impact Ionization. VLSI Design 6(1-4): 299-302 (1998) - [j34]Robert W. Dutton, Edwin C. Kan:
Hierarchical Process Simulation for Nano-Electronics. VLSI Design 6(1-4): 385-391 (1998) - [j33]Edwin C. Kan, Robert W. Dutton:
Modeling of Poly-Silicon Carrier Transport with Explicit Treatment of Grains and Grain Boundaries. VLSI Design 8(1-4): 533-537 (1998) - 1996
- [j32]Narayan R. Aluru
, Kincho H. Law, Robert W. Dutton:
Simulation of the hydrodynamic device model on distributed memory parallel computers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(9): 1029-1047 (1996) - 1995
- [j31]Edwin C. Kan, Zhiping Yu, Robert W. Dutton, Datong Chen, Umberto Ravaioli:
Formulation of Macroscopic Transport Models for Numerical Simulation of Semiconductor Devices. VLSI Design 3(2): 211-224 (1995) - 1994
- [j30]Ronald J. G. Goossens, Stephen G. Beebe, Zhiping Yu, Robert W. Dutton:
An automatic biasing scheme for tracing arbitrarily shaped I-V curves. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(3): 310-317 (1994) - 1993
- [j29]Datong Chen, Satoshi Sugino, Zhiping Yu, Robert W. Dutton:
Modeling of the charge balance condition on floating gates and simulation of EEPROMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10): 1499-1502 (1993) - 1992
- [j28]Edward W. Scheckler, Alexander S. Wong, Robert K. Wang, Goodwin R. Chin, John R. Camagna, Andrew R. Neureuther, Robert W. Dutton:
A utility-based integrated system for process simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(7): 911-920 (1992) - [j27]Ze-Yi Wang, Ke-Chih Wu, Robert W. Dutton:
An approach to construct pre-conditioning matrices for block iteration of linear equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(11): 1334-1343 (1992) - 1991
- [j26]Ke-Chih Wu, Goodwin R. Chin, Robert W. Dutton:
A STRIDE towards practical 3-D device simulation-numerical and visualization considerations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(9): 1132-1140 (1991) - 1990
- [j25]D. Y. Cheng, J. T. Deutsch, Robert W. Dutton:
'Defensive programming' in the rapid development of a parallel scientific program. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(6): 665-669 (1990) - [j24]Chiaki Takano, Zhiping Yu, Robert W. Dutton:
A nonequilibrium one-dimensional quantum-mechanical simulation for AlGaAs/GaAs HEMT structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(11): 1217-1224 (1990) - 1989
- [j23]William D. Wilson, Robert J. Asaro, Robert W. Dutton, Juan M. Sanchez, David J. Srolovitz
, Richard H. Boyd, William A. Goddard III, John R. Smith, Wilhelm G. Wolfer:
The impact of supercomputing capabilities on U.S. materials science and technology. Future Gener. Comput. Syst. 5(2-3): 283-293 (1989) - [j22]Chang G. Hwang, Robert W. Dutton:
Improved physical modeling of submicron MOSFETs based on parameter extraction using 2-D simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(4): 370-379 (1989) - [j21]Ke-Chih Wu, Robert F. Lucas, Ze-Yi Wang, Robert W. Dutton:
New approaches in a 3-D one-carrier device solver. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(5): 528-537 (1989) - [j20]Hal R. Yeager, Robert W. Dutton:
Improvement in norm-reducing Newton methods for circuit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(5): 538-546 (1989) - [j19]James B. Kuo, G. P. Rosseel, Robert W. Dutton:
Two-dimensional analysis of a merged BiPMOS device. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(8): 929-932 (1989) - [j18]James B. Kuo, Tsen-Shau Yang, Robert W. Dutton, Bruce A. Wooley:
Two-dimensional transient analysis of a collector-up ECL inverter. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(10): 1038-1045 (1989) - [j17]Lee-Sup Kim, Robert W. Dutton:
Modeling of the distributed gate RC effect in MOSFET's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(12): 1365-1367 (1989) - 1988
- [j16]Mark E. Law, Robert W. Dutton:
Verification of analytic point defect models using SUPREM-IV [dopant diffusion]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(2): 181-190 (1988) - [j15]Michael R. Kump, Robert W. Dutton:
The efficient simulation of coupled point defect and impurity diffusion. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(2): 191-204 (1988) - [j14]Vered Marash, Robert W. Dutton:
Methodology for submicron device model development. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(2): 299-306 (1988) - [j13]Wayne H. Wolf, Robert G. Mathews, John A. Newkirk, Robert W. Dutton:
Algorithms for optimizing, two-dimensional symbolic layout compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(4): 451-466 (1988) - [j12]Chang G. Hwang, Robert W. Dutton:
Hot carrier transport effect in Schottky-barrier diode grown by MBE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(5): 578-583 (1988) - [j11]D. Y. Cheng, Chang G. Hwang, Robert W. Dutton:
PISCES-MC: a multiwindow, multimethod 2-D device simulator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(9): 1017-1026 (1988) - 1987
- [j10]Zhiping Yu, Robert W. Dutton, Massimo Vanzi:
An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(1): 41-45 (1987) - [j9]Hiroshi Iwai, Mark R. Pinto, Conor S. Rafferty, J. E. Oristian, Robert W. Dutton:
Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(2): 173-184 (1987) - 1986
- [j8]Robert W. Dutton, Mark R. Pinto:
The use of computer aids in IC technology evolution. Proc. IEEE 74(12): 1730-1740 (1986) - [j7]Sun Young Hwang, Robert W. Dutton, Tom Blank:
A Best-First Search Algorithm for Optimal PLA Folding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5(3): 433-442 (1986) - 1985
- [j6]N. N. Chan, Robert W. Dutton:
Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(2): 143-149 (1985) - [j5]Hal R. Yeager, Robert W. Dutton:
An Approach to Solving Multiparticle Diffusion Exhibiting Nonlinear Stiff Coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 408-420 (1985) - [j4]Conor S. Rafferty, Mark R. Pinto, Robert W. Dutton:
Iterative Methods in Semiconductor Device Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 462-471 (1985) - [j3]Enrico Sangiorgi, Mark R. Pinto, Stanley E. Swirhun, Robert W. Dutton:
Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 561-574 (1985) - 1983
- [j2]Mark Horowitz, Robert W. Dutton:
Resistance Extraction from Mask Layout Data. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(3): 145-150 (1983) - 1982
- [j1]Donald B. Estreich, Robert W. Dutton:
Modeling Latch-Up in CMOS Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1(4): 157-162 (1982)
Conference and Workshop Papers
- 2010
- [c25]Evelyn Mintarno, Joëlle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao
, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra:
Optimized self-tuning for circuit aging. DATE 2010: 586-591 - 2009
- [c24]Shuqing Cao, Tze Wee Chen, Stephen G. Beebe, Robert W. Dutton:
ESD design challenges and strategies in deeply-scaled integrated circuits. CICC 2009: 681-688 - 2008
- [c23]Parastoo Nikaeen, Boris Murmann
, Robert W. Dutton:
Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs. ISQED 2008: 396-400 - [c22]Jae Wook Kim, Boris Murmann
, Robert W. Dutton:
Hybrid Integration of Bandgap Reference Circuits Using Silicon ICs and Germanium Devices. ISQED 2008: 429-432 - 2007
- [c21]Reza Navid, Thomas H. Lee, Robert W. Dutton:
A Circuit-Based Noise Parameter Extraction Technique for MOSFETs. ISCAS 2007: 3347-3350 - 2005
- [c20]Hai Lan, Tze Wee Chen, Chi On Chui, Parastoo Nikaeen, Jae Wook Kim, Robert W. Dutton:
Synthesized compact model and experimental results for substrate noise coupling in lightly doped processes. CICC 2005: 469-472 - 2004
- [c19]Hai Lan, Robert W. Dutton:
Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs. DATE 2004: 836-843 - [c18]Georgios Veronis, Yi-Chang Lu
, Robert W. Dutton:
Modeling of Wave Behavior of Substrate Noise Coupling for Mixed-Signal IC Design. ISQED 2004: 303-308 - 2003
- [c17]Reza Navid, Thomas H. Lee, Robert W. Dutton:
Lumped, inductorless oscillators: how far can they go? [phase noise reduction limit]. CICC 2003: 543-546 - [c16]Hai Lan, Zhiping Yu, Robert W. Dutton:
A CAD-Oriented Modeling Approach of Frequency-Dependent Behavior of Substrate Noise Coupling for Mixed-Signal IC Design. ISQED 2003: 195-200 - 2002
- [c15]Gaofeng Wang
, Xiaoning Qi, Zhiping Yu, Robert W. Dutton:
Accurate Model of Metal-Insulator-Semiconductor Interconnects. ISQED 2002: 48-52 - [c14]Tae-young Oh, Zhiping Yu, Robert W. Dutton:
AC Analysis of Thin Gate Oxide MOS with Quantum Mechanical Corrections. ISQED 2002: 326-330 - 2001
- [c13]Yi-Chang Lu
, Kaustav Banerjee, Mustafa Celik, Robert W. Dutton:
A fast analytical technique for estimating the bounds of on-chip clock wire inductance. CICC 2001: 241-244 - [c12]Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis:
Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). ICCAD 2001: 174 - [c11]Choshu Ito, Kaustav Banerjee, Robert W. Dutton:
Analysis and Design of ESD Protection Circuits for High-Frequency/RF Applications. ISQED 2001: 117-122 - [c10]Nathan Wilson, Kenneth Wang, Robert W. Dutton, Charles Taylor:
A Software Framework for Creating Patient Specific Geometric Models from Medical Imaging Data for Simulation Based Medical Planning of Vascular Surgery. MICCAI 2001: 449-456 - 2000
- [c9]Xiaoning Qi, Gaofeng Wang
, Zhiping Yu, Robert W. Dutton, Tak Young, Norman Chang:
On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation. CICC 2000: 487-490 - [c8]Zhiping Yu, Dan Yergeau, Robert W. Dutton, O. Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie:
Full Chip Thermal Simulation. ISQED 2000: 145-150 - 1995
- [c7]Boris Troyanovsky, Zhiping Yu, Lydia So, Robert W. Dutton:
Relaxation-based harmonic balance technique for semiconductor device simulation. ICCAD 1995: 700-703 - [c6]Bruce P. Herndon, Narayan R. Aluru, Arthur Raefsky, Ronald J. G. Goossens, Kincho H. Law, Robert W. Dutton:
A Methodology for Parallelizing PDE Solvers: Application to Semiconductor Device Simulation. PP 1995: 239-240 - 1991
- [c5]Goodwin R. Chin, Walter C. Dietrich Jr., Duane S. Boning, Alexander S. Wong, Andrew R. Neureuther, Robert W. Dutton:
Linking TCAD to EDA - Benefits and Issues. DAC 1991: 573-578 - 1989
- [c4]John S. Wenstrand, Hiroshi Iwai, Robert W. Dutton:
A manufacturing-oriented environment for synthesis of fabrication processes. ICCAD 1989: 376-379 - 1985
- [c3]Lu Sha, Robert W. Dutton:
An analytical algorithm for placement of arbitrarily sized rectangular blocks. DAC 1985: 602-608 - 1981
- [c2]Ronald Waxman, Jonathan Allen, Robert W. Dutton, John M. Gould, Charles W. Gwyn, Paul Losleben, Dan C. Nash, Lawrence Sumney, H. Wayne Spence:
Government interest and involvement in design automation development (Panel Discussion). DAC 1981: 330-331 - [c1]Robert W. Dutton:
Position statement - tools for design automation from a university point of view. DAC 1981: 333
Coauthor Index
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