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"On-chip inductance modeling and RLC extraction of VLSI interconnects for ..."

Xiaoning Qi et al. (2000)

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DOI: 10.1109/CICC.2000.852714

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-06

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Xiaoning Qi, Gaofeng Wang, Zhiping Yu, Robert W. Dutton, Tak Young, Norman Chang:
On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation. CICC 2000: 487-490

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