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2010 – 2019
- 2017
[j41]Hyun-Wook Lim, Sung-Won Choi, Jeong-Keun Ahn, Woong-Ki Min, Sang-Kyu Lee, Chang-Hoon Baek, Jae-Youl Lee, Gyoo-Cheol Hwang, Young-Hyun Jun, Bai-Sun Kong
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A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface. IEEE J. Solid State Circuits 52(6): 1563-1575 (2017)- 2015
- [c36]Hyun-Wook Lim, Sung-Won Choi, Sang-Kyu Lee, Chang-Hoon Baek, Jae-Youl Lee, Gyoo-Cheol Hwang, Bai-Sun Kong, Young-Hyun Jun:
10.4 A 5.8Gb/s adaptive integrating duobinary-based DFE receiver for multi-drop memory interface. ISSCC 2015: 1-3 - 2014
- [j40]Kyoung-Ho Kim, Jun-Han Bae, Young-Hyun Jun, Kee-Won Kwon:
A 5-Gbit/s CDR circuit with 1.4 mW multi-PFD phase rotating PLL. IEICE Electron. Express 11(24): 20140828 (2014) - [j39]Joung-Yeal Kim, Su-Jin Park, Kee-Won Kwon, Bai-Sun Kong, Joo-Sun Choi, Young-Hyun Jun:
CMOS Charge Pump With No Reversion Loss and Enhanced Drivability. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1441-1445 (2014) - 2013
- [j38]Seong-Young Seo, Jung-Hoon Chun, Young-Hyun Jun, Kee-Won Kwon:
An all-digital PLL with supply insensitive digitally controlled oscillator. IEICE Electron. Express 10(5): 20120902 (2013) - [j37]Won-Hwa Shin, Young-Hyun Jun, Bai-Sun Kong:
Blind-oversampling adaptive oversample-level DFE receiver for unsynchronized global on-chip serial links. IEICE Electron. Express 10(9): 20120830 (2013) - [j36]June-Hee Lee, Sang-Hoon Kim, Young-Hyun Jun, Kee-Won Kwon, Jung-Hoon Chun:
A fully digital clock and data recovery with fast frequency offset acquisition technique for MIPI LLI applications. IEICE Electron. Express 10(10): 20130178 (2013) - [j35]Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH. IEEE J. Solid State Circuits 48(4): 948-959 (2013) - [j34]Won-Hwa Shin, Young-Hyun Jun, Bai-Sun Kong:
A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling. IEEE Trans. Circuits Syst. II Express Briefs 60-II(7): 412-416 (2013) - [j33]Ji-Soo Chang, Hyoung-Seok Oh, Young-Hyun Jun, Bai-Sun Kong:
Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control. IEEE Trans. Circuits Syst. II Express Briefs 60-II(10): 712-716 (2013) - [j32]Jae-Hyuck Woo, Jae-Goo Lee, Young-Hyun Jun, Bai-Sun Kong:
Accurate quadruple-gamma-curve correction for line inversion-based mobile TFT-LCD driver ICS. IEEE Trans. Consumer Electron. 59(3): 443-451 (2013) - 2012
- [j31]Sang-Keun Han, KeeChan Park, Young-Hyun Jun, Bai-Sun Kong:
High-Speed Low-Power Boosted Level Converters for Dual Supply Systems. IEICE Trans. Electron. 95-C(11): 1824-1826 (2012) - [j30]Jung-Sik Kim, Chi Sung Oh, Hocheol Lee, Donghyuk Lee, Hyong-Ryol Hwang, Sooman Hwang, Byongwook Na, Joungwook Moon, Jin-Guk Kim, Hanna Park, Jang-Woo Ryu, Kiwon Park, Sang-Kyu Kang, So-Young Kim, Hoyoung Kim, Jong-Min Bang, Hyunyoon Cho, Minsoo Jang, Cheolmin Han, Jung-Bae Lee, Joo-Sun Choi, Young-Hyun Jun:
A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking. IEEE J. Solid State Circuits 47(1): 107-116 (2012) - [j29]Chulbum Kim, Jinho Ryu, Tae-Sung Lee, Hyunggon Kim, Jaewoo Lim, Jaeyong Jeong, Seonghwan Seo, Hongsoo Jeon, Bokeun Kim, Inyoul Lee, Dooseop Lee, Pansuk Kwak, Seongsoon Cho, Yongsik Yim, Changhyun Cho, Woopyo Jeong, Kwang-Il Park, Jin-Man Han, Duheon Song, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface. IEEE J. Solid State Circuits 47(4): 981-989 (2012) - [c35]Youngkyun Jeong, Yoon-Chul Choi, Eun-Ji Choi, Seogheon Ham, Kee-Won Kwon, Young-Hyun Jun, Jung-Hoon Chun:
0.37mW/Gb/s low power SLVS transmitter for battery powered applications. ISCAS 2012: 1955-1958 - [c34]Sung-Pil Choi, Gyoo-Cheol Hwang, Young-Hyun Jun, Kee-Won Kwon, Jung-Hoon Chun:
A low-power two-line inversion method for driving LCD panels. ISCAS 2012: 1995-1998 - [c33]Kwang-Ho Kim, Bai-Sun Kong, Young-Hyun Jun:
Adaptive frequency-controlled ultra-fast hysteretic buck converter for portable devices. ISOCC 2012: 5-8 - [c32]Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC 2012: 430-432 - [c31]Seung-Hwan Shin, Dong-Kyo Shim, Jaeyong Jeong, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, Tae-Young Kim, Hyun Wook Park, Hyun-Jun Yoon, Youngsun Song, Yoon-Hee Choi, Sang-Won Shim, Yang-Lo Ahn, Ki-Tae Park, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory. VLSIC 2012: 132-133 - [c30]Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH. VLSIC 2012: 136-137 - 2011
- [j28]Dong-Su Lee, Sung-Chan Kang, Young-Hyun Jun, Bai-Sun Kong:
A Novel Body Bias Selection Scheme for Leakage Minimization. IEICE Trans. Electron. 94-C(9): 1490-1493 (2011) - [j27]Jong-Pil Son, Jin Ho Kim, Woo Song Ahn, Seung Uk Han, Satoru Yamada, Byung-Sick Moon, Churoo Park, Hong-Sun Hwang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Soo-Won Kim:
An Area-Efficient, Low-VDD, Highly Reliable Multi-Cell Antifuse System Fully Operative in DRAMs. IEICE Trans. Electron. 94-C(10): 1690-1697 (2011) - [j26]Tae-Young Oh, Young-Soo Sohn, Seung-Jun Bae, Min-Sang Park, Ji-Hoon Lim, Yong-Ki Cho, Dae-Hyun Kim, Dong-Min Kim, Hye-Ran Kim, Hyun-Joong Kim, Jin-Hyun Kim, Jin-Kook Kim, Young-Sik Kim, Byeong-Cheol Kim, Sang-Hyup Kwak, Jae-Hyung Lee, Jae-Young Lee, Chang-Ho Shin, Yun-Seok Yang, Beom-Sig Cho, Sam-Young Bang, Hyang-Ja Yang, Young-Ryeol Choi, Gil-Shin Moon, Cheol-Goo Park, Seokwon Hwang, Jeong-Don Lim, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun:
A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction. IEEE J. Solid State Circuits 46(1): 107-118 (2011) - [j25]Dong-Su Lee, Young-Hyun Jun, Bai-Sun Kong:
Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM. IEEE J. Solid State Circuits 46(10): 2396-2405 (2011) - [j24]Seong-Young Seo, Jung-Hoon Chun, Young-Hyun Jun, Seok Kim, Kee-Won Kwon:
A Digitally Controlled Oscillator With Wide Frequency Range and Low Supply Sensitivity. IEEE Trans. Circuits Syst. II Express Briefs 58-II(10): 632-636 (2011) - [c29]Seung-Jae Choi, Young-Hyun Jun, Bai-Sun Kong:
CMOS charge pump with separated charge sharing for improved boosting ratio and relaxed timing restriction. ASICON 2011: 133-136 - [c28]Jae-Hyuck Woo, Jae-Goo Lee, In-Suk Kim, Young-Hyun Jun, Gyoo-Cheol Hwang, Myung-Hee Lee, Bai-Sun Kong:
Line inversion-based mobile TFT-LCD driver IC with accurate quadruple-gamma-curve correction. A-SSCC 2011: 341-344 - [c27]Young-Wook Kim, Joung-Yeal Kim, Young-Hyun Jun, Bai-Sun Kong:
Novel Low-Voltage Small-Area I/O Buffer for Mixed-Voltage Application. FGIT-CA/CES3 2011: 364-370 - [c26]Jung-Sik Kim, Chi Sung Oh, Hocheol Lee, Donghyuk Lee, Hyong-Ryol Hwang, Sooman Hwang, Byongwook Na, Joungwook Moon, Jin-Guk Kim, Hanna Park, Jang-Woo Ryu, Kiwon Park, Sang-Kyu Kang, So-Young Kim, Hoyoung Kim, Jong-Min Bang, Hyunyoon Cho, Minsoo Jang, Cheolmin Han, Jung-Bae Lee, Kyehyun Kyung, Joo-Sun Choi, Young-Hyun Jun:
A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking. ISSCC 2011: 496-498 - [c25]Seung-Jun Bae, Young-Soo Sohn, Tae-Young Oh, Si-Hong Kim, Yun-Seok Yang, Dae-Hyun Kim, Sang-Hyup Kwak, Ho-Seok Seol, Chang-Ho Shin, Min-Sang Park, Gong-Heom Han, Byeong-Cheol Kim, Yong-Ki Cho, Hye-Ran Kim, Su-Yeon Doo, Young-Sik Kim, Dong-Seok Kang, Young-Ryeol Choi, Sam-Young Bang, Sun-Young Park, Yong-Jae Shin, Gil-Shin Moon, Cheol-Goo Park, Woo-Seop Kim, Hyang-Ja Yang, Jeong-Don Lim, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun:
A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW. ISSCC 2011: 498-500 - [c24]Hoeju Chung, Byung-Hoon Jeong, ByungJun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-jun Lee, Sooho Cha, Dukmin Kwon, Sang-Tae Kim, Sunghoon Kim, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, Sunghyun Jun, Jaewook Lee, KiSeung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, KwangJin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, Young-Hyun Jun:
A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW. ISSCC 2011: 500-502 - [c23]Seong-Won Kang, Jung-Hoon Chun, Young-Hyun Jun, Kee-Won Kwon:
A study on accelerated built-in self test of multi-Gb/s high speed interfaces. NESEA 2011: 1-4 - 2010
- [j23]Joung-Yeal Kim, Su-Jin Park, Yong-Ki Kim, Sang-Keun Han, Young-Hyun Jun, Chil-Gee Lee, Tae Hee Han, Bai-Sun Kong:
New Low-Voltage Low-Latency Mixed-Voltage I/O Buffer. IEICE Trans. Electron. 93-C(5): 709-711 (2010) - [j22]Jae-Hyuck Woo, Jae-Goo Lee, Young-Hyun Jun, Bai-Sun Kong:
Low-Power High-Speed Data Serializer for Mobile TFT-LCD Driver ICs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(12): 2621-2622 (2010) - [j21]Uksong Kang, Hoeju Chung, Seongmoo Heo, Dukha Park, Hoon Lee, Jin Ho Kim, Soon-Hong Ahn, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jaewook Lee, Han-Sung Joo, Woo-Seop Kim, Dong Hyeon Jang, Nam-Seog Kim, Jung-Hwan Choi, Tae-Gyeong Chung, Jei-Hwan Yoo, Joo-Sun Choi, Changhyun Kim, Young-Hyun Jun:
8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology. IEEE J. Solid State Circuits 45(1): 111-119 (2010) - [j20]Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Joo-Sun Choi, Kinam Kim:
Correction on "A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme" [Aug 09 2222-2232]. IEEE J. Solid State Circuits 45(2): 497 (2010) - [j19]Ki-Whan Song, Jinyoung Kim, Jae-Man Yoon, Sua Kim, Huijung Kim, Hyun-Woo Chung, Hyungi Kim, Kanguk Kim, Hwan-Wook Park, Hyun Chul Kang, Nam-Kyun Tak, Dukha Park, Woo-Seop Kim, Yeong-Taek Lee, Yong Chul Oh, Gyo-Young Jin, Jei-Hwan Yoo, Donggun Park, Kyungseok Oh, Changhyun Kim, Young-Hyun Jun:
A 31 ns Random Cycle VCAT-Based 4F 2 DRAM With Manufacturability and Enhanced Cell Efficiency. IEEE J. Solid State Circuits 45(4): 880-888 (2010) - [j18]Jae-Hyuck Woo, Jae-Goo Lee, Young-Hyun Jun, Bai-Sun Kong:
A line inversion-based stepwise data driving for low-power mobile TFT-LCDs. IEEE Trans. Consumer Electron. 56(2): 1002-1009 (2010) - [c22]Haesick Sul, Young-Hyun Jun, Bai-Sun Kong:
A temperature-stabilized voltage reference utilizing MOS body effect. APCCAS 2010: 792-795 - [c21]Sang-Keun Han, KeeChan Park, Bai-Sun Kong, Young-Hyun Jun:
High-speed low-power bootstrapped level converter for dual supply systems. APCCAS 2010: 871-874 - [c20]Jun-Hyun Bae, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Jae-Yoon Sim, Hong-June Park:
A crosstalk-and-ISI equalizing receiver in 2-drop single-ended SSTL memory channel. CICC 2010: 1-4 - [c19]Jong-Pil Son, Jin Ho Kim, Woo Song Ahn, Seung Uk Han, Byung-Sick Moon, Churoo Park, Hong-Sun Hwang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Soo-Won Kim:
A highly reliable multi-cell antifuse scheme using DRAM cell capacitors. ESSCIRC 2010: 482-485 - [c18]Tae-Young Oh, Young-Soo Sohn, Seung-Jun Bae, Min-Sang Park, Ji-Hoon Lim, Yong-Ki Cho, Dae-Hyun Kim, Dong-Min Kim, Hye-Ran Kim, Hyun-Joong Kim, Jin-Hyun Kim, Jin-Kook Kim, Young-Sik Kim, Byeong-Cheol Kim, Sang-Hyup Kwak, Jae-Hyung Lee, Jae-Young Lee, Chang-Ho Shin, Yun-Seok Yang, Beom-Sig Cho, Sam-Young Bang, Hyang-Ja Yang, Young-Ryeol Choi, Gil-Shin Moon, Cheol-Goo Park, Seokwon Hwang, Jeong-Don Lim, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun:
A 7Gb/s/pin GDDR5 SDRAM with 2.5ns bank-to-bank active time and no bank-group restriction. ISSCC 2010: 434-435
2000 – 2009
- 2009
- [j17]Su-Jin Park, Yonggu Kang, Joung-Yeal Kim, Tae Hee Han, Young-Hyun Jun, Chil-Gee Lee, Bai-Sun Kong:
CMOS cross-coupled charge pump with improved latch-up immunity. IEICE Electron. Express 6(11): 736-742 (2009) - [j16]Joung-Yeal Kim, Yoon-Suk Park, Young-Hyun Jun, Bai-Sun Kong:
New low-voltage small-area mixed-voltage I/O buffer. IEICE Electron. Express 6(13): 897-903 (2009) - [j15]Byung-Guk Kim, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Soo-In Cho:
A DLL With Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces. IEEE J. Solid State Circuits 44(5): 1522-1530 (2009) - [j14]Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Joo-Sun Choi, Kinam Kim:
A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme. IEEE J. Solid State Circuits 44(8): 2222-2232 (2009) - [j13]Kyung-Soo Ha, Lee-Sup Kim, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim:
A 0.13-µm CMOS 6 Gb/s/pin Memory Transceiver Using Pseudo-Differential Signaling for Removing Common-Mode Noise Due to SSN. IEEE J. Solid State Circuits 44(11): 3146-3162 (2009) - [j12]Joung-Yeal Kim, Young-Hyun Jun, Bai-Sun Kong:
CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction. IEEE Trans. Circuits Syst. II Express Briefs 56-II(1): 11-15 (2009) - [j11]Young-Won Kim, Joo-Seong Kim, Jae-Hyuk Oh, Yoon-Suk Park, Jong-Woo Kim, Kwang-Il Park, Bai-Sun Kong, Young-Hyun Jun:
Low-Power CMOS Synchronous Counter With Clock Gating Embedded Into Carry Propagation. IEEE Trans. Circuits Syst. II Express Briefs 56-II(8): 649-653 (2009) - [c17]Suk-Soo Pyo, Cheol-Ha Lee, Gyun-Hong Kim, Kyu-Myung Choi, Young-Hyun Jun, Bai-Sun Kong:
45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme. ISCAS 2009: 2517-2520 - [c16]Yongsam Moon, Yong-Ho Cho, Hyun-Bae Lee, Byung-Hoon Jeong, Seok-Hun Hyun, Byungchul Kim, In-Chul Jeong, Seong-Young Seo, Junho Shin, Seok-Woo Choi, Ho-Sung Song, Jung-Hwan Choi, Kyehyun Kyung, Young-Hyun Jun, Kinam Kim:
1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture. ISSCC 2009: 128-129 - [c15]Kyung-Soo Ha, Lee-Sup Kim, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim:
A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces. ISSCC 2009: 138-139 - 2008
- [j10]Sang Joon Hwang, Young-Hyun Jun, Man Young Sung:
A pre-emphasis output buffer control scheme for a GDDR3 SDRAM interface. IEICE Electron. Express 5(12): 446-450 (2008) - [j9]Seung-Jun Bae, Kwang-Il Park, Jeong-Don Ihm, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Yoon-Sik Park, Min-Sang Park, Hong-Kyong Lee, Sam-Young Bang, Gil-Shin Moon, Seokwon Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Sunghoon Kim, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim, Soo-In Cho:
An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion. IEEE J. Solid State Circuits 43(1): 121-131 (2008) - [j8]Jung-Sik Kim, Kyung-Woo Nam, Chi Sung Oh, Han Gu Sohn, Donghyuk Lee, Sooyoung Kim, Jong-Wook Park, Yongjun Kim, Mi-Jo Kim, Jin-Guk Kim, Hocheol Lee, Jinhyoung Kwon, Dong Il Seo, Young-Hyun Jun, Kinam Kim:
A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array. IEEE J. Solid State Circuits 43(11): 2381-2389 (2008) - [c14]Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Kinam Kim:
A 5-Gb/s/pin transceiver for DDR memory interface with a crosstalk suppression scheme. CICC 2008: 639-642 - [c13]Chul Soo Kim, Joo-Seong Kim, Bai-Sun Kong, Yongsam Moon, Young-Hyun Jun:
Presetting pulse-based flip-flop. ISCAS 2008: 588-591 - [c12]Youn-Sik Park, Sung-Wook Lee, Bai-Sun Kong, Kwang-Il Park, Jeong-Don Ihm, Joo-Sun Choi, Young-Hyun Jun:
PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion. ISCAS 2008: 1902-1905 - [c11]Chan-Kyung Kim, Bai-Sun Kong, Chil-Gee Lee, Young-Hyun Jun:
CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control. ISCAS 2008: 3094-3097 - [c10]Seung-Jun Bae, Young-Soo Sohn, Kwang-Il Park, Kyoung-Ho Kim, Dae-Hyun Chung, Jingook Kim, Si-Hong Kim, Min-Sang Park, Jae-Hyung Lee, Sam-Young Bang, Ho-Kyung Lee, In-Soo Park, Jae-Sung Kim, Dae-Hyun Kim, Hye-Ran Kim, Yong-Jae Shin, Cheol-Goo Park, Gil-Shin Moon, Ki-Woong Yeom, Kang-Young Kim, Jae-Young Lee, Hyang-Ja Yang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim:
A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques. ISSCC 2008: 278-279 - [c9]Kyomin Sohn, Young-Ho Suh, Young-Jae Son, Daesik Yim, Kang-Young Kim, Dae-Gi Bae, Ted Kang, Hoon Lim, Soon-Moon Jung, Hyun-Geun Byun, Young-Hyun Jun, Kinam Kim:
A 100nm Double-Stacked 500MHz 72Mb Separate-I/O Synchronous SRAM with Automatic Cell-Bias Scheme and Adaptive Block Redundancy. ISSCC 2008: 386-387 - [c8]Gyu-Yeol Kim, Eon-Jo Byunb, Ki-Sang Kang, Young-Hyun Jun, Bai-Sun Kong:
Wafer-Level Characterization of Probecards using NAC Probing. ITC 2008: 1-9 - 2007
- [j7]Min-su Kim, Young-Hyun Jun, Sung-Bae Park, Bai-Sun Kong:
CMOS Level Converter with Balanced Rise and Fall Delays. IEICE Trans. Electron. 90-C(1): 192-195 (2007) - [j6]Chan-Kyung Kim, Jae-Goo Lee, Young-Hyun Jun, Chil-Gee Lee, Bai-Sun Kong:
CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control. Microelectron. J. 38(10-11): 1042-1049 (2007) - [j5]Soon-Kyun Shin, Wang Yu, Young-Hyun Jun, Jae-Whui Kim, Bai-Sun Kong, Chil-Gee Lee:
Slew-Rate-Controlled Output Driver Having Constant Transition Time Over Process, Voltage, Temperature, and Output Load Variations. IEEE Trans. Circuits Syst. II Express Briefs 54-II(7): 601-605 (2007) - [c7]Jeong-Don Ihm, Seung-Jun Bae, Kwang-Il Park, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Ho-Kyung Lee, Min-Sang Park, Sam-Young Bang, Mi-Jin Lee, Gil-Shin Moon, Young-Wook Jang, Suk-Won Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Su-Jin Park, Ok-Joo Park, Se-Mi Yang, Jin-Yong Choi, Young-Wook Kim, Hyun-Kyu Lee, Sunghoon Kim, Seong-Jin Jang, Young-Hyun Jun, Soo-In Cho:
An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion. ISSCC 2007: 492-617 - [c6]Byung-Guk Kim, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Soo-In Cho:
A DLL with Jitter-Reduction Techniques for DRAM Interfaces. ISSCC 2007: 496-497 - 2006
- [j4]Young-Hyun Jun, Jong-Ho Yun, Jin-Sung Park, Myung-Ryul Choi:
Design of an Image Interpolator for Low Computation Complexity. J. Inf. Process. Syst. 2(3): 153-158 (2006) - 2005
- [j3]Sang-Bo Lee, Seong-Jin Jang, Jin-Seok Kwak, Sang-Jun Hwang, Young-Hyun Jun, Soo-In Cho, Chil-Gee Lee:
A 1.6-Gb/s/pin double data rate SDRAM with wave-pipelined CAS latency control. IEEE J. Solid State Circuits 40(1): 223-232 (2005) - [c5]Soon-Kyun Shin, Bai-Sun Kong, Chil-Gee Lee, Young-Hyun Jun, Jae-Whui Kim:
A high current driving charge pump with current regulation method. CICC 2005: 207-210 - [c4]Soon-Kyun Shin, Wang Yu, Bai-Sun Kong, Chil-Gee Lee, Young-Hyun Jun, Jae-Whui Kim:
A slew rate-controlled output driver having a constant transition time over the variations of process, voltage and temperature. CICC 2005: 231-234 - 2001
- [j2]Bai-Sun Kong, Sam-Soo Kim, Young-Hyun Jun:
Conditional-capture flip-flop for statistical power reduction. IEEE J. Solid State Circuits 36(8): 1263-1271 (2001) - 2000
- [c3]Bai-Sun Kong, Young-Hyun Jun:
Data-dependent evaluating latched CMOS differential logic family for statistical power reduction. ISCAS 2000: 760-763
1990 – 1999
- 1993
- [c2]Young-Hyun Jun, Weon-Hwa Jeong, Jong-Hoon Park, Tae-Hoon Kim, Seong-Wook Kim, Jae-Sik Lee, Seong-Jin Jang, Chang-Man Khang, Hee-Gook Lee:
A New Colum Redundancy Scheme For Fast Access Time of 64-Mb DRAM. ISCAS 1993: 1937-1940 - 1990
- [c1]Young-Hyun Jun, Ibrahim N. Hajj, Sang-Heon Lee, Song-Bai Park:
High speed VLSI logic simulation using bitwise operations and parallel processing. ICCD 1990: 171-174
1980 – 1989
- 1989
- [j1]Young-Hyun Jun, Ki Jun, Song-Bai Park:
An accurate and efficient delay time modeling for MOS logic circuits using polynomial approximation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(9): 1027-1032 (1989)
Coauthor Index
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Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-07-21 22:02 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
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since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
