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ORCIDMáire O'Neill
- > Home > Persons > Máire O'Neill
Publications
- 2024
[j51]Raymond K. Zhao
, Sarah McCarthy, Ron Steinfeld, Amin Sakzad, Máire O'Neill:
Quantum-Safe HIBE: Does It Cost a Latte? IEEE Trans. Inf. Forensics Secur. 19: 2680-2695 (2024)- [j50]Yijun Cui, Jiang Li, Yunpeng Chen, Chenghua Wang, Chongyan Gu, Máire O'Neill, Weiqiang Liu:
An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA. ACM Trans. Design Autom. Electr. Syst. 29(1): 2:1-2:20 (2024) - [c112]Ziying Ni, Ayesha Khalid, Weiqiang Liu, Máire O'Neill:
Bitstream Fault Injection Attacks on CRYSTALS Kyber Implementations on FPGAs. DATE 2024: 1-6 - [c111]Aditya Japa, Jack Miskelly, Yijun Cui, Máire O'Neill, Chongyan Gu:
A Novel Methodology for Processor based PUF in Approximate Computing. ISCAS 2024: 1-5 - [c110]Ziying Ni, Ayesha Khalid, Weiqiang Liu, Máire O'Neill:
FPGA Bitstream Fault Injection Attack and Countermeasures on the Sampling Counter in CRYSTALS Kyber. ISCAS 2024: 1-5 - [c109]Yasir Ali Shah, Ciara Rafferty, Ayesha Khalid, Safiullah Khan, Khalid Javeed, Máire O'Neill:
Efficient Soft Core Multiplier for Post Quantum Digital Signatures. ISCAS 2024: 1-5 - [c108]Anh-Tuan Hoang, Mark Kennaway, Dung Tuan Pham, Thai Son Mai, Ayesha Khalid, Ciara Rafferty, Máire O'Neill:
Deep Learning Enhanced Side Channel Analysis on CRYSTALS-Kyber. ISQED 2024: 1-8 - 2023
- [j49]Ziying Ni, Ayesha Khalid, Dur-e-Shahwar Kundi, Máire O'Neill, Weiqiang Liu:
HPKA: A High-Performance CRYSTALS-Kyber Accelerator Exploring Efficient Pipelining. IEEE Trans. Computers 72(12): 3340-3353 (2023) - [c107]Ziying Ni, Ayesha Khalid, Weiqiang Liu, Máire O'Neill:
Towards a Lightweight CRYSTALS-Kyber in FPGAs: an Ultra-lightweight BRAM-free NTT Core. ISCAS 2023: 1-5 - [c106]Safiullah Khan, Ayesha Khalid, Ciara Rafferty, Yasir Ali Shah, Máire O'Neill, Wai-Kong Lee, Seong Oun Hwang:
Efficient, Error-Resistant NTT Architectures for CRYSTALS-Kyber FPGA Accelerators. VLSI-SoC 2023: 1-6 - 2022
- [j48]Dur-e-Shahwar Kundi, Ayesha Khalid, Song Bian, Chenghua Wang, Máire O'Neill, Weiqiang Liu:
AxRLWE: A Multilevel Approximate Ring-LWE Co-Processor for Lightweight IoT Applications. IEEE Internet Things J. 9(13): 10492-10501 (2022) - [j47]Shanshan Liu, Bi Wu, Ke Chen, Weiqiang Liu, Máire O'Neill, Fabrizio Lombardi:
Editorial Special Issue on Circuits and Systems for Emerging Computing Paradigms. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2653-2654 (2022) - [j46]Ziying Ni, Dur-e-Shahwar Kundi, Máire O'Neill, Weiqiang Liu:
A High Performance SIKE Accelerator With High Frequency and Low Area-Time Product. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3899-3903 (2022) - [j45]Yale Wang, Chenghua Wang, Chongyan Gu, Yijun Cui, Máire O'Neill, Weiqiang Liu:
A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol. IEEE Trans. Emerg. Top. Comput. 10(2): 1091-1104 (2022) - [j44]Shichao Yu, Chongyan Gu, Weiqiang Liu, Máire O'Neill:
Deep Learning-Based Hardware Trojan Detection With Block-Based Netlist Information Extraction. IEEE Trans. Emerg. Top. Comput. 10(4): 1837-1853 (2022) - [j43]Dur-e-Shahwar Kundi, Yuqing Zhang, Chenghua Wang, Ayesha Khalid, Máire O'Neill, Weiqiang Liu:
Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs. IEEE Trans. Emerg. Top. Comput. 10(4): 1993-2005 (2022) - [j42]Ziying Ni, Dur-e-Shahwar Kundi, Máire O'Neill, Weiqiang Liu:
A High-Performance SIKE Hardware Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 803-815 (2022) - [j41]Yale Wang, Chenghua Wang, Chongyan Gu, Yijun Cui, Máire O'Neill, Weiqiang Liu:
A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs. IEEE Trans. Very Large Scale Integr. Syst. 30(9): 1256-1268 (2022) - [c105]Ruth O'Connor, Ayesha Khalid, Máire O'Neill, Weiqiang Liu:
Better Security Estimates for Approximate, IoT-Friendly R-LWE Cryptosystems. APCCAS 2022: 611-615 - [c104]Pengzhou He, Yazheng Tu, Ayesha Khalid, Máire O'Neill, Jiafeng Xie:
HPMA-NTRU: High-Performance Polynomial Multiplication Accelerator for NTRU. DFT 2022: 1-6 - [c103]Ziying Ni, Ayesha Khalid, Máire O'Neill:
High Performance FPGA-based Post Quantum Cryptography Implementations. FPL 2022: 456-457 - [c102]Donal Campbell, Ciara Rafferty, Ayesha Khalid, Máire O'Neill:
Acceleration of Post Quantum Digital Signature Scheme CRYSTALS-Dilithium on Reconfigurable Hardware. FPL 2022: 462-463 - [c101]Anh-Tuan Hoang, Neil Hanley, Ayesha Khalid, Dur-e-Shahwar Kundi, Máire O'Neill:
Stacked Ensemble Models Evaluation on DL Based SCA. ICSBT/SECRYPT (Revised Selected Papers) 2022: 43-68 - [c100]Anh-Tuan Hoang, Neil Hanley, Ayesha Khalid, Dur-e-Shahwar Kundi, Máire O'Neill:
Stacked Ensemble Model for Enhancing the DL based SCA. SECRYPT 2022: 59-68 - [p3]Chongyan Gu, Yuqin Dou, Weiqiang Liu, Máire O'Neill:
Security Vulnerabilities and Countermeasures for Approximate Circuits. Approximate Computing 2022: 269-286 - [i9]Ziying Ni, Ayesha Khalid, Dur-e-Shahwar Kundi, Máire O'Neill, Weiqiang Liu:
Efficient Pipelining Exploration for A High-performance CRYSTALS-Kyber Accelerator. IACR Cryptol. ePrint Arch. 2022: 1093 (2022) - 2021
- [j40]Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Neil Hanley, Jack Miskelly, Máire O'Neill:
A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs. J. Cryptogr. Eng. 11(3): 227-238 (2021) - [j39]Ioannis Tsiokanos, Jack Miskelly, Chongyan Gu, Máire O'Neill, Georgios Karakonstantis:
DTA-PUF: Dynamic Timing-aware Physical Unclonable Function for Resource-constrained Devices. ACM J. Emerg. Technol. Comput. Syst. 17(3): 32:1-32:24 (2021) - [j38]Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Shichao Yu, Yale Wang, Máire O'Neill:
A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(6): 1183-1196 (2021) - [j37]Weiqiang Liu, Tingting Zhang, Emma McLarnon, Máire O'Neill, Paolo Montuschi, Fabrizio Lombardi:
Design and Analysis of Majority Logic-Based Approximate Adders and Multipliers. IEEE Trans. Emerg. Top. Comput. 9(3): 1609-1624 (2021) - [j36]Chongyan Gu, Weiqiang Liu, Yijun Cui, Neil Hanley, Máire O'Neill, Fabrizio Lombardi:
A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation. IEEE Trans. Emerg. Top. Comput. 9(4): 1853-1866 (2021) - [c99]Ziying Ni, Dur-e-Shahwar Kundi, Máire O'Neill, Weiqiang Liu:
High-Performance Systolic Array Montgomery Multiplier for SIKE. ISCAS 2021: 1-5 - [c98]Kan Yao, Dur-e-Shahwar Kundi, Chenghua Wang, Máire O'Neill, Weiqiang Liu:
Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off. ISCAS 2021: 1-5 - [c97]Hu Zhang, Chenghua Wang, Chenggang Yan, Yijun Cui, Chongyan Gu, Máire O'Neill, Weiqiang Liu:
A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function. ISCAS 2021: 1-5 - [i8]Raymond K. Zhao, Sarah McCarthy, Ron Steinfeld, Amin Sakzad, Máire O'Neill:
Quantum-safe HIBE: does it cost a Latte? IACR Cryptol. ePrint Arch. 2021: 222 (2021) - 2020
- [j35]Mingfu Xue, Chongyan Gu, Weiqiang Liu, Shichao Yu, Máire O'Neill:
Ten years of hardware Trojans: a survey from the attacker's perspective. IET Comput. Digit. Tech. 14(6): 231-246 (2020) - [j34]Weiqiang Liu, Chongyan Gu, Máire O'Neill, Gang Qu, Paolo Montuschi, Fabrizio Lombardi:
Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities. Proc. IEEE 108(12): 2214-2231 (2020) - [j33]Weiqiang Liu, Ziying Ni, Jian Ni, Ciara Rafferty, Máire O'Neill:
High Performance Modular Multiplication for SIDH. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 3118-3122 (2020) - [j32]Jack Miskelly, Máire O'Neill:
Fast DRAM PUFs on Commodity Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3566-3576 (2020) - [j31]Yuqing Zhang, Chenghua Wang, Dur-e-Shahwar Kundi, Ayesha Khalid, Máire O'Neill, Weiqiang Liu:
An Efficient and Parallel R-LWE Cryptoprocessor. IEEE Trans. Circuits Syst. II Express Briefs 67-II(5): 886-890 (2020) - [j30]Dur-e-Shahwar Kundi, Ayesha Khalid, Arshad Aziz, Chenghua Wang, Máire O'Neill, Weiqiang Liu:
Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3. IEEE Trans. Circuits Syst. 67-I(12): 4869-4882 (2020) - [j29]Anh-Tuan Hoang, Neil Hanley, Máire O'Neill:
Plaintext: A Missing Feature for Enhancing the Power of Deep Learning in Side-Channel Analysis? Breaking multiple layers of side-channel countermeasures. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(4): 49-85 (2020) - [c96]Séamus Brannigan, Máire O'Neill, Ayesha Khalid, Ciara Rafferty:
A Secure Algorithm for Rounded Gaussian Sampling. CANS 2020: 593-612 - [c95]Yuqin Dou, Shichao Yu, Chongyan Gu, Máire O'Neill, Chenghua Wang, Weiqiang Liu:
Security Analysis of Hardware Trojans on Approximate Circuits. ACM Great Lakes Symposium on VLSI 2020: 315-320 - [c94]Yijun Cui, Yunpeng Chen, Chenghua Wang, Chongyan Gu, Máire O'Neill, Weiqiang Liu:
Programmable Ring Oscillator PUF Based on Switch Matrix. ISCAS 2020: 1-4 - [c93]Dur-e-Shahwar Kundi, Song Bian, Ayesha Khalid, Chenghua Wang, Máire O'Neill, Weiqiang Liu:
AxMM: Area and Power Efficient Approximate Modular Multiplier for R-LWE Cryptosystem. ISCAS 2020: 1-5 - [c92]Shichao Yu, Chongyan Gu, Weiqiang Liu, Máire O'Neill:
A Novel Feature Extraction Strategy for Hardware Trojan Detection. ISCAS 2020: 1-5 - 2019
- [j28]Chongyan Gu, Weiqiang Liu, Neil Hanley, Robert Hesselbarth, Máire O'Neill:
A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations. IEEE Trans. Computers 68(2): 287-293 (2019) - [j27]Weiqiang Liu, Jian Ni, Zhe Liu, Chunyang Liu, Máire O'Neill:
Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman. IEEE Trans. Computers 68(8): 1249-1255 (2019) - [j26]Weiqiang Liu, Lei Zhang, Zhengran Zhang, Chongyan Gu, Chenghua Wang, Máire O'Neill, Fabrizio Lombardi:
XOR-Based Low-Cost Reconfigurable PUFs for IoT Security. ACM Trans. Embed. Comput. Syst. 18(3): 25:1-25:21 (2019) - [j25]Weiqiang Liu, Sailong Fan, Ayesha Khalid, Ciara Rafferty, Máire O'Neill:
Optimized Schoolbook Polynomial Multiplication for Compact Lattice-Based Cryptography on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2459-2463 (2019) - [c91]Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Shichao Yu, Qingqing Ma, Máire O'Neill:
A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication. AsianHOST 2019: 1-6 - [c90]Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Neil Hanley, Jack Miskelly, Máire O'Neill:
A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs. ASHES@CCS 2019: 101-106 - [c89]Sarah McCarthy, James Howe, Neil Smyth, Séamus Brannigan, Máire O'Neill:
BEARZ Attack FALCON: Implementation Attacks with Countermeasures on the FALCON Signature Scheme. ICETE (2) 2019: 61-71 - [c88]Yale Wang, Chenghua Wang, Chongyan Gu, Yijun Cui, Máire O'Neill, Weiqiang Liu:
Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement. ISCAS 2019: 1-5 - [c87]Zhengran Zhang, Chongyan Gu, Yijun Cui, Chuan Zhang, Máire O'Neill, Weiqiang Liu:
Multi-Incentive Delay-Based (MID) PUF. ISCAS 2019: 1-5 - [c86]Shichao Yu, Weiqiang Liu, Máire O'Neill:
An Improved Automatic Hardware Trojan Generation Platform. ISVLSI 2019: 302-307 - [c85]Ayesha Khalid, Sarah McCarthy, Máire O'Neill, Weiqiang Liu:
Lattice-based Cryptography for IoT in A Quantum World: Are We Ready? IWASI 2019: 194-199 - [i7]Sarah McCarthy, James Howe, Neil Smyth, Séamus Brannigan, Máire O'Neill:
BEARZ Attack FALCON: Implementation Attacks with Countermeasures on the FALCON signature scheme. IACR Cryptol. ePrint Arch. 2019: 478 (2019) - [i6]Ayesha Khalid, Sarah McCarthy, Weiqiang Liu, Máire O'Neill:
Lattice-based Cryptography for IoT in A Quantum World: Are We Ready? IACR Cryptol. ePrint Arch. 2019: 681 (2019) - 2018
- [j24]Yijun Cui, Chongyan Gu, Chenghua Wang, Máire O'Neill, Weiqiang Liu:
Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design. IEEE Access 6: 28478-28487 (2018) - [j23]James Howe, Ayesha Khalid, Ciara Rafferty, Francesco Regazzoni, Máire O'Neill:
On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography. IEEE Trans. Computers 67(3): 322-334 (2018) - [j22]Weiqiang Liu, Faqiang Mei, Chenghua Wang, Máire O'Neill, Earl E. Swartzlander Jr.:
Data Compression Device Based on Modified LZ4 Algorithm. IEEE Trans. Consumer Electron. 64(1): 110-117 (2018) - [c84]Yue Fang, Chenghua Wang, Qingqing Ma, Chongyan Gu, Máire O'Neill, Weiqiang Liu:
Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study. APCCAS 2018: 394-397 - [c83]Sailong Fan, Weiqiang Liu, James Howe, Ayesha Khalid, Máire O'Neill:
Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography. APCCAS 2018: 403-406 - [c82]Ayesha Khalid, Ciara Rafferty, James Howe, Séamus Brannigan, Weiqiang Liu, Máire O'Neill:
Error Samplers for Lattice-Based Cryptography -Challenges, Vulnerabilities and Solutions. APCCAS 2018: 411-414 - [c81]Qingqing Ma, Chongyan Gu, Neil Hanley, Chenghua Wang, Weiqiang Liu, Máire O'Neill:
A machine learning attack resistant multi-PUF design on FPGA. ASP-DAC 2018: 97-104 - [c80]Ayesha Khalid, Tobias Oder, Felipe Valencia, Máire O'Neill, Tim Güneysu, Francesco Regazzoni:
Physical Protection of Lattice-Based Cryptography: Challenges and Solutions. ACM Great Lakes Symposium on VLSI 2018: 365-370 - [c79]Jack Miskelly, Chongyan Gu, Qingqing Ma, Yijun Cui, Weiqiang Liu, Máire O'Neill:
Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs. DSP 2018: 1-5 - [c78]Ayesha Khalid, James Howe, Ciara Rafferty, Francesco Regazzoni, Máire O'Neill:
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography. ISCAS 2018: 1-5 - [c77]Chunyang Liu, Jian Ni, Weiqiang Liu, Zhe Liu, Máire O'Neill:
Design and Optimization of Modular Multiplication for SIDH. ISCAS 2018: 1-5 - [c76]Tingting Zhang, Weiqiang Liu, Emma McLarnon, Máire O'Neill, Fabrizio Lombardi:
Design of Majority Logic (ML) Based Approximate Full Adders. ISCAS 2018: 1-5 - [c75]Séamus Brannigan, Máire O'Neill, Ayesha Khalid, Ciara Rafferty:
Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler. SPACE 2018: 65-84 - [p2]Weiqiang Liu, Chongyan Gu, Gang Qu, Máire O'Neill:
Approximate Computing and Its Application to Hardware Security. Cyber-Physical Systems Security 2018: 43-67 - [i5]Ayesha Khalid, James Howe, Ciara Rafferty, Francesco Regazzoni, Máire O'Neill:
Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography. IACR Cryptol. ePrint Arch. 2018: 265 (2018) - 2017
- [j21]Ciara Rafferty, Máire McLoone, Neil Hanley:
Evaluation of Large Integer Multiplication Methods on Hardware. IEEE Trans. Computers 66(8): 1369-1382 (2017) - [j20]Weiqiang Liu, Earl E. Swartzlander Jr., Máire O'Neill:
Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for Application-Specific Computing. IEEE Trans. Emerg. Top. Comput. 5(2): 148-150 (2017) - [j19]Chongyan Gu, Neil Hanley, Máire O'Neill:
Improved Reliability of FPGA-Based PUF Identification Generator Design. ACM Trans. Reconfigurable Technol. Syst. 10(3): 20:1-20:23 (2017) - [c74]Chongyan Gu, Neil Hanley, Máire O'Neill:
FPGA-based strong PUF with increased uniqueness and entropy properties. ISCAS 2017: 1-4 - [c73]James Howe, Ciara Rafferty, Ayesha Khalid, Máire O'Neill:
Compact and provably secure lattice-based signatures in hardware. ISCAS 2017: 1-4 - [c72]Lei Zhang, Chenghua Wang, Weiqiang Liu, Máire O'Neill, Fabrizio Lombardi:
XOR gate based low-cost configurable RO PUF. ISCAS 2017: 1-4 - [c71]James Howe, Máire O'Neill:
GLITCH: A Discrete Gaussian Testing Suite for Lattice-based Cryptography. SECRYPT 2017: 413-419 - [i4]James Howe, Máire O'Neill:
GLITCH: A Discrete Gaussian Testing Suite For Lattice-Based Cryptography. IACR Cryptol. ePrint Arch. 2017: 438 (2017) - 2016
- [j18]Weiqiang Liu, Linbin Chen, Chenghua Wang, Máire O'Neill, Fabrizio Lombardi:
Design and Analysis of Inexact Floating-Point Adders. IEEE Trans. Computers 65(1): 308-314 (2016) - [j17]Xiaolin Cao, Ciara Moore, Máire O'Neill, Elizabeth O'Sullivan, Neil Hanley:
Optimised Multiplication Architectures for Accelerating Fully Homomorphic Encryption. IEEE Trans. Computers 65(9): 2794-2806 (2016) - [j16]John McAllister, Máire O'Neill, Maxime Pelcat:
Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies. J. Signal Process. Syst. 84(3): 293-294 (2016) - [c70]Máire O'Neill, Elizabeth O'Sullivan, Gavin McWilliams, Markku-Juhani O. Saarinen, Ciara Moore, Ayesha Khalid, James Howe, Rafaël Del Pino, Michel Abdalla, Francesco Regazzoni, Felipe Valencia, Tim Güneysu, Tobias Oder, Adrian Waller, Glyn Jones, Anthony Barnett, Robert Griffin, Andrew Byrne, Bassem Ammar, David Lund:
Secure architectures of future emerging cryptography SAFEcrypto. Conf. Computing Frontiers 2016: 315-322 - [c69]James Howe, Ciara Moore, Máire O'Neill, Francesco Regazzoni, Tim Güneysu, K. Beeden:
Standard lattices in hardware. DAC 2016: 162:1-162:6 - [c68]Ayesha Khalid, James Howe, Ciara Rafferty, Máire O'Neill:
Time-independent discrete Gaussian sampling for post-quantum cryptography. FPT 2016: 241-244 - [c67]Yijun Cui, Chenghua Wang, Weiqiang Liu, Yifei Yu, Máire O'Neill, Fabrizio Lombardi:
Low-cost configurable ring oscillator PUF with improved uniqueness. ISCAS 2016: 558-561 - [c66]Yijun Cui, Chenghua Wang, Weiqiang Liu, Máire O'Neill:
Live demonstration: An automatic evaluation platform for physical unclonable function test. ISCAS 2016: 2377 - [c65]Tobias Oder, Tim Güneysu, Felipe Valencia, Ayesha Khalid, Máire O'Neill, Francesco Regazzoni:
Lattice-based cryptography: From reconfigurable hardware to ASIC. ISIC 2016: 1-4 - [c64]Yijun Cui, Chenghua Wang, Weiqiang Liu, Máire O'Neill:
A Reconfigurable Memory PUF Based on Tristate Inverter Arrays. SiPS 2016: 171-176 - [c63]Chongyan Gu, Yijun Cui, Neil Hanley, Máire O'Neill:
Novel lightweight FF-APUF design for FPGA. SoCC 2016: 75-80 - 2015
- [j15]Yifei Yu, Chenghua Wang, Weiqiang Liu, Yijun Cui, Máire O'Neill:
Improving RO PUF design using frequency distribution characteristics. IEICE Electron. Express 12(3): 20141043 (2015) - [j14]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu, Elizabeth O'Sullivan:
Privacy region protection for H.264/AVC with enhanced scrambling effect and a low bitrate overhead. Signal Process. Image Commun. 35: 71-84 (2015) - [j13]Patrick Schaumont, Máire O'Neill, Tim Güneysu:
Introduction for Embedded Platforms for Cryptography in the Coming Decade. ACM Trans. Embed. Comput. Syst. 14(3): 40:1-40:3 (2015) - [j12]James Howe, Thomas Pöppelmann, Máire O'Neill, Elizabeth O'Sullivan, Tim Güneysu:
Practical Lattice-Based Digital Signature Schemes. ACM Trans. Embed. Comput. Syst. 14(3): 41:1-41:24 (2015) - [c62]Yoo-Seung Won, Philip Hodgers, Máire O'Neill, Dong-Guk Han:
On the Security of Balanced Encoding Countermeasures. CARDIS 2015: 242-256 - [c61]Richard Gilmore, Neil Hanley, Máire O'Neill:
Neural network based attack on a masked implementation of AES. HOST 2015: 106-111 - [c60]Weiqiang Liu, Yifei Yu, Chenghua Wang, Yijun Cui, Máire O'Neill:
RO PUF design in FPGAs with new comparison strategies. ISCAS 2015: 77-80 - [c59]Philip Hodgers, Neil Hanley, Máire O'Neill:
Pre-processing power traces to defeat random clocking countermeasures. ISCAS 2015: 85-88 - [c58]Chongyan Gu, Máire O'Neill:
Ultra-compact and robust FPGA-based PUF identification generator. ISCAS 2015: 934-937 - [c57]You Sung Kang, Elizabeth O'Sullivan, Dooho Choi, Máire O'Neill:
Security Analysis on RFID Mutual Authentication Protocol. WISA 2015: 65-74 - [c56]Hyunjin Ahn, Neil Hanley, Máire O'Neill, Dong-Guk Han:
An Improved Second-Order Power Analysis Attack Based on a New Refined Expecter - - Case Study on Protected AES -. WISA 2015: 174-186 - 2014
- [c55]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
New FMO type to flag ROI in H.264/AVC. EUVIP 2014: 1-5 - [c54]Xiaolin Cao, Ciara Moore, Máire O'Neill, Neil Hanley, Elizabeth O'Sullivan:
High-Speed Fully Homomorphic Encryption Over the Integers. Financial Cryptography Workshops 2014: 169-180 - [c53]Chongyan Gu, Julian P. Murphy, Máire O'Neill:
A unique and robust single slice FPGA identification generator. ISCAS 2014: 1223-1226 - [c52]Ciara Moore, Máire O'Neill, Elizabeth O'Sullivan, Yarkin Doröz, Berk Sunar:
Practical homomorphic encryption: A survey. ISCAS 2014: 2792-2795 - [c51]Ciara Moore, Máire O'Neill, Neil Hanley, Elizabeth O'Sullivan:
Accelerating integer-based fully homomorphic encryption using Comba multiplication. SiPS 2014: 62-67 - [c50]Neil Hanley, Máire O'Neill, Michael Tunstall, William P. Marnane:
Empirical evaluation of multi-device profiling side-channel attacks. SiPS 2014: 226-231 - [c49]Qizhi Tian, Máire O'Neill, Neil Hanley:
Can leakage models be more efficient? non-linear models in side channel attacks. WIFS 2014: 215-220 - [p1]Weiqiang Liu, Saket Srivastava, Máire O'Neill, Earl E. Swartzlander Jr.:
Security Issues in QCA Circuit Design - Power Analysis Attacks. Field-Coupled Nanocomputing 2014: 194-222 - 2013
- [j11]Liang Lu, Weiqiang Liu, Máire O'Neill, Earl E. Swartzlander Jr.:
QCA Systolic Array Design. IEEE Trans. Computers 62(3): 548-560 (2013) - [j10]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
A Tunable Encryption Scheme and Analysis of Fast Selective Encryption for CAVLC and CABAC in H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. 23(9): 1476-1490 (2013) - [c48]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
A tunable selective encryption scheme for H.264/AVC. EUVIP 2013: 136-141 - [c47]Ciara Moore, Neil Hanley, John McAllister, Máire O'Neill, Elizabeth O'Sullivan, Xiaolin Cao:
Targeting FPGA DSP Slices for a Large Integer Multiplier for Integer Based FHE. Financial Cryptography Workshops 2013: 226-237 - [c46]Philip Hodgers, Neil Hanley, Máire O'Neill:
Pre-processing power traces with a phase-sensitive detector. HOST 2013: 131-136 - [c45]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
Privacy region protection for H.264/AVC by encrypting the intra prediction modes without drift error in I frames. ICASSP 2013: 2964-2968 - [c44]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
Partial encryption by randomized zig-zag scanning for video encoding. ISCAS 2013: 229-232 - [c43]Weiqiang Liu, Saket Srivastava, Liang Lu, Máire O'Neill, Earl E. Swartzlander Jr.:
Power analysis attack of QCA circuits: A case study of the Serpent cipher. ISCAS 2013: 2075-2078 - [i3]Xiaolin Cao, Ciara Moore, Máire O'Neill, Elizabeth O'Sullivan, Neil Hanley:
Accelerating Fully Homomorphic Encryption over the Integers with Super-size Hardware Multiplier and Modular Reduction. IACR Cryptol. ePrint Arch. 2013: 616 (2013) - 2012
- [c42]Weiqiang Liu, Máire O'Neill, Earl E. Swartzlander Jr.:
A review of QCA adders and metrics. ACSCC 2012: 747-751 - [c41]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
The improved sign bit encryption of motion vectors for H.264/AVC. EUSIPCO 2012: 1752-1756 - [c40]Yongsheng Wang, Máire O'Neill, Fatih Kurugollu:
Adaptive binary mask for privacy region protection. ISCAS 2012: 1127-1130 - [c39]Weiqiang Liu, Liang Lu, Máire O'Neill, Earl E. Swartzlander Jr.:
Cost-efficient decimal adder design in Quantum-dot cellular automata. ISCAS 2012: 1347-1350 - [c38]Xiaolin Cao, Máire O'Neill:
Application-oriented SHA-256 hardware design for low-cost RFID. ISCAS 2012: 1412-1415 - [c37]Neil Hanley, Máire O'Neill:
Hardware Comparison of the ISO/IEC 29192-2 Block Ciphers. ISVLSI 2012: 57-62 - [c36]Julian P. Murphy, Máire O'Neill, Frank P. Burns, Alexandre V. Bystrov, Alexandre Yakovlev, Basel Halak:
Self-Timed Physically Unclonable Functions. NTMS 2012: 1-5 - 2011
- [c35]Philip Hodgers, Keanhong Boey, Máire O'Neill:
Power Spectral Density Side Channel Attack Overlapping Window Method. DSD 2011: 274-278 - [c34]Weiqiang Liu, Liang Lu, Máire O'Neill, Earl E. Swartzlander Jr.:
Design rules for Quantum-dot Cellular Automata. ISCAS 2011: 2361-2364 - [c33]Keanhong Boey, Máire O'Neill, Roger F. Woods:
How Resistant are Sboxes to Power Analysis Attacks? NTMS 2011: 1-6 - [c32]Xiaolin Cao, Máire O'Neill:
A Forward Private Protocol based on PRNG and LPN for Low-cost RFID . SECRYPT 2011: 287-292 - [c31]Xiaolin Cao, Máire O'Neill:
A Private and Scalable Authentication for RFID Systems Using Reasonable Storage. TrustCom 2011: 373-380 - [c30]Philip Hodgers, Keanhong Boey, Máire O'Neill:
Variable window power spectral density attack. WIFS 2011: 1-6 - 2010
- [j7]Yingxi Lu, Máire O'Neill, John V. McCanny:
Evaluation of Random Delay Insertion against DPA on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 4(1): 11:1-11:20 (2010) - [c29]Keanhong Boey, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Random clock against differential power analysis. APCCAS 2010: 756-759 - [c28]Yingxi Lu, Keanhong Boey, Philip Hodgers, Máire O'Neill:
SEED masking implementations against power analysis attacks. APCCAS 2010: 1199-1202 - [c27]Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Máire O'Neill, William P. Marnane:
FPGA Implementations of the Round Two SHA-3 Candidates. FPL 2010: 400-407 - [c26]Yingxi Lu, Keanhong Boey, Philip Hodgers, Máire O'Neill:
Lightweight DPA resistant solution on FPGA to counteract power models. FPT 2010: 178-183 - [c25]Keanhong Boey, Philip Hodgers, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Security of AES Sbox designs to power analysis. ICECS 2010: 1232-1235 - [c24]Keanhong Boey, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Differential Power Analysis of CAST-128. ISVLSI 2010: 143-148 - [c23]Liang Lu, Weiqiang Liu, Máire O'Neill, Earl E. Swartzlander Jr.:
QCA Systolic Matrix Multiplier. ISVLSI 2010: 149-154 - [i2]Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Máire O'Neill, William P. Marnane:
A Hardware Wrapper for the SHA-3 Hash Algorithms. IACR Cryptol. ePrint Arch. 2010: 124 (2010) - 2009
- [c22]Yingxi Lu, Keanhong Boey, Máire O'Neill, John V. McCanny, Akashi Satoh:
Is the differential frequency-based attack effective against random delay insertion? SiPS 2009: 051-056 - [c21]Liang Lu, Máire O'Neill, Earl E. Swartzlander Jr.:
ASIC evaluation of ECHO hash function. SoCC 2009: 387-390 - 2008
- [c19]Yingxi Lu, Máire O'Neill, John V. McCanny:
FPGA implementation and analysis of random delay insertion countermeasure against DPA. FPT 2008: 201-208 - [c18]Yingxi Lu, Máire O'Neill, John V. McCanny:
Differential Power Analysis of a SHACAL-2 hardware implementation. ISCAS 2008: 2933-2936 - 2007
- [j5]Nicolas Sklavos, Máire McLoone, Xinmiao Zhang:
MONET Special Issue on Next Generation Hardware Architectures for Secure Mobile Computing. Mob. Networks Appl. 12(4): 229-230 (2007) - [j4]Máire McLoone, Ciaran McIvor:
High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function. J. VLSI Signal Process. 47(1): 47-57 (2007) - [c16]John V. McCanny, Sakir Sezer, Máire O'Neill:
Exploring technology related design-space limitations of high performance network processing. ESSCIRC 2007: 222-231 - 2006
- [j3]Neil Smyth, Máire McLoone, John V. McCanny:
WLAN security processor. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(7): 1506-1520 (2006) - [j2]Ciaran McIvor, Máire McLoone, John V. McCanny:
Hardware Elliptic Curve Cryptographic Processor Over $\rm GF(p)$. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(9): 1946-1957 (2006) - [c13]Neil Smyth, Máire McLoone, John V. McCanny:
An Adaptable And Scalable Asymmetric Cryptographic Processor. ASAP 2006: 341-346 - 2005
- [c11]P. Moore, Máire McLoone, Sakir Sezer:
Reconfigurable Instruction Interface Architecture for Private-Key Cryptography on the Altera Nios-II Processor. AICT/SAPIR/ELETE 2005: 296-299 - [c10]Ciaran McIvor, Máire McLoone, John V. McCanny:
High-Radix Systolic Modular Multiplication on Reconfigurable Hardware. FPT 2005: 13-18 - [c9]Máire McLoone, Ciaran McIvor, Aidan Savage:
High-Speed Hardware Architectures of the Whirlpool Hash Function. FPT 2005: 147-162 - 2004
- [c8]Ciaran McIvor, Máire McLoone, John V. McCanny:
FPGA Montgomery Multiplier Architectures - A Comparison. FCCM 2004: 279-282 - [c7]Máire McLoone, Ciaran McIvor, John V. McCanny:
Coarsely integrated operand scanning (CIOS) architecture for high-speed Montgomery modular multiplication. FPT 2004: 185-191 - [c6]Ciaran McIvor, Máire McLoone, John V. McCanny:
FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p). ISCAS (3) 2004: 509-512 - 2003
- [j1]Máire McLoone, John V. McCanny:
Rijndael FPGA Implementations Utilising Look-Up Tables. J. VLSI Signal Process. 34(3): 261-275 (2003) - [c5]Máire McLoone, John V. McCanny:
Very High Speed 17 Gbps SHACAL Encryption Architecture. FPL 2003: 111-120 - [c4]Ciaran McIvor, Máire McLoone, John V. McCanny:
A high-speed, low latency RSA decryption silicon core. ISCAS (4) 2003: 133-136 - 2002
- [c3]Máire McLoone, John V. McCanny:
Efficient single-chip implementation of SHA-384 and SHA-512. FPT 2002: 311-314 - 2001
- [c2]Máire McLoone, John V. McCanny:
High Performance Single-Chip FPGA Rijndael Algorithm Implementations. CHES 2001: 65-76 - [c1]Máire McLoone, John V. McCanny:
Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm. FPL 2001: 152-161
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