default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDISIC 2016: Singapore
- International Symposium on Integrated Circuits, ISIC 2016, Singapore, December 12-14, 2016. IEEE 2016, ISBN 978-1-4673-9019-4
- Jakub Breier
, Chien-Ning Chen:
On determining optimal parameters for testing devices against laser fault attacks. 1-4 - Jian Sen Teh, Arjun Ramaswami Palaniappan, Liter Siek, Yuanjin Zheng:
Review of pulse generators for gated ring oscillator based Time-to-Digital converters. 1-4 - Dong Wang, Xiao Liang Tan, Pak Kwong Chan:
A sub-1V wide-load-range LDO regulator with sustained transient efficiency. 1-4 - Andrea Lomuscio, Gian Carlo Cardarilli, Alberto Nannarelli, Marco Re:
A hardware framework for on-chip FPGA acceleration. 1-4 - Thomas Girg, Daniel Schrüfer, Marco Dietz, Amelie Hagelauer, Dietmar Kissinger, Robert Weigel:
Low complexity 60-GHz receiver architecture for simultaneous phase and amplitude regenerative sampling systems. 1-4 - Daming Ren, Zhi-xiong Ren, Ke-feng Zhang, Xuecheng Zou, Wei Zou, Yang Yu:
A 0.2-2.5 GHz CMOS power amplifier using transformer-based broadband matching network. 1-4 - Tao Tang, Wang Ling Goh, Xin Liu, Chao Wang:
A 0.18µm, 0.6V, 83.5µW integer DCT processor for neural signal applications. 1-4 - Ning Li, Li Shen, Qi Zhu, Yemao Xu, Jialong Wang, Zhiying Wang:
An implementation of analytical power model on integrated GPU. 1-4 - Christian Bartsch, Carlos Villarraga, Dominik Stoffel, Wolfgang Kunz:
Safety across the HW/SW interface - Can formal methods meet the challenge? 1-3 - Wenju Li, Kaixue Ma, Shouxian Mou:
A Ku-band high-isolation SPDT switch in 0.35um SiGe BiCMOS technology. 1-4 - Qianqian Liu, Victor Adrian, Bah-Hwee Gwee, Joseph S. Chang:
A high-efficiency Class-E polar power-amplifier with a novel digitally-controlled output matching network. 1-4 - Yiping Zhang, Ziou Wang, Canyan Zhu, Lijun Zhang, Aiming Ji, Lingfeng Mao:
28nm latch type sense amplifier coupling effect analysis. 1-4 - Subhrajit Roy, He Tong, Arindam Basu:
Online unsupervised structural plasticity algorithm for multi-layer Winner-Take-All with binary synapses. 1-4 - Vikramkumar Pudi, Anupam Chattopadhyay, Thambipillai Srikanthan:
Modified projected Landweber method for Compressive-Sensing reconstruction of images with non-orthogonal matrices. 1-4 - Senthilkumar Jayapal, Janani Sainath Sigundey, Yipin Wu, EricT Tsai:
Stack effect and logic restructuring on high Fan-in FinFETs logic gates. 1-4 - Jun Yu, Kevin Tshun Chuan Chai, Yat Hei Lam, Muthukumaraswamy Annamalai Arasu:
Half-bridge driver with charge pump based high-side voltage regulator. 1-4 - Sebastian Steinhorst:
Design and verification methodologies for Smart Battery Cells. 1-4 - Yan Hong, Yong Wang, Wang Ling Goh, Yuan Gao, Lei Yao:
Analysis of monolithic I/Q based impedance measurement circuits: Impact of non-ideal circuit effects on accuracies. 1-4 - Bo Chen, Liheng Lou, Kai Tang, Jianjun Gao, Yuanjin Zheng:
Millimeter wave transformer coupled low-power and broadband power amplifiers. 1-4 - Arish Shareef, Wang Ling Goh, Yuan Gao, Srikanth Narasimalu:
Synchronous Electric Charge Extraction for low voltage Piezoelectric Energy Harvester array. 1-4 - Maoxiang Yi, Yingxian Gan, Zhengfeng Huang, Huaguo Liang:
Co-mitigating circuit PBTI and HCI aging considering NMOS transistor stacking effect. 1-5 - Arjun Ajaykumar, Xing Zhou, Siau Ben Chiah:
Effect of metal work function on the DC characteristics of an asymmetric MOSFET with Schottky-based source. 1-4 - Chun-Yu Lin, Rong-Kun Chang:
ESD protection design for high-speed circuits in nanoscale CMOS process. 1-4 - Wei Zou, Zhi-xiong Ren, Ke-feng Zhang, Xuecheng Zou, Daming Ren, Dapeng Zou:
A low phase noise wideband VCO with 8-shaped inductor. 1-4 - Bernhard Jungk:
Automotive security state of the art and future challenges. 1-4 - Tobias Oder, Tim Güneysu, Felipe Valencia, Ayesha Khalid, Máire O'Neill, Francesco Regazzoni:
Lattice-based cryptography: From reconfigurable hardware to ASIC. 1-4 - Paulo Marcos Pinto, Tales Cleber Pimenta, Robson Luiz Moreno, Odilon O. Dutra, Rodrigo da Silva Braga:
An interchip Power Line Communication. 1-4 - Leo John Chemmanda, Bin Zhao, Yuan Gao:
A fully integrated capacitance boosting offset calibration circuit for capacitive pressure sensor. 1-4 - Jie Sun, Jianhui Wu:
A high speed pipeline ADC with 78-dB SFDR in 0.18 um BiCMOS. 1-4 - W. L. Tan, C. H. Chang, Liter Siek:
Electronically tunable MOSFET-based resistor used in a variable gain amplifier or filter. 1-4 - Philipp Wagner, Lin Li, Thomas Wild, Albrecht Mayer, Andreas Herkersdorf:
What happens on an MPSoC stays on an MPSoC - unfortunately! 1-2 - Mi Zhou, Qiong Wei Low, Liter Siek:
A high efficiency synchronous buck converter with adaptive dead-time control. 1-4 - Zhichao Li, Bharatha Kumar Thangarasu, Xiaopeng Yu, Kiat Seng Yeo:
A 60-GHz power amplifier with efficiency enhancement at power back-off. 1-3 - Bai Song Samuel Lee, Yung Sern Tan, Bharatha Kumar Thangarasu, Kiat Seng Yeo, Zhichao Li, Xiaopeng Yu:
An inductorless transimpedance amplifier design for 10 Gb/s optical communication using 0.18-µm CMOS. 1-4 - Dawei Zhang, Hongxi Yu, Bharatha Kumar Thangarasu, Kai Men, Muting Lu, Xiaopeng Yu, Kiat Seng Yeo:
Design of millimeter-wave transformer balun with isolation circuit in silicon based technology. 1-3 - Debapriya Basu Roy, Shubham Agrawal, Chester Rebeiro, Debdeep Mukhopadhyay:
Accelerating OpenSSL's ECC with low cost reconfigurable hardware. 1-4 - Qiong Wei Low, Mi Zhou, Liter Siek:
Performance analysis on active rectifier structures for inductively powered application. 1-4 - Yong Wang, Yan Hong, Wang Ling Goh, Xiaojing Mu, Kevin T. C. Chai:
A modified PiBVD model for Lamb wave resonator. 1-4 - Yang Kang, Tong Ge, Huiqiao He, Joseph S. Chang:
A review of audio Class D amplifiers. 1-4 - Kai Tang, Ying Zhang, Bo Chen, Liheng Lou, Yong Wang, Yuanjin Zheng:
An analog baseband chain of synthetic aperture radar receiver. 1-4 - Jia Yu, Tong Ge, Huiqiao He, Joseph S. Chang:
Substrate thickness effect on transformer. 1-4 - Muting Lu, Bharatha Kumar Thangarasu, Dawei Zhang, Xiaopeng Yu, Kiat Seng Yeo:
A wideband digital variable gain amplifier with DC offset cancellation in SiGe 0.18µm BiCMOS technology. 1-3 - Anh Khoa Bui, Zhekai Xiao, Liter Siek:
Digitally-controlled H-bridge DC-DC converter for micropower PV energy harvesting system. 1-4 - Henrik Felding, Linus Hellman, Siyu Tan, Markus Törmänen:
A three bit second order audio band delta sigma modulator with 98.2dB SQNR. 1-4 - S. Saisundar, N. Yoshio, Kah-Hyong Chang:
A rail-to-rail noise-shaping non-binary SAR ADC. 1-4 - Vishnu Unnikrishnan, Mark Vesterbacka, Atila Alvandpour:
VCO-based ADCs for IoT applications. 1-4 - Jingbin Jia, Marco Ho, Ka Nang Leung, Jianping Guo:
A regulated voltage multiplier for passive RFID Tag. 1-4 - Kairang Chen, Atila Alvandpour:
Capacitive charge pump gain-stage with source follower buffers for pipelined SAR ADCs. 1-4 - Bin Zhao, Dan Lei Yan:
A low-power digital design of all digital PLL for 2.4G wireless communication applications. 1-4 - Dipankar Nag:
A 6 nV/√Hz high precision Analog Front-End with sub-µV input offset for MEMS accelerometer. 1-4 - Bo Yu, Kaixue Ma, Fanyi Meng, Bharatha Kumar Thangarasu, Kiat Seng Yeo:
DC-50 GHz low loss switch matrix design in high resistivity trap-rich SOI. 1-3 - Gibran Limi Jaya, Shoushun Chen, Liter Siek:
A dual redundancy radiation-hardened Flip-Flop based on C-element in 65nm process. 1-4 - Bing Yuan, Xinquan Lai, Jun Wang, Yao Huang, Xiuzhi Wu:
Switch size control circuit in wide-load PWM/PFM DC-DC buck converters. 1-3 - Pengwei Chen, Jin He, Jiang Luo, Hao Wang, Sheng Chang, Qijun Huang, Hao Yu, Xiaopeng Yu:
Fully integrated pseudo differential K-band power amplifier in 0.13um standard CMOS. 1-4 - Yong Wang, Yuanjin Zheng, Xiaojing Mu:
Modelling of high frequency Lamb wave resonator for monolithic CMOS radar transceiver. 1-4 - Zou Pei, Kaixue Ma, Shouxian Mou:
A compact 6-bit phase shifter in 0.35 µm SiGe BiCMOS technology. 1-4 - Zhekai Xiao, Anh Khoa Bui, Liter Siek:
A switched-capacitor DC-DC converter with embedded fast NMOS-LDOs achieving low noise, low output voltage ripple and fast response. 1-4 - Uday Dasgupta:
Low voltage 2-stage and 3-stage push-pull output amplifiers in 65-nm CMOS technology. 1-4 - Y. Li, Kuan Chuang Koay, Pak Kwong Chan:
A 65nm CMOS ping-pong auto-zero resistance-to-frequency converter for resistive bridge sensors. 1-4 - Chengyue Yu, Xiang Zhang, Liter Siek:
A continuous switching mode step-down switched-capacitor regulator with inrush current control scheme. 1-4 - Haoyuan Jiang, Chenyue Ma, Lining Zhang, Mansun Chan:
Concurrent device/circuit aging for general reliability simulations. 1-4 - Liheng Lou, Bo Chen, Kai Tang, Yuanjin Zheng:
A CMOS digital-controlled oscillator for All-digital PLL frequency synthesizer. 1-4 - Wei Li, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 94-dB DR, 105-Hz bandwidth interface circuit for inertial navigation applications. 1-4 - J. Jacob Wikner, Johan Zötterman, Armin Jalili, Simon Farnebo:
Aiming for the cloud - a study of implanted battery-free temperature sensors using NFC. 1-4 - Sunny Sharma, Siau Ben Chiah, Xing Zhou, Chirn Chye Boon:
An on-chip integrated III-V / CMOS 125MSps 6-bit SAR ADC. 1-4 - Weng-Geng Ho, Ali Akbar Pammu, Nan Liu, Kyaw Zwa Lwin Ne, Kwen-Siong Chong, Bah-Hwee Gwee:
Security analysis of asynchronous-logic QDI cell approach for differential power analysis attack. 1-4 - Joao R. C. Louzada, Leonardo Breseghello Zoccal, Robson Luiz Moreno, Tales Cleber Pimenta:
A 0.13µm CMOS full wave active rectifier with comparators for implanted medical devices. 1-4 - Queenie Le, Deyu Chen, Daryl Cher, David Ho, Iulian Mirea, Rex Wong, Ricky Setiawan:
A digitally controlled embedded SMPS with 2.3V to 5.5V input voltage for mobile SoCs. 1-4 - Jiacheng Wang, Wang Ling Goh:
A 12.4-kHz on-chip RC oscillator with comparator offset cancellation for PVT variation tolerance. 1-4 - Jeong-Won Kim, Deok Keun Oh, Juho Kim:
Performance optimization in FinFET-based circuit using TILOS-like gate sizing. 1-4 - Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee:
Highly secured arithmetic hiding based S-Box on AES-128 implementation. 1-4 - Huiqiao He, Tong Ge, Joseph Sylvester Chang:
A review on supply modulators for Envelope-Tracking Power Amplifiers. 1-4 - Daniel Mueller-Gritschneder, Marc Greim, Ulf Schlichtmann:
Safety evaluation based on virtual prototypes: Fault injection with multi-level processor models. 1-2 - Wei He:
Thermal brings security: A roadmap to mitigate silicon bias influence for symmetric dual-rail logic. 1-4 - Yihu Li, Wang Ling Goh, Hailin Tang, Haitao Liu, Xiaodong Deng, Yong-Zhong Xiong:
A 10 to 170 GHz distributed amplifier using 130-nm SiGe HBTs. 1-4 - Biao Chen, Lei Zhu, Yanqi Zheng, Jianping Guo, Marco Ho, Ka Nang Leung, Dihu Chen, Yang Liu:
A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter. 1-4 - Marc Stöttinger, Bernhard Jungk:
There ain't no plain key: A PUF based first-order side-channel resistant encryption construction. 1-4 - Lei Zhu, Biao Chen, Yanqi Zheng, Jianping Guo, Marco Ho, Ka Nang Leung, Dihu Chen, Yang Liu:
A fast-response buck-boost DC-DC converter with constructed full-wave current sensor. 1-4 - M. Arif Hussain Ansari, Choi Look Law:
High voltage high efficiency UWB pulse generator for precision localization wireless sensor network. 1-4
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-09-18 23:44 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
