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ORCIDKiyoshi Kato
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2010 – 2019
- 2019
[c17]Takahiko Ishizu, Yuto Yakubo, Kazuma Furutani, Atsuo Isobe, Masashi Fujita, Tomoaki Atsumi, Yoshinori Ando, Tsutomu Murakawa, Kiyoshi Kato, Masahiro Fujita, Shunpei Yamazaki:
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs. VLSI Circuits 2019: 48-- 2018
- [j10]Elise de Doncker
, Fukuko Yuasa, Kiyoshi Kato, Tadashi Ishikawa, John A. Kapenga, Omofolakunmi Olagbemi:
Regularization with numerical extrapolation for finite and UV-divergent multi-loop integrals. Comput. Phys. Commun. 224: 164-185 (2018) - [c16]Shuhei Maeda, Satoru Ohshita, Kazuma Furutani, Yuto Yakubo, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda, Masahiro Fujita, Shunpei Yamazaki:
A 20ns-write 45ns-read and 1014-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors. ISSCC 2018: 484-486 - 2017
- [j9]Tatsuya Onuki, Wataru Uesugi, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki:
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS. IEEE J. Solid State Circuits 52(4): 925-932 (2017) - 2016
- [c15]Tatsuya Onuki, Wataru Uesugi, Hikaru Tamura, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, Chen Bin Lin, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki:
Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS. VLSI Circuits 2016: 1-2 - 2015
- [c14]Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki:
16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method. ISSCC 2015: 1-3 - 2014
- [j8]Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Wataru Uesugi, Atsuo Isobe, Naoaki Tsutsui, Yasutaka Suzuki, Yutaka Okazaki, Yukio Maehashi, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki, Masahiro Fujita, James Myers, Pekka Korpinen:
Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor. IEEE Micro 34(6): 42-53 (2014) - [c13]Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki:
Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating. COOL Chips 2014: 1-3 - [c12]Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Atsushi Hirose, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki:
A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor. VLSIC 2014: 1-2 - 2013
- [c11]Hidetomo Kobayashi, Kiyoshi Kato, Takuro Ohmaru, Seiichi Yoneda, Tatsuji Nishijima, Shuhei Maeda, Kazuaki Ohshima, Hikaru Tamura, Hiroyuki Tomatsu, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Jun Koyama, Shunpei Yamazaki:
Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor. COOL Chips 2013: 1-3 - 2012
- [j7]Fukuko Yuasa, Elise de Doncker, Nobuyuki Hamaguchi, Tadashi Ishikawa, Kiyoshi Kato, Yoshimasa Kurihara, Junpei Fujimoto, Yoshimitsu Shimizu:
Numerical computation of two-loop box diagrams with masses. Comput. Phys. Commun. 183(10): 2136-2144 (2012) - [j6]Hiroki Inoue, Takanori Matsuzaki, Shuhei Nagatsuka, Yutaka Okazaki, Toshinari Sasaki, Kousei Noda, Daisuke Matsubayashi, Takahiko Ishizu, Tatsuya Onuki, Atsuo Isobe, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Jun Koyama, Shunpei Yamazaki:
Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor. IEEE J. Solid State Circuits 47(9): 2258-2265 (2012)
2000 – 2009
- 2006
- [j5]Soshi Tsuno, Toshiaki Kaneko, Yoshimasa Kurihara, Shigeru Odaka, Kiyoshi Kato:
GR@PPA 2.7 event generator for pp/pp collisions. Comput. Phys. Commun. 175(10): 665-677 (2006) - 2000
- [c10]Mei-Ling L. Liu, Tao Yang, Sema E. Alptekin, Kiyoshi Kato:
Deploying the Mobile-Agent Technology in Warehouse Management. IEA/AIE 2000: 651-659
1990 – 1999
- 1996
- [c9]Hiroshi Ueno, Seiji Ishikawa, Yoshinori Otsuka, Kiyoshi Kato:
Automatic Spinal Deformity Detection by Two Characteristic Axes. MVA 1996: 47-50 - [c8]Yuyo Nogami, Seiji Ishikawa, Kiyoshi Kato:
A Method of Resolving an Entangled Cord. MVA 1996: 55-58 - 1995
- [c7]Seiji Ishikawa, Hiroyuki Kosaka, Kiyoshi Kato, Yoshinori Otsuka:
A Method of Analyzing a Shape with Potential Symmetry and Its Application to Detecting Spinal Deformity. CVRMed 1995: 465-470 - 1994
- [j4]Sergey Ablameyko, Vladimir Bereishik, Nadeshda Paramonova, Angelo Marcelli, Seiji Ishikawa, Kiyoshi Kato:
Vectorization and Representation of Large-Size 2-D Line-Drawing Images. J. Vis. Commun. Image Represent. 5(3): 245-254 (1994) - [c6]Teruhito Takeda, Seiji Ishikawa, Kiyoshi Kato:
Employing Symmetric Subsets for Identifying Asymmetry of Human Skulls. MVA 1994: 338-341 - 1993
- [j3]Predrag Minovic, Seiji Ishikawa, Kiyoshi Kato:
Symmetry Identification of a 3-D Object Represented by Octree. IEEE Trans. Pattern Anal. Mach. Intell. 15(5): 507-514 (1993) - 1992
- [c5]Predrag Minovic, Seiji Ishikawa, Kiyoshi Kato:
Three-dimensional symmetry measurement of medical entities. ICPR (1) 1992: 457-460 - [c4]Seiji Ishikawa, Kiyoshi Kato:
Associating an image by network constraint analysis. ICPR (1) 1992: 730-733 - [c3]Seiji Ishikawa, Keiichi Sato, Predrag Minovic, Kiyoshi Kato:
An Interactive 3d Symmetry Analysis System. MVA 1992: 375-378 - 1991
- [j2]Yukiharu Yamauchi, Seiji Ishikawa, Kiyoshi Kato:
A robot manipulator by a distributed control approach. Adv. Robotics 6(1): 15-21 (1991)
1980 – 1989
- 1989
- [j1]Sei-ichiro Kamata, Seiji Ishikawa, Kiyoshi Kato:
Reconstructing an edge on a polyhedron using an optimization method. Comput. Vis. Graph. Image Process. 47(1): 92-104 (1989) - 1988
- [c2]Seiji Ishikawa, Kiyoshi Kato:
Reconstructible pairs of incomplete polyhedral line drawings under general reconstruction procedure. ICPR 1988: 1056-1058 - [c1]Seiji Ishikawa, Kiyoshi Kato:
Reconstructible Pairs of Incomplete Polyhedral Line Drawings. Pattern Recognition 1988: 557-566
Coauthor Index
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