ICCAD 1997:
San Jose, California, USA International Conference on Computer-Aided Design (ICCAD '97), 9-13 November 1997, San Jose, CA, USA. ACM and IEEE Computer Society, 1997
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Jian Li ,
Rajesh K. Gupta :
Decomposition of timed decision tables and its use in presynthesis optimizations.
22-27
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Chuan-Yu Wang ,
Kaushik Roy :
COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits.
52-55
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conf/iccad/OdabasiogluCP97
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conf/iccad/GoldbergCVBS97
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conf/iccad/SankarayyaRB97
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Anirudh Devgan :
Efficient coupled noise estimation for on-chip interconnects.
147-151
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Charles J. DeVane :
Efficient circuit partitioning to extend cycle simulation beyond synchronous circuits.
154-161
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conf/iccad/ChakrabortyD97
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conf/iccad/Visweswariah97
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conf/iccad/MehrotraQSBAS97
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conf/iccad/CortadellaKKLPY97
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conf/iccad/LakshminarayanaKJ97
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conf/iccad/VandenbergheBG97
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J. Richard Griffith ,
Michel S. Nakhla :
A new high-order absolutely-stable explicit numerical integration algorithm for the time-domain simulation of nonlinear circuits.
276-280
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conf/iccad/PapachristouB97
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Robert P. Dick ,
Niraj K. Jha :
MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems.
522-529
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conf/iccad/SarrafzadehW97
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Shinji Sato :
Simulated quenching: a new placement method for module generation.
538-541
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Haluk Konuk :
Fault simulation of interconnect opens in digital CMOS circuits.
548-554
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Tzuhao Chen ,
Ibrahim N. Hajj :
GOLDENGATE: a fast and accurate bridging fault simulator under a hybrid logic/IDDQ testing environment.
555-561
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conf/iccad/VenkataramanF97
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Hai Zhou ,
D. F. Wong :
An exact gate decomposition algorithm for low-power technology mapping.
575-580
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Rolf Ernst ,
Wei Ye :
Embedded program timing analysis based on path clustering and architecture classification.
598-604
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Youxin Gao ,
D. F. Wong :
Optimal shape function for a bi-directional wire under Elmore delay model.
622-627
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conf/iccad/TafertshoferGH97
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conf/iccad/GavrilovGPMDPVB97
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conf/iccad/KishinevskyKLST97
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