ICCAD 2009:
San Jose, California, USAFunctional Verification
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conf/iccad/BruttomessoS09
Advances in Routing
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Scheduling Techniques for Low Power
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Resilient Computing
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Advances in Test Efficiency
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conf/iccad/MiyaseYNIHAWK09
Advances in FPGA Synthesis and Trustable
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conf/iccad/ChakrabortyB09 export record as
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Design Automation for Biological Systems
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conf/iccad/OllikainenSCKK09 export record as
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Analysis and Mitigation of Transient and Permanent Failures
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conf/iccad/VaidyanathanOX09 export record as
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Lu Wan ,
Deming Chen :
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior.
172-179
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Emerging Topics in Test and Reliability
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conf/iccad/ChienCLCLCTT09 export record as
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Timing Closure and Design Robustness
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Routing in Alternative Technologies
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Emerging Design and Memory Technologies
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Tutorial
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Analytical Advances in Physical Synthesis
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Yujia Feng ,
Shiyan Hu :
The epsilon-approximation to discrete VT assignment for leakage power minimization.
281-287
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Zuochang Ye ,
Zhiping Yu :
An efficient algorithm for modeling spatially-correlated process variation in statistical full-chip leakage analysis.
295-301
Thermal-Aware Management Techniques for Multi-Core Architectures
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Statistical Timing Analysis and Its Application
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Jaeyong Chung ,
Jacob A. Abraham :
A hierarchy of subgraphs underlying a timing graph and its use in capturing topological correlation in SSTA.
321-327
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Congestion Driven Placement
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New Applications in Logic Synthesis
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Advanced Modeling and Simulation Methods
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Chenjie Gu :
QLMOR: A new projection-based approach for nonlinear model order reduction.
389-396
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Onder Suvak ,
Alper Demir :
Computing quadratic approximations for the isochrons of oscillators: A general theory and advanced numerical methods.
397-402
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Wei Dong ,
Peng Li :
Final-value ODEs: Stable numerical integration and its application to parallel circuit analysis.
403-409
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conf/iccad/ThornquistKHDB09
Characterization and Compensation of Variability
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Policies and Methods for Low Power
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Baoxian Zhao ,
Hakan Aydin :
Minimizing expected energy consumption through optimal integration of DVS and DPM.
449-456
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Emerging Memory Technologies
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conf/iccad/ChatterjeeRYM09 export record as
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Yong Zhang ,
Peng Li :
Gene-regulatory memories: Electrical-equivalent modeling, simulation and parameter identification.
491-496
Advanced Device Reliability and Modeling
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Clock Optimization and Parallel Algorithm in EDA
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Analysis and Optimization of Network-On-Chip and Multiprocessor SOC
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conf/iccad/RahmatiMBAMS09 export record as
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conf/iccad/CastrillonZKVLA09
Design-Patterning Interactions
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Yue Xu ,
Chris Chu :
GREMA: Graph reduction based efficient mask assignment for double patterning technology.
601-606
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Yield Estimation and Optimization for SRAMs
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conf/iccad/BansalSKMLASKCNHD09 Aditya Bansal ,
Rama N. Singh ,
Rouwaida Kanj ,
Saibal Mukhopadhyay ,
Jin-Fuw Lee ,
Emrah Acar ,
Amith Singhee ,
Keunwoo Kim ,
Ching-Te Chuang ,
Sani R. Nassif ,
Fook-Luen Heng ,
Koushik K. Das :
Yield estimation of SRAM circuits using "Virtual SRAM Fab".
631-636
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Thermal Modeling and Analysis at Chip and Platform Levels
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Analytic Placement
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Jason Cong ,
Yi Zou :
Parallel multi-level analytical global placement on graphics processing units.
681-688
Performance and Power Issues in Embedded System-Level Design
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conf/iccad/AthanasopoulosBLI09 export record as
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Biological Circuits and Systems
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Statistical Simulation and Optimization of Serial Link and Wordlength
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Parasitic Extraction, Modeling, and Reduction Techniques
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conf/iccad/El-MoselhyED09 export record as
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conf/iccad/ChakrabortySJ09 export record as
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Advanced Boolean Techniques in Logic Synthesis
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conf/iccad/KrishnaswamyRMP09 export record as
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Tutorial
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Power 7 - Verification Challenges of a High-End 8-Core Microprocessor
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