ICCAD 2009: San Jose, California, USA

Functional Verification

Advances in Routing

Scheduling Techniques for Low Power

Resilient Computing

Advances in Test Efficiency

Advances in FPGA Synthesis and Trustable

Design Automation for Biological Systems

Analysis and Mitigation of Transient and Permanent Failures

Emerging Topics in Test and Reliability

Timing Closure and Design Robustness

Routing in Alternative Technologies

Emerging Design and Memory Technologies


Analytical Advances in Physical Synthesis

Thermal-Aware Management Techniques for Multi-Core Architectures

Statistical Timing Analysis and Its Application

Congestion Driven Placement

New Applications in Logic Synthesis

Advanced Modeling and Simulation Methods

Characterization and Compensation of Variability

Policies and Methods for Low Power

Emerging Memory Technologies

Advanced Device Reliability and Modeling

Clock Optimization and Parallel Algorithm in EDA

Analysis and Optimization of Network-On-Chip and Multiprocessor SOC

Design-Patterning Interactions

Yield Estimation and Optimization for SRAMs

Thermal Modeling and Analysis at Chip and Platform Levels

Analytic Placement

Performance and Power Issues in Embedded System-Level Design

Biological Circuits and Systems

Statistical Simulation and Optimization of Serial Link and Wordlength

Parasitic Extraction, Modeling, and Reduction Techniques

Advanced Boolean Techniques in Logic Synthesis


Power 7 - Verification Challenges of a High-End 8-Core Microprocessor

maintained by Schloss Dagstuhl LZI at University of Trier