2009 International Conference on Computer-Aided Design (ICCAD'09), November 2-5, 2009, San Jose, CA, USA.
San Jose, California, USA
Advances in Routing
Scheduling Techniques for Low Power
Advances in Test Efficiency
Advances in FPGA Synthesis and Trustable
Design Automation for Biological Systems
Analysis and Mitigation of Transient and Permanent Failures
Emerging Topics in Test and Reliability
Timing Closure and Design Robustness
Routing in Alternative Technologies
Emerging Design and Memory Technologies
Analytical Advances in Physical Synthesis
, Shiyan Hu
: The epsilon-approximation to discrete VT assignment for leakage power minimization.
, Zhiping Yu
: An efficient algorithm for modeling spatially-correlated process variation in statistical full-chip leakage analysis.
Thermal-Aware Management Techniques for Multi-Core Architectures
Statistical Timing Analysis and Its Application
, Jacob A. Abraham
: A hierarchy of subgraphs underlying a timing graph and its use in capturing topological correlation in SSTA.
Congestion Driven Placement
New Applications in Logic Synthesis
Advanced Modeling and Simulation Methods
: QLMOR: A new projection-based approach for nonlinear model order reduction.
, Alper Demir
: Computing quadratic approximations for the isochrons of oscillators: A general theory and advanced numerical methods.
, Peng Li
: Final-value ODEs: Stable numerical integration and its application to parallel circuit analysis.
Characterization and Compensation of Variability
Policies and Methods for Low Power
, Hakan Aydin
: Minimizing expected energy consumption through optimal integration of DVS and DPM.
Emerging Memory Technologies
, Peng Li
: Gene-regulatory memories: Electrical-equivalent modeling, simulation and parameter identification.
Advanced Device Reliability and Modeling
Clock Optimization and Parallel Algorithm in EDA
Analysis and Optimization of Network-On-Chip and Multiprocessor SOC
, Chris Chu
: GREMA: Graph reduction based efficient mask assignment for double patterning technology.
Yield Estimation and Optimization for SRAMs
, Rama N. Singh
, Rouwaida Kanj
, Saibal Mukhopadhyay
, Jin-Fuw Lee
, Emrah Acar
, Amith Singhee
, Keunwoo Kim
, Ching-Te Chuang
, Sani R. Nassif
, Fook-Luen Heng
, Koushik K. Das
: Yield estimation of SRAM circuits using "Virtual SRAM Fab".
Thermal Modeling and Analysis at Chip and Platform Levels
, Yi Zou
: Parallel multi-level analytical global placement on graphics processing units.
Performance and Power Issues in Embedded System-Level Design
Biological Circuits and Systems
Statistical Simulation and Optimization of Serial Link and Wordlength
Parasitic Extraction, Modeling, and Reduction Techniques
Advanced Boolean Techniques in Logic Synthesis
Power 7 - Verification Challenges of a High-End 8-Core Microprocessor