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Publication search results
found 65 matches
- 1999
- R. Dean Adams, Edmond S. Cooley:
The Limits of Digital Testing for Dynamic Circuits. VTS 1999: 28-33 - Vinod K. Agarwal:
VTS 1999 Keynote Address Embedded Test OR External Test. VTS 1999: 2-7 - Robert C. Aitken:
Extending the Pseudo-Stuck-At Fault Model to Provide Complete IDDQ Coverage. VTS 1999: 128-134 - Gustavo R. Alves, José Manuel Martins Ferreira:
From Design-for-Test to Design-for-Debug-and-Test: Analysis of Requirements and Limitations for 1149.1. VTS 1999: 473-486 - M. Enamul Amyeen, W. Kent Fuchs, Irith Pomeranz, Vamsi Boppana:
Implication and Evaluation Techniques for Proving Fault Equivalence. VTS 1999: 201-213 - Ken Batcher, Christos A. Papachristou:
Instruction Randomization Self Test For Processor Cores. VTS 1999: 34-40 - Ismet Bayraktaroglu, Alex Orailoglu:
Low-Cost On-Line Test for Digital Filters. VTS 1999: 446-451 - Debashis Bhattacharya:
Instruction-Driven Wake-Up Mechanisms for Snoopy TAP Controller. VTS 1999: 467-472 - Th. Calin, Lorena Anghel, Michael Nicolaidis:
Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS. VTS 1999: 135-142 - Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar:
Built-in Test Pattern Generation For High-Performance Cir cuits Using Twisted-Ring Counters. VTS 1999: 22-27 - Sreejit Chakravarty, Vinodh Gopal:
Techniques to Encode and Compress Fault Dictionaries. VTS 1999: 195-200 - Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer:
Test Generation for Ground Bounce in Internal Logic Circuitry. VTS 1999: 95-105 - Silvia Chiusano, Fulvio Corno, Paolo Prinetto:
RT-level TPG Exploiting High-Level Synthesis Information. VTS 1999: 341-353 - Debaleena Das, Nur A. Touba:
Weight-Based Codes and Their Application to Concurrent Error Detection of Multilevel Circuits. VTS 1999: 370-377 - Jayabrata Ghosh-Dastidar, Nur A. Touba:
Adaptive Techniques for Improving Delay Fault Diagnosis. VTS 1999: 168-172 - Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch:
A Test Vector Inhibiting Technique for Low Energy BIST Design. VTS 1999: 407-412 - Michael Gössel, Andrej A. Morosov, Egor S. Sogomonyan:
A New Totally Error Propagating Compactor for Arbitrary Cores with Digital Interfaces. VTS 1999: 49-57 - Michael R. Grimaila, Sooryong Lee, Jennifer Dworak, Kenneth M. Butler, Bret Stewart, Hari Balachandran, Bryan Houchins, Vineet Mathur, Jaehong Park, Li-C. Wang, M. Ray Mercer:
REDO - Probabilistic Excitation and Deterministic Observation - First Commercial Experimen. VTS 1999: 268-274 - Ruifeng Guo, Irith Pomeranz, Sudhakar M. Reddy:
A Fault Simulation Based Test Pattern Generator for Synchronous Sequential Circuits. VTS 1999: 260-267 - Carter Hamilton, Gretchen Gibson, Sajitha Wijesuriya, Charles E. Stroud:
Enhanced Bist-Based Diagnosis of FPGAs via Boundary Scan Access. VTS 1999: 413-419 - Ronald J. Hayne, Barry W. Johnson:
Behavioral Fault Modeling in a VHDL Synthesis Environment. VTS 1999: 333-340 - Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik:
Error Detecting Refreshment for Embedded DRAMs. VTS 1999: 384-390 - Jiun-Lang Huang, Chen-Yang Pan, Kwang-Ting Cheng:
Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits. VTS 1999: 220-225 - Eugeni Isern, Miquel Roca, Jaume Segura:
Analyzing the Need for ATPG Targeting GOS Defects. VTS 1999: 420-425 - Ankur Jain, Michael S. Hsiao, Vamsi Boppana, Masahiro Fujita:
On the Evaluation of Arbitrary Defect Coverage of Test Sets. VTS 1999: 426-432 - Abhijit Jas, Jayabrata Ghosh-Dastidar, Nur A. Touba:
Scan Vector Compression/Decompression Using Statistical Coding. VTS 1999: 114-120 - Wanli Jiang, Bapiraju Vinnakota:
Defect-Oriented Test Scheduling. VTS 1999: 433-439 - Wen-Ben Jone, Der-Cheng Huang, S. C. Wu, Kuen-Jong Lee:
An Efficient BIST Method for Small Buffers. VTS 1999: 246-251 - Xrysovalantis Kavousianos, Dimitris Nikolos:
Modular TSC Checkers for Bose-Lin and Bose Codes. VTS 1999: 354-360 - HyungWon Kim, John P. Hayes:
Delay Fault Testing of Designs with Embedded IP Cores. VTS 1999: 160-167
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