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2020 – today
- 2024
[j27]Shanmuga Venkatachalam, Harideep Nair
, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen:
Corrigendum: SemNet: Learning semantic attributes for human activity recognition with deep belief networks. Frontiers Big Data 6 (2024)- [j26]Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen:
TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2519-2523 (2024) - [c88]Harideep Nair, David Barajas-Jasso, Quinn Jacobson, John Paul Shen:
TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP Learning. AICAS 2024: 189-193 - [c87]Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. Shawn Blanton, John Paul Shen:
Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators. ISVLSI 2024: 661-665 - [c86]Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen:
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors. NICE 2024: 1-9 - [i10]Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen:
OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference. CoRR abs/2402.19376 (2024) - [i9]Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen:
Realtime Person Identification via Gait Analysis. CoRR abs/2404.15312 (2024) - [i8]Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen:
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors. CoRR abs/2405.11844 (2024) - 2023
- [j25]Adeola Bannis, Shijia Pan, Carlos Ruiz Dominguez, John Paul Shen, Hae Young Noh, Pei Zhang:
IDIoT: Multimodal Framework for Ubiquitous Identification and Assignment of Human-carried Wearable Devices. ACM Trans. Internet Things 4(2): 11:1-11:25 (2023) - [c85]Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen:
tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI. ISCAS 2023: 1-5 - [c84]Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen:
tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit. ISVLSI 2023: 1-6 - 2022
- [j24]Shanmuga Venkatachalam, Harideep Nair, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen:
SemNet: Learning semantic attributes for human activity recognition with deep belief networks. Frontiers Big Data 5 (2022) - [c83]Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen:
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. ISVLSI 2022: 152-157 - [i7]Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen:
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. CoRR abs/2205.07410 (2022) - [i6]Prabhu Vellaisamy, John Paul Shen:
Towards a Design Framework for TNN-Based Neuromorphic Sensory Processing Units. CoRR abs/2205.14248 (2022) - 2021
- [c82]Shreyas Chaudhari, Harideep Nair, José M. F. Moura, John Paul Shen:
Unsupervised Clustering of Time Series Signals Using Neuromorphic Energy-Efficient Temporal Neural Networks. ICASSP 2021: 7873-7877 - [c81]Harideep Nair, John Paul Shen, James E. Smith:
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks. ISVLSI 2021: 266-271 - [i5]Shreyas Chaudhari, Harideep Nair, José M. F. Moura, John Paul Shen:
Unsupervised Clustering of Time Series Signals using Neuromorphic Energy-Efficient Temporal Neural Networks. CoRR abs/2102.09200 (2021) - [i4]Harideep Nair, John Paul Shen, James E. Smith:
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks. CoRR abs/2105.13262 (2021) - 2020
- [j23]Abhinav Jauhri, Brad Stocks, Jian-Hui Li, Koichi Yamada, John Paul Shen:
Generating Realistic Ride-Hailing Datasets Using GANs. ACM Trans. Spatial Algorithms Syst. 6(3): 18:1-18:14 (2020) - [c80]Tyler Nuanes, Matt Elsey, Radek Grzeszczuk, John Paul Shen:
Sky Segmentation for Enhanced Depth Reconstruction and Bokeh Rendering with Efficient Architectures. Computational Imaging 2020 - [i3]Harideep Nair, John Paul Shen, James E. Smith:
Direct CMOS Implementation of Neuromorphic Temporal Neural Networks for Sensory Processing. CoRR abs/2009.00457 (2020)
2010 – 2019
- 2019
- [c79]Guan-Lin Chao, Chih Chi Hu, Bing Liu, John Paul Shen, Ian R. Lane:
Audio-visual TED corpus: enhancing the TED-LIUM corpus with facial information, contextual text and object recognition. UbiComp/ISWC Adjunct 2019: 468-473 - [c78]Harideep Nair, Cathy Tan, Ming Zeng, Ole J. Mengshoel, John Paul Shen:
AttriNet: learning mid-level features for human activity recognition with deep belief networks. UbiComp/ISWC Adjunct 2019: 510-517 - [c77]Guan-Lin Chao, John Paul Shen, Ian R. Lane:
Deep Speaker Embedding for Speaker-Targeted Automatic Speech Recognition. NLPIR 2019: 39-43 - 2018
- [c76]Ming Zeng, Tong Yu, Ole J. Mengshoel, Helen Qin, Chris Lee, John Paul Shen:
Improving Bag-Of-Words: Capturing Local Information for Motion-Based Activity Recognition. UbiComp/ISWC Adjunct 2018: 1345-1354 - 2017
- [c75]Abhinav Jauhri, Brian Foo, Jérôme Berclaz, Chih Chi Hu, Radek Grzeszczuk, Vasu Parameswaran, John Paul Shen:
Space-Time Graph Modeling of Ride Requests Based on Real-World Data. AAAI Workshops 2017 - [c74]Min Hao Chen, Abhinav Jauhri, John Paul Shen:
Data Driven Analysis of the Potentials of Dynamic Ride Pooling. IWCTS@SIGSPATIAL 2017: 7-12 - [c73]Shijia Pan, Ceferino Gabriel Ramirez, Mostafa Mirshekari, Jonathon Fagert, Albert Jin Chung, Chih Chi Hu, John Paul Shen, Hae Young Noh, Pei Zhang:
SurfaceVibe: vibration-based tap & swipe tracking on ubiquitous surfaces. IPSN 2017: 197-208 - [i2]Abhinav Jauhri, Brian Foo, Jérôme Berclaz, Chih Chi Hu, Radek Grzeszczuk, Vasu Parameswaran, John Paul Shen:
Space-Time Graph Modeling of Ride Requests Based on Real-World Data. CoRR abs/1701.06635 (2017) - [i1]Abhinav Jauhri, Carlee Joe-Wong, John Paul Shen:
On the Real-time Vehicle Placement Problem. CoRR abs/1712.01235 (2017)
2000 – 2009
- 2008
- [j22]Carlos Madriles, Carlos García Quiñones, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen, Hong Wang, John Paul Shen:
Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices. IEEE Trans. Parallel Distributed Syst. 19(7): 914-925 (2008) - 2006
- [c72]Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan N. Rakvic, Hong Wang, John Paul Shen:
Multiple Instruction Stream Processor. ISCA 2006: 114-127 - [c71]Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Patrick Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb:
Die Stacking (3D) Microarchitecture. MICRO 2006: 469-479 - [e1]John Paul Shen, Margaret Martonosi:
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006. ACM 2006, ISBN 1-59593-451-0 [contents] - 2005
- [c70]Satish Narayanasamy, Hong Wang, Perry H. Wang, John Paul Shen, Brad Calder:
A Dependency Chain Clustered Microarchitecture. IPDPS 2005 - [c69]Murali Annavaram, Ed Grochowski, John Paul Shen:
Mitigating Amdahl's Law through EPI Throttling. ISCA 2005: 298-309 - 2004
- [j21]Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen:
Helper Threads via Virtual Multithreading. IEEE Micro 24(6): 74-82 (2004) - [j20]Partha Kundu, Murali Annavaram, Trung A. Diep, John Paul Shen:
A case for shared instruction cache on chip multiprocessors running OLTP. SIGARCH Comput. Archit. News 32(3): 11-18 (2004) - [c68]Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen:
Helper threads via virtual multithreading on an experimental itanium® 2 processor-based platform. ASPLOS 2004: 144-155 - [c67]Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang, Donald Yeung, Milind Girkar, John Paul Shen:
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors. CGO 2004: 27-38 - [c66]Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, John Paul Shen:
Hardware Support for Prescient Instruction Prefetch. HPCA 2004: 84-95 - [c65]Ed Grochowski, Ronny Ronen, John Paul Shen, Hong Wang:
Best of Both Latency and Throughput. ICCD 2004: 236-243 - 2003
- [c64]Richard A. Hankins, Trung A. Diep, Murali Annavaram, Brian Hirano, Harald Eri, Hubert Nueckel, John Paul Shen:
Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice. MICRO 2003: 151-164 - [c63]Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang, John Paul Shen:
A framework for modeling and optimization of prescient instruction prefetch. SIGMETRICS 2003: 13-24 - 2002
- [c62]R. David Weldon, Steven S. Chang, Hong Wang, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen:
Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors. Interaction between Compilers and Computer Architectures 2002: 57-67 - [c61]Ryan N. Rakvic, Bryan Black, Deepak Limaye, John Paul Shen:
Non-Vital Loads. HPCA 2002: 165-174 - [c60]Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen:
Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation. HPCA 2002: 187-196 - [c59]Murali Annavaram, Trung A. Diep, John Paul Shen:
Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors. ICCD 2002: 242-248 - [c58]Shih-Wei Liao, Perry H. Wang, Hong Wang, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery:
Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. PLDI 2002: 117-128 - 2001
- [j19]Ronny Ronen, Avi Mendelson, Konrad Lai, Shih-Lien Lu, Fred J. Pollack, John Paul Shen:
Coming challenges in microarchitecture and architecture. Proc. IEEE 89(3): 325-340 (2001) - [c57]Noppanunt Utamaphethai, Ronald D. Blanton, John Paul Shen:
Relating buffer-oriented microarchitecture validation to high-level pipeline functionality. HLDVT 2001: 3-8 - [c56]Perry H. Wang, Hong Wang, Ralph-Michael Kling, Kalpana Ramakrishnan, John Paul Shen:
Register Renaming and Scheduling for Dynamic Execution of Predicated Code. HPCA 2001: 15-25 - [c55]John Paul Shen:
Clear and Present Tensions in Microprocessor Design. ICCD 2001: 4 - [c54]Deepak Limaye, Ryan N. Rakvic, John Paul Shen:
Parallel Cachelets. ICCD 2001: 284-292 - [c53]Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen:
Speculative precomputation: long-range prefetching of delinquent loads. ISCA 2001: 14-25 - [c52]Jamison D. Collins, Dean M. Tullsen, Hong Wang, John Paul Shen:
Dynamic speculative precomputation. MICRO 2001: 306-317 - 2000
- [j18]Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen:
Effectiveness of Microarchitecture Test Program Generation. IEEE Des. Test Comput. 17(4): 38-49 (2000) - [j17]Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen:
A Buffer-Oriented Methodology for Microarchitecture Validation. J. Electron. Test. 16(1-2): 49-65 (2000) - [c51]Ryan N. Rakvic, Bryan Black, John Paul Shen:
Completion time multiple branch prediction for enhancing trace cache performance. ISCA 2000: 47-58 - [c50]Yuan C. Chou, John Paul Shen:
Instruction path coprocessors. ISCA 2000: 270-281 - [c49]Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen:
PipeRench implementation of the instruction path coprocessor. MICRO 2000: 147-158
1990 – 1999
- 1999
- [j16]Candice Bechem, Jonathan Combs, Noppanunt Utamaphethai, Bryan Black, R. D. (Shawn) Blanton, John Paul Shen:
An integrated functional performance simulator. IEEE Micro 19(3): 26-35 (1999) - [c48]Jonathan Combs, Candice Bechem Combs, John Paul Shen:
Mispredicted Path Cache Effects. Euro-Par 1999: 1322-1331 - [c47]Yuan C. Chou, Jason Fung, John Paul Shen:
Reducing branch misprediction penalties via dynamic control independence detection. International Conference on Supercomputing 1999: 109-118 - [c46]Bryan Black, Bohuslav Rychlik, John Paul Shen:
The Block-Based Trace Cache. ISCA 1999: 196-207 - [c45]Alexander G. Dean, John Paul Shen:
System-Level Issues for Software Thread Integration: Guest Triggering and Host Selection. RTSS 1999: 234 - [c44]Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen:
Superscalar Processor Validation at the Microarchitecture Level. VLSI Design 1999: 300-305 - 1998
- [j15]Bryan Black, John Paul Shen:
Calibration of Microprocessor Performance Models. Computer 31(5): 59-65 (1998) - [j14]Mikko H. Lipasti, John Paul Shen:
Exploiting Value Locality to Exceed the Dataflow Limit. Int. J. Parallel Program. 26(4): 505-538 (1998) - [c43]Bohuslav Rychlik, John Faistl, Bryon Krug, John Paul Shen:
Efficacy and Performance Impact of Value Prediction. IEEE PACT 1998: 148- - [c42]Alexander G. Dean, John Paul Shen:
Hardware to Software Migration with Real-Time Thread Integration. EUROMICRO 1998: 10243- - [c41]Bryan Black, Brian Mueller, Stephanie Postal, Ryan N. Rakvic, Noppanunt Utamaphethai, John Paul Shen:
Load Execution Latency Reduction. International Conference on Supercomputing 1998: 29-36 - [c40]Alexander G. Dean, John Paul Shen:
Techniques for Software Thread Integration in Real-Time Embedded Systems. RTSS 1998: 322-333 - 1997
- [j13]Mikko H. Lipasti, John Paul Shen:
Superspeculative Microarchitecture for Beyond AD 2000. Computer 30(9): 59-66 (1997) - [j12]Chris J. Newburn, John Paul Shen:
Post-pass partitioning of signal processing programs. Int. J. Parallel Program. 25(4): 245-280 (1997) - [c39]Mikko H. Lipasti, John Paul Shen:
The Performance Potential of Value and Dependence Prediction. Euro-Par 1997: 1043-1052 - [c38]Yuan C. Chou, Daniel P. Siewiorek, John Paul Shen:
A Realistic Study on Multithreaded Superscalar Processor Design. Euro-Par 1997: 1092-1101 - [c37]Derek B. Noonburg, John Paul Shen:
A Framework for Statistical Modeling of Superscalar Processor Performance. HPCA 1997: 298-309 - [c36]Chris J. Newburn, John Paul Shen:
Compiler Support for Low-Cost Synchronization Among Threads. PARCO 1997: 485-494 - 1996
- [c35]Chris J. Newburn, John Paul Shen:
Automatic partitioning of signal processing programs for symmetric multiprocessors. IEEE PACT 1996: 269-280 - [c34]Andrew S. Huang, John Paul Shen:
The Intrinsic Bandwidth Requirements of Ordinary Programs. ASPLOS 1996: 105-114 - [c33]Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen:
Value Locality and Load Value Prediction. ASPLOS 1996: 138-147 - [c32]Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen:
Can Trace-Driven Simulators Accurately Predict Superscalar Performance? ICCD 1996: 478-485 - [c31]Mikko H. Lipasti, John Paul Shen:
Exceeding the Dataflow Limit via Value Prediction. MICRO 1996: 226-237 - 1995
- [j11]Trung A. Diep, John Paul Shen:
VMW: A Visualization-Based Microarchitecture Workbench. Computer 28(12): 57-64 (1995) - [c30]Trung A. Diep, John Paul Shen:
Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures. FTCS 1995: 100-109 - [c29]Trung A. Diep, Christopher Nelson, John Paul Shen:
Performance Evaluation of the PowerPC 620 Microarchitecture. ISCA 1995: 163-175 - [c28]Andrew S. Huang, John Paul Shen:
A limit study of local memory requirements using value reuse profiles. MICRO 1995: 71-81 - 1994
- [j10]Michael A. Schuette, John Paul Shen:
Exploiting Instruction-Level Parallelism for Integrated Control-Flow Monitoring. IEEE Trans. Computers 43(2): 129-140 (1994) - [c27]Chris J. Newburn, Derek B. Noonburg, John Paul Shen:
A PDG-based Tool and its Use in Analyzing Program Control Dependences. IFIP PACT 1994: 157-168 - [c26]Andrew S. Huang, Gert Slavenburg, John Paul Shen:
Speculative Disambiguation: A Compilation Technique for Dynamic Memory Disambiguation. ISCA 1994: 200-210 - [c25]Derek B. Noonburg, John Paul Shen:
Theoretical modeling of superscalar processor performance. MICRO 1994: 52-62 - 1993
- [j9]Michael A. Schuette, John Paul Shen:
Instruction-level experimental evaluation of the Multiflow TRACE 14/300 VLIW computer. J. Supercomput. 7(1-2): 249-271 (1993) - [c24]Trung A. Diep, Mikko H. Lipasti, John Paul Shen:
Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000. ICCD 1993: 86-93 - [c23]Chris J. Newburn, Andrew S. Huang, John Paul Shen:
Balancing Fine- and Medium-Grained Parallelism in Scheduling Loops for the XIMD Architecture. Architectures and Compilation Techniques for Fine and Medium Grain Parallelism 1993: 39-52 - [c22]Trung A. Diep, John Paul Shen, Mike Phillip:
EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors. MICRO 1993: 225-235 - 1992
- [c21]Scott H. Robinson, John Paul Shen:
Direct Methods for Synthesis of Self-Monitoring State Machines. FTCS 1992: 306-315 - 1991
- [c20]Andrew Wolfe, John Paul Shen:
A Variable Instruction Stream Extension to the VLIW Architecture. ASPLOS 1991: 2-14 - [c19]Michael A. Schuette, John Paul Shen:
Exploiting Instruction-Level Resource Parallelism for Transparent, Integrated Control-Flow Monitoring. FTCS 1991: 318-325 - [c18]Chriss Stephens, Bryce Cogswell, John Heinlein, Gregory Palmer, John Paul Shen:
Instruction Level Profiling and Evaluation of the IBM/6000. ISCA 1991: 180-189 - [c17]Michael A. Schuette, John Paul Shen:
An Instruction-Level Performance Analysis of the Multiflow TRACE 14/300. MICRO 1991: 2-11 - [c16]Maurício Breternitz Jr., John Paul Shen:
Implementation Optimization Techniques for Architecture Synthesis of Application-Specific Processors. MICRO 1991: 114-123 - 1990
- [j8]Kent D. Wilken, John Paul Shen:
Continuous signature monitoring: low-cost concurrent detection of processor control errors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(6): 629-641 (1990) - [c15]Maurício Breternitz Jr., John Paul Shen:
Architecture Synthesis of High-Performance Application-Specific Processors. DAC 1990: 542-548 - [c14]Scott H. Robinson, John Paul Shen:
Evaluation and Synthesis of Self-Monitoring State Machines. ICCAD 1990: 276-279
1980 – 1989
- 1988
- [j7]F. Joel Ferguson, John Paul Shen:
A CMOS fault extractor for inductive fault analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(11): 1181-1194 (1988) - [c13]Andrew Wolfe, Maurício Breternitz Jr., Chriss Stephens, A. L. Ting, David Blair Kirk, Ronald P. Bianchini Jr., John Paul Shen:
The White Dwarf: A High-Performance Application-Specific Processor. ISCA 1988: 212-222 - [c12]John Paul Shen, F. Joel Ferguson:
Extraction and Simulation of Realistic CMOS Faults Using Inductive Fault Analysis. ITC 1988: 475-484 - [c11]Kent D. Wilken, John Paul Shen:
Continuous Signature Monitoring: Efficient Concurrent-Detection of Processor Control Errors. ITC 1988: 914-925 - [c10]Andrew Wolfe, John Paul Shen:
Flexible processors: a promising application-specific processor design approach. MICRO 1988: 30-39 - [c9]Maurício Breternitz Jr., John Paul Shen:
Organization of array data for concurrent memory access. MICRO 1988: 97-99 - 1987
- [j6]Michael A. Schuette, John Paul Shen:
Processor Control Flow Monitoring Using Signatured Instruction Streams. IEEE Trans. Computers 36(3): 264-276 (1987) - [j5]Ronald P. Bianchini Jr., John Paul Shen:
Interprocessor Traffic Scheduling Algorithm for Multiple-Processor Networks. IEEE Trans. Computers 36(4): 396-409 (1987) - 1986
- [j4]John Paul Shen, John P. Hayes, Luigi Ciminiera, Angelo Serra:
Fault-tolerance and performance analysis of beta-networks. Parallel Comput. 3(3): 231-249 (1986) - [c8]John Paul Shen:
Highlights of CMU Research on CAD, CAM, CAT of VLSI Circuits. FJCC 1986: 878-889 - 1985
- [j3]John Paul Shen, Wojciech Maly, F. Joel Ferguson:
Inductive Fault Analysis of MOS Integrated Circuits. IEEE Des. Test 2(6): 13-26 (1985) - [c7]Patrick P. Fasang, Michael A. Schuette, John Paul Shen, William A. Gwaltney:
Automated Design for Testability of Semicustom Integrated Circuits. ITC 1985: 558-564 - 1984
- [j2]John Paul Shen, John P. Hayes:
Fault-Tolerance of Dynamic-Full-Access Interconnection Networks. IEEE Trans. Computers 33(3): 241-248 (1984) - [j1]John Paul Shen, F. Joel Ferguson:
The Design of Easily Tastabel VLSI Array Multipliers. IEEE Trans. Computers 33(6): 554-560 (1984) - [c6]Wojciech Maly, F. Joel Ferguson, John Paul Shen:
Systematic Characterization of Physical Defects for Fault Analysis of MOS IC Cells. ITC 1984: 390-399 - 1983
- [c5]F. Joel Ferguson, John Paul Shen:
The design of two easily-testable VLSI array multipliers. IEEE Symposium on Computer Arithmetic 1983: 2-9 - [c4]David C. H. Lee, John Paul Shen:
Easily-Testable (N, K) Shuffle/Exchange Networks. ICPP 1983: 65-70 - [c3]Michael A. Schuette, John Paul Shen:
On-Line Self-Monitoring Using Signatured Instruction Streams. ITC 1983: 275-282 - 1982
- [c2]John Paul Shen:
Fault tolerance analysis of several interconnection networks. ICPP 1982: 101-112 - 1980
- [c1]John Paul Shen, John P. Hayes:
Fault Tolerance of a Class of Connecting Networks. ISCA 1980: 61-71
Coauthor Index
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