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Clair Webb
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2010 – 2019
- 2013
- [c4]Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim
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How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core. CICC 2013: 1-4
2000 – 2009
- 2009
- [j1]Muhammad M. Khellah
, Nam-Sung Kim, Yibin Ye, Dinesh Somasekhar, Tanay Karnik, Nitin Borkar, Gunjan Pandya, Fatih Hamzaoglu, Tom Coan, Yih Wang
, Kevin Zhang, Clair Webb, Vivek De:
Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits. IEEE J. Solid State Circuits 44(4): 1199-1208 (2009) - 2006
- [c3]Bryan Black, Murali Annavaram
, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Patrick Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb:
Die Stacking (3D) Microarchitecture. MICRO 2006: 469-479 - 2004
- [c2]Bryan Black, Donald Nelson, Clair Webb, Nick Samra:
3D Processing Technology and Its Impact on iA32 Microprocessors. ICCD 2004: 316-318 - 2002
- [c1]Atila Alvandpour, Ram Krishnamurthy, Shekhar Borkar, A. Rahman, Clair Webb:
A burn-in tolerant dynamic circuit technique. CICC 2002: 81-84
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