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2020 – today
- 2024
[j24]Fangxin Liu
, Wenbo Zhao, Zongwu Wang, Yongbiao Chen, Xiaoyao Liang, Li Jiang:
ERA-BS: Boosting the Efficiency of ReRAM-Based PIM Accelerator With Fine-Grained Bit-Level Sparsity. IEEE Trans. Computers 73(9): 2320-2334 (2024)- [j23]Chen Nie, Chenyu Tang, Jie Lin, Huan Hu, Chenyang Lv, Ting Cao, Weifeng Zhang, Li Jiang, Xiaoyao Liang, Weikang Qian, Yanan Sun, Zhezhi He:
VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations. IEEE Trans. Computers 73(10): 2378-2390 (2024) - [c88]Zhuoran Song, Chunyu Qi, Fangxin Liu, Naifeng Jing, Xiaoyao Liang:
CMC: Video Transformer Acceleration via CODEC Assisted Matrix Condensing. ASPLOS (2) 2024: 201-215 - [c87]Xueyuan Liu, Zhuoran Song, Guohao Dai, Gang Li, Can Xiao, Yan Xiang, Dehui Kong, Ke Xu, Xiaoyao Liang:
FusionArch: A Fusion-Based Accelerator for Point-Based Point Cloud Neural Networks. DATE 2024: 1-6 - [c86]Xueyuan Liu, Zhuoran Song, Xiang Liao, Xing Li, Tao Yang, Fangxin Liu, Xiaoyao Liang:
Sava: A Spatial- and Value-Aware Accelerator for Point Cloud Transformer. DATE 2024: 1-6 - [c85]Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Naifeng Jing, Li Jiang, Xiaoyao Liang:
Watt: A Write-Optimized RRAM-Based Accelerator for Attention. Euro-Par (2) 2024: 107-120 - [c84]Zeyu Zhu, Fanrong Li, Gang Li, Zejian Liu, Zitao Mo, Qinghao Hu, Xiaoyao Liang, Jian Cheng:
MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision Quantization. HPCA 2024: 124-138 - [c83]Yilong Zhao, Mingyu Gao, Fangxin Liu, Yiwei Hu, Zongwu Wang, Han Lin, Jin Li, He Xian, Hanlin Dong, Tao Yang, Naifeng Jing, Xiaoyao Liang, Li Jiang:
UM-PIM: DRAM-based PIM with Uniform & Shared Memory Space. ISCA 2024: 644-659 - [c82]Cheng Gu, Gang Li, Xiaolong Lin, Jiayao Ling, Xiaoyao Liang:
GNeRF: Accelerating Neural Radiance Fields Inference via Adaptive Sample Gating. ISCAS 2024: 1-5 - [i12]Zeyu Zhu, Peisong Wang, Qinghao Hu, Gang Li, Xiaoyao Liang, Jian Cheng:
FastGL: A GPU-Efficient Framework for Accelerating Sampling-Based GNN Training at Large Scale. CoRR abs/2409.14939 (2024) - 2023
- [j22]Jing Ke, Yizhou Lu, Yiqing Shen, Junchao Zhu, Yijin Zhou, Jinghan Huang, Jieteng Yao, Xiaoyao Liang, Yi Guo, Zhonghua Wei, Sheng Liu, Qin Huang, Fusong Jiang, Dinggang Shen:
ClusterSeg: A crowd cluster pinpointed nucleus segmentation framework with cross-modality datasets. Medical Image Anal. 85: 102758 (2023) - [j21]Fangxin Liu, Zongwu Wang, Yongbiao Chen, Zhezhi He, Tao Yang, Xiaoyao Liang, Li Jiang:
SoBS-X: Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based Neural Network Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 204-217 (2023) - [j20]Zhuoran Song, Heng Lu, Li Jiang, Naifeng Jing, Xiaoyao Liang:
Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2238-2251 (2023) - [j19]Yiqing Shen, Arcot Sowmya, Yulin Luo, Xiaoyao Liang, Dinggang Shen, Jing Ke:
A Federated Learning System for Histopathology Image Analysis With an Orchestral Stain-Normalization GAN. IEEE Trans. Medical Imaging 42(7): 1969-1981 (2023) - [j18]Zhuoran Song, Naifeng Jing, Xiaoyao Liang:
E2-VOR: An End-to-End En/Decoder Architecture for Efficient Video Object Recognition. ACM Trans. Design Autom. Electr. Syst. 28(1): 10:1-10:21 (2023) - [j17]Zhuoran Song, Wanzhen Liu, Tao Yang, Fangxin Liu, Naifeng Jing, Xiaoyao Liang:
A Point Cloud Video Recognition Acceleration Framework Based on Tempo-Spatial Information. IEEE Trans. Parallel Distributed Syst. 34(12): 3224-3237 (2023) - [c81]Zhuoran Song, Naifeng Jing, Xiaoyao Liang:
PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation. ACM TUR-C 2023: 49-50 - [c80]Xiaolong Lin, Gang Li, Zizhao Liu, Yadong Liu, Fan Zhang, Zhuoran Song, Naifeng Jing, Xiaoyao Liang:
AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity. DAC 2023: 1-6 - [c79]Zhuoran Song, Heng Lu, Gang Li, Li Jiang, Naifeng Jing, Xiaoyao Liang:
PRADA: Point Cloud Recognition Acceleration via Dynamic Approximation. DATE 2023: 1-6 - [c78]Xuhang Wang, Zhuoran Song, Xiaoyao Liang:
RealArch: A Real-Time Scheduler for Mapping Multi-Tenant DNNs on Multi-Core Accelerators. ICCD 2023: 158-165 - [c77]Xuan Zhang, Zhuoran Song, Xing Li, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang:
HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model. ICCD 2023: 375-382 - [c76]Chunyu Qi, Zilong Li, Zhuoran Song, Xiaoyao Liang:
ViTframe: Vision Transformer Acceleration via Informative Frame Selection for Video Recognition. ICCD 2023: 383-390 - [c75]Xuhang Wang, Zhuoran Song, Qiyue Huang, Xiaoyao Liang:
DEQ: Dynamic Element-wise Quantization for Efficient Attention Architecture. ICCD 2023: 623-630 - [c74]Zeyu Zhu, Fanrong Li, Zitao Mo, Qinghao Hu, Gang Li, Zejian Liu, Xiaoyao Liang, Jian Cheng:
$\rm A^2Q$: Aggregation-Aware Quantization for Graph Neural Networks. ICLR 2023 - [i11]Zeyu Zhu, Fanrong Li, Zitao Mo, Qinghao Hu, Gang Li, Zejian Liu, Xiaoyao Liang, Jian Cheng:
A2Q: Aggregation-Aware Quantization for Graph Neural Networks. CoRR abs/2302.00193 (2023) - [i10]Zeyu Zhu, Fanrong Li, Gang Li, Zejian Liu, Zitao Mo, Qinghao Hu, Xiaoyao Liang, Jian Cheng:
MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision Quantization. CoRR abs/2311.09775 (2023) - 2022
- [j16]Xiaofeng Hou, Chao Li, Jinghang Yang, Wenli Zheng, Xiaoyao Liang, Minyi Guo:
Integrated Power Anomaly Defense: Towards Oversubscription-Safe Data Centers. IEEE Trans. Cloud Comput. 10(3): 1875-1887 (2022) - [c73]Zhuoran Song, Zhongkai Yu, Naifeng Jing, Xiaoyao Liang:
E2SR: an end-to-end video CODEC assisted system for super resolution acceleration. DAC 2022: 229-234 - [c72]Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yongbiao Chen, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang:
EBSP: evolving bit sparsity patterns for hardware-friendly inference of quantized deep neural networks. DAC 2022: 259-264 - [c71]Yu Gong, Zhihan Xu, Zhezhi He, Weifeng Zhang, Xiaobing Tu, Xiaoyao Liang, Li Jiang:
N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores. FPGA 2022: 112-122 - [c70]Xing Li, Rachata Ausavarungnirun, Xiao Liu, Xueyuan Liu, Xuan Zhang, Heng Lu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang:
Gzippo: Highly-Compact Processing-in-Memory Graph Accelerator Alleviating Sparsity and Redundancy. ICCAD 2022: 115:1-115:9 - [c69]Heng Lu, Zhuoran Song, Xing Li, Naifeng Jing, Xiaoyao Liang:
GCNTrain: A Unified and Efficient Accelerator for Graph Convolutional Neural Network Training. ICCD 2022: 730-737 - [c68]Gang Li, Weixiang Xu, Zhuoran Song, Naifeng Jing, Jian Cheng, Xiaoyao Liang:
Ristretto: An Atomized Processing Architecture for Sparsity-Condensed Stream Flow in CNN. MICRO 2022: 1434-1450 - [i9]Zhuoran Song, Yihong Xu, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang:
CP-ViT: Cascade Vision Transformer Pruning via Progressive Sparsity Prediction. CoRR abs/2203.04570 (2022) - [i8]Zhuoran Song, Yihong Xu, Han Li, Naifeng Jing, Xiaoyao Liang, Li Jiang:
DNN Training Acceleration via Exploring GPGPU Friendly Sparsity. CoRR abs/2203.05705 (2022) - [i7]Nanyang Ye, Jingbiao Mei, Zhicheng Fang, Yuwen Zhang, Ziqing Zhang, Huaying Wu, Xiaoyao Liang:
BayesFT: Bayesian Optimization for Fault Tolerant Neural Network Architecture. CoRR abs/2210.01795 (2022) - [i6]Yilong Zhao, Li Jiang, Mingyu Gao, Naifeng Jing, Chengyang Gu, Qidong Tang, Fangxin Liu, Tao Yang, Xiaoyao Liang:
RePAST: A ReRAM-based PIM Accelerator for Second-order Training of DNN. CoRR abs/2210.15255 (2022) - 2021
- [j15]Zhuoran Song, Yanan Sun, Lerong Chen, Tianjian Li, Naifeng Jing, Xiaoyao Liang, Li Jiang:
ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(1): 129-142 (2021) - [c67]Nanyang Ye, Jingbiao Mei, Zhicheng Fang, Yuwen Zhang, Ziqing Zhang, Huaying Wu, Xiaoyao Liang:
BayesFT: Bayesian Optimization for Fault Tolerant Neural Network Architecture. DAC 2021: 487-492 - [c66]Tao Yang, Dongyue Li, Yibo Han, Yilong Zhao, Fangxin Liu, Xiaoyao Liang, Zhezhi He, Li Jiang:
PIMGCN: A ReRAM-Based PIM Design for Graph Convolutional Network Acceleration. DAC 2021: 583-588 - [c65]Yilong Zhao, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication. ACM Great Lakes Symposium on VLSI 2021: 15-20 - [c64]Chen Nie, Jie Lin, Huan Hu, Li Jiang, Xiaoyao Liang, Zhezhi He:
Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support. ACM Great Lakes Symposium on VLSI 2021: 347-352 - [c63]Fangxin Liu, Wenbo Zhao, Zhezhi He, Zongwu Wang, Yilong Zhao, Tao Yang, Jingnai Feng, Xiaoyao Liang, Li Jiang:
SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. ICCD 2021: 417-424 - [c62]Fangxin Liu, Wenbo Zhao, Zhezhi He, Yanzhi Wang, Zongwu Wang, Changzhi Dai, Xiaoyao Liang, Li Jiang:
Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point. ICCV 2021: 5261-5270 - [c61]Zhuoran Song, Dongyue Li, Zhezhi He, Xiaoyao Liang, Li Jiang:
ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator. ISCAS 2021: 1-5 - [c60]Feiyang Wu, Zhuoran Song, Jing Ke, Li Jiang, Naifeng Jing, Xiaoyao Liang:
PIPArch: Programmable Image Processing Architecture Using Sliding Array. ISPA/BDCloud/SocialCom/SustainCom 2021: 73-80 - [c59]Jing Ke, Yiqing Shen, Xiaoyao Liang, Dinggang Shen:
Contrastive Learning Based Stain Normalization Across Multiple Tumor in Histopathology. MICCAI (8) 2021: 571-580 - [c58]Jing Ke, Yiqing Shen, Xinyu Jiang, Yi Guo, Yaobing Chen, Xiaoyao Liang:
Multiple-datasets and multiple-label based color normalization in histopathology with cGAN. Medical Imaging: Digital Pathology 2021 - [i5]Fangxin Liu, Wenbo Zhao, Yilong Zhao, Zongwu Wang, Tao Yang, Zhezhi He, Naifeng Jing, Xiaoyao Liang, Li Jiang:
SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network. CoRR abs/2103.01705 (2021) - [i4]Yu Gong, Zhihan Xu, Zhezhi He, Weifeng Zhang, Xiaobing Tu, Xiaoyao Liang, Li Jiang:
N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores. CoRR abs/2112.08193 (2021) - 2020
- [c57]Jing Ke, Changchang Liu, Yizhou Lu, Naifeng Jing, Xiaoyao Liang, Fusong Jiang:
FIMIL : A high-throughput deep learning model for abnormality detection with weak annotation in microscopy images. ACSW 2020: 34:1-34:6 - [c56]Jing Ke, Yiqing Shen, Yi Guo, Jason D. Wright, Naifeng Jing, Xiaoyao Liang:
A High-Throughput Tumor Location System with Deep Learning for Colorectal Cancer Histopathology Image. AIME 2020: 260-269 - [c55]Jing Ke, Yiqing Shen, Jason D. Wright, Naifeng Jing, Xiaoyao Liang, Dinggang Shen:
Identifying patch-level MSI from histological images of Colorectal Cancer by a Knowledge Distillation Model. BIBM 2020: 1043-1046 - [c54]Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han, Li Jiang:
PIM-Prune: Fine-Grain DCNN Pruning for Crossbar-Based Process-In-Memory Architecture. DAC 2020: 1-6 - [c53]Zhuoran Song, Jianfei Wang, Tianjian Li, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing:
GPNPU: Enabling Efficient Hardware-Based Direct Convolution with Multi-Precision Support in GPU Tensor Cores. DAC 2020: 1-6 - [c52]Zhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang, Li Jiang:
ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access Memory. ACM Great Lakes Symposium on VLSI 2020: 291-296 - [c51]Zhaoming Jiang, Zhuoran Song, Xiaoyao Liang, Naifeng Jing:
PRArch: Pattern-Based Reconfigurable Architecture for Deep Neural Network Acceleration. HPCC/DSS/SmartCity 2020: 122-129 - [c50]Jing Ke, Yiqing Shen, Yi Guo, Jason D. Wright, Xiaoyao Liang:
A Prediction Model of Microsatellite Status from Histology Images. ICBET 2020: 334-338 - [c49]Jing Ke, Yiqing Shen, Yi Guo, Xiaoyao Liang:
Fast Tumor Detector in Whole-Slide Image With Dynamic Programing Based Monte Carlo Sampling. ICIP 2020: 2471-2475 - [c48]Zhuoran Song, Bangqi Fu, Feiyang Wu, Zhaoming Jiang, Li Jiang, Naifeng Jing, Xiaoyao Liang:
DRQ: Dynamic Region-based Quantization for Deep Neural Network Acceleration. ISCA 2020: 1010-1021 - [c47]Zhuoran Song, Feiyang Wu, Xueyuan Liu, Jing Ke, Naifeng Jing, Xiaoyao Liang:
VR-DANN: Real-Time Video Recognition via Decoder-Assisted Neural Network Acceleration. MICRO 2020: 698-710
2010 – 2019
- 2019
- [j14]Li Jiang, Zhuoran Song, Haiyue Song, Chengwen Xu, Qiang Xu, Naifeng Jing, Weifeng Zhang, Xiaoyao Liang:
Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method. ACM Trans. Design Autom. Electr. Syst. 24(6): 59:1-59:25 (2019) - [c46]Houxiang Ji, Li Jiang, Tianjian Li, Naifeng Jing, Jing Ke, Xiaoyao Liang:
HUBPA: high utilization bidirectional pipeline architecture for neuromorphic computing. ASP-DAC 2019: 249-254 - [c45]Jianfei Wang, Li Jiang, Jing Ke, Xiaoyao Liang, Naifeng Jing:
A sharing-aware L1.5D cache for data reuse in GPGPUs. ASP-DAC 2019: 388-393 - [c44]Xiaoyi Sun, Krishnendu Chakrabarty, Ruirui Huang, Yiquan Chen, Bing Zhao, Hai Cao, Yinhe Han, Xiaoyao Liang, Li Jiang:
System-level hardware failure prediction using deep learning. DAC 2019: 20 - [c43]Zhuoran Song, Ru Wang, Dongyu Ru, Zhenghao Peng, Hongru Huang, Hai Zhao, Xiaoyao Liang, Li Jiang:
Approximate Random Dropout for DNN training acceleration in GPGPU. DATE 2019: 108-113 - [c42]Jing Ke, Zhaoming Jiang, Changchang Liu, Tomasz Bednarz, Arcot Sowmya, Xiaoyao Liang:
Selective Detection and Segmentation of Cervical Cells. ICBBT 2019: 55-61 - 2018
- [j13]Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, Xiaoyao Liang:
CNFET-Based High Throughput SIMD Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1331-1344 (2018) - [j12]Jianfei Wang, Qin Wang, Li Jiang, Chao Li, Xiaoyao Liang, Naifeng Jing:
IBOM: An Integrated and Balanced On-Chip Memory for High Performance GPGPUs. IEEE Trans. Parallel Distributed Syst. 29(3): 586-599 (2018) - [c41]Pu Pang, Yixun Zhang, Tianjian Li, Sung Kyu Lim, Quan Chen, Xiaoyao Liang, Li Jiang:
In-growth test for monolithic 3D integrated SRAM. DATE 2018: 569-572 - [c40]Haiyue Song, Xiang Song, Tianjian Li, Hao Dong, Naifeng Jing, Xiaoyao Liang, Li Jiang:
A FPGA Friendly Approximate Computing Framework with Hybrid Neural Networks: (Abstract Only). FPGA 2018: 286 - [c39]Zhenghao Peng, Xuyang Chen, Chengwen Xu, Naifeng Jing, Xiaoyao Liang, Cewu Lu, Li Jiang:
AXNet: approximate computing using an end-to-end trainable neural network. ICCAD 2018: 11:1-11:8 - [c38]Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators. ICCAD 2018: 50 - [i3]Zhuoran Song, Dongyu Ru, Ru Wang, Hongru Huang, Zhenghao Peng, Jing Ke, Xiaoyao Liang, Li Jiang:
Approximate Random Dropout. CoRR abs/1805.08939 (2018) - [i2]Zhenghao Peng, Xuyang Chen, Chengwen Xu, Naifeng Jing, Xiaoyao Liang, Cewu Lu, Li Jiang:
AXNet: ApproXimate computing using an end-to-end trainable neural network. CoRR abs/1807.10458 (2018) - [i1]Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Invocation-driven Neural Approximate Computing with a Multiclass-Classifier and Multiple Approximators. CoRR abs/1810.08379 (2018) - 2017
- [j11]Jianfei Wang, Fengfeng Fan, Li Jiang, Xiaoyao Liang, Naifeng Jing:
Incorporating selective victim cache into GPGPU for high-performance computing. Concurr. Comput. Pract. Exp. 29(24) (2017) - [j10]Xiaodong Meng, Chentao Wu, Minyi Guo, Jie Li, Xiaoyao Liang, Bin Yao, Long Zheng:
A Hint Frequency Based Approach to Enhancing the I/O Performance of Multilevel Cache Storage Systems. J. Comput. Sci. Technol. 32(2): 312-328 (2017) - [j9]Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie Zhang, Li Jiang, Chao Li, Xiaoyao Liang:
Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 520-533 (2017) - [c37]Tianjian Li, Xiangyu Bi, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Sneak-Path Based Test and Diagnosis for 1R RRAM Crossbar Using Voltage Bias Technique. DAC 2017: 38:1-38:6 - [c36]Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, Li Jiang:
On Quality Trade-off Control for Approximate Computing Using Iterative Training. DAC 2017: 52:1-52:6 - [c35]Lerong Chen, Jiawen Li, Yiran Chen, Qiuping Deng, Jiyuan Shen, Xiaoyao Liang, Li Jiang:
Accelerator-friendly neural-network training: Learning variations and defects in RRAM crossbar. DATE 2017: 19-24 - [c34]Tianjian Li, Yan Han, Xiaoyao Liang, Hsien-Hsin S. Lee, Li Jiang:
Fault clustering technique for 3D memory BISR. DATE 2017: 560-565 - 2016
- [j8]Naifeng Jing, Li Jiang, Tao Zhang, Chao Li, Fengfeng Fan, Xiaoyao Liang:
Energy-Efficient eDRAM-Based On-Chip Storage Architecture for GPGPUs. IEEE Trans. Computers 65(1): 122-135 (2016) - [j7]Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang:
A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1192-1205 (2016) - [j6]Yu Wang, Weikang Qian, Shuchang Zhang, Xiaoyao Liang, Bo Yuan:
A Learning Algorithm for Bayesian Networks and Its Efficient Implementation on GPUs. IEEE Trans. Parallel Distributed Syst. 27(1): 17-30 (2016) - [c33]Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, Xiaoyao Liang:
CNFET-based high throughput register file architecture. ICCD 2016: 662-669 - [c32]Chao Li, Zhenhua Wang, Xiaofeng Hou, Haopeng Chen, Xiaoyao Liang, Minyi Guo:
Power Attack Defense: Securing Battery-Backed Data Centers. ISCA 2016: 493-505 - [c31]Fengfeng Fan, Jianfei Wang, Li Jiang, Xiaoyao Liang, Naifeng Jing:
Applying Victim Cache in High Performance GPGPU Computing. ISPDC 2016: 24-29 - [c30]Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty:
Defect tolerance for CNFET-based SRAMs. ITC 2016: 1-9 - [c29]Naifeng Jing, Jianfei Wang, Fengfeng Fan, Wenkang Yu, Li Jiang, Chao Li, Xiaoyao Liang:
Cache-emulated register file: An integrated on-chip memory architecture for high performance GPGPUs. MICRO 2016: 14:1-14:12 - 2015
- [j5]Tao Zhang, Naifeng Jing, Kaiming Jiang, Wei Shu, Min-You Wu, Xiaoyao Liang:
Buddy SM: Sharing Pipeline Front-End for Improved Energy Efficiency in GPGPUs. ACM Trans. Archit. Code Optim. 12(2): 16:1-16:23 (2015) - [j4]Tao Zhang, Jingjie Zhang, Wei Shu, Min-You Wu, Xiaoyao Liang:
Efficient graph computation on hybrid CPU and GPU systems. J. Supercomput. 71(4): 1563-1586 (2015) - [c28]Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang:
Jump test for metallic CNTs in CNFET-based SRAM. DAC 2015: 16:1-16:6 - [c27]Li Jiang, Xiangwei Huang, Hongfeng Xie, Qiang Xu, Chao Li, Xiaoyao Liang, Huiyun Li:
A novel TSV probing technique with adhesive test interposer. ICCD 2015: 597-604 - [c26]Weichao Tang, Yu Wang, Haopeng Liu, Tao Zhang, Chao Li, Xiaoyao Liang:
Exploring Hardware Profile-Guided Green Datacenter Scheduling. ICPP 2015: 11-20 - [c25]Yiqing Hua, Chao Li, Weichao Tang, Li Jiang, Xiaoyao Liang:
Building Fuel Powered Supercomputing Data Center at Low Cost. ICS 2015: 241-250 - [c24]Chao Li, Yang Hu, Longjun Liu, Juncheng Gu, Mingcong Song, Xiaoyao Liang, Jingling Yuan, Tao Li:
Towards sustainable in-situ server systems in the big data era. ISCA 2015: 14-26 - [c23]Naifeng Jing, Shuang Chen, Shunning Jiang, Li Jiang, Chao Li, Xiaoyao Liang:
Bank stealing for conflict mitigation in GPGPU Register File. ISLPED 2015: 55-60 - [c22]Xiangyu Wu, Yuanfang Xia, Naifeng Jing, Xiaoyao Liang:
CGSharing: Efficient content sharing in GPU-based cloud gaming. ISLPED 2015: 171-176 - [c21]Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu:
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. ITC 2015: 1-10 - [c20]Tianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, Li Jiang:
On microarchitectural modeling for CNFET-based circuits. SoCC 2015: 356-361 - [c19]Chen Wang, Li Jiang, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, Weikang Qian:
Timing-driven placement for carbon nanotube circuits. SoCC 2015: 362-367 - 2014
- [c18]Tao Zhang, Xiaoyao Liang:
Dynamic front-end sharing in graphics processing units. ICCD 2014: 286-291 - [c17]Xiaodong Meng, Chentao Wu, Jie Li, Xiaoyao Liang, Bin Yao, Minyi Guo, Long Zheng:
HFA: A Hint Frequency-based approach to enhance the I/O performance of multi-level cache storage systems. ICPADS 2014: 376-383 - 2013
- [c16]Naifeng Jing, Yao Shen, Yao Lu, Shrikanth Ganapathy, Zhigang Mao, Minyi Guo, Ramon Canal, Xiaoyao Liang:
An energy-efficient and scalable eDRAM-based register file architecture for GPGPU. ISCA 2013: 344-355 - [c15]Naifeng Jing, Haopeng Liu, Yao Lu, Xiaoyao Liang:
Compiler assisted dynamic register file in GPGPU. ISLPED 2013: 3-8 - 2012
- [c14]Guihai Yan, Yingmin Li, Yinhe Han, Xiaowei Li, Minyi Guo, Xiaoyao Liang:
AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture. HPCA 2012: 287-298 - 2011
- [j3]Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li:
MicroFix: Using timing interpolation and delay sensors for power reduction. ACM Trans. Design Autom. Electr. Syst. 16(2): 16:1-16:21 (2011) - 2010
- [c13]Guihai Yan, Xiaoyao Liang, Yinhe Han, Xiaowei Li:
Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. ISCA 2010: 485-496
2000 – 2009
- 2009
- [j2]Xiaoyao Liang, Gu-Yeon Wei, David M. Brooks:
Revival: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. IEEE Micro 29(1): 127-138 (2009) - [c12]Xiaoyao Liang, Benjamin C. Lee, Gu-Yeon Wei, David M. Brooks:
Design and test strategies for microarchitectural post-fabrication tuning. ICCD 2009: 84-90 - [c11]Kristen Lovin, Benjamin C. Lee, Xiaoyao Liang, David M. Brooks, Gu-Yeon Wei:
Empirical performance models for 3T1D memories. ICCD 2009: 398-403 - [c10]Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li:
MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency. ISLPED 2009: 395-400 - 2008
- [j1]Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks:
Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. IEEE Micro 28(1): 60-68 (2008) - [c9]Xiaoyao Liang, Gu-Yeon Wei, David M. Brooks:
ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. ISCA 2008: 191-202 - [c8]Gu-Yeon Wei, David M. Brooks, Ali Durlov Khan, Xiaoyao Liang:
Instruction-driven clock scheduling with glitch mitigation. ISLPED 2008: 357-362 - [c7]Xiaoyao Liang, David M. Brooks, Gu-Yeon Wei:
A Process-Variation-Tolerant Floating-Point Unit with Voltage Interpolation and Variable Latency. ISSCC 2008: 404-405 - 2007
- [c6]Xiaoyao Liang, Kerem Turgay, David M. Brooks:
Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques. ICCAD 2007: 824-830 - [c5]Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks:
Process Variation Tolerant 3T1D-Based Cache Architectures. MICRO 2007: 15-26 - 2006
- [c4]Xiaoyao Liang, David M. Brooks:
Microarchitecture parameter selection to optimize system performance under process variation. ICCAD 2006: 429-436 - [c3]Xiaoyao Liang, David M. Brooks:
Mitigating the Impact of Process Variations on Processor Register Files and Execution Units. MICRO 2006: 504-514 - 2005
- [c2]Xiaoyao Liang, Akshay Athalye, Sangjin Hong:
Equalizing data-path for processing speed determination in block level pipelining. ISCAS (2) 2005: 1646-1649 - [c1]Xiaoyao Liang, Akshay Athalye, Sangjin Hong:
Dynamic coarse grain dataflow reconfiguration technique for real-time systems design. ISCAS (4) 2005: 3511-3514
Coauthor Index
[j24] [j23] [c85] [c83] [j21] [j20] [c79] [c77] [c72] [c71] [i9] [i8] [i6] [j15] [c66] [c65] [c64] [c63] [c62] [c61] [c60] [i5] [i4] [c54] [c53] [c52] [c48] [j14] [c46] [c45] [c44] [c43] [j13] [j12] [c41] [c40] [c39] [c38] [i3] [i2] [i1] [j11] [j9] [c37] [c36] [c35] [c34] [j8] [j7] [c33] [c31] [c30] [c29] [c28] [c27] [c25] [c23] [c21] [c20] [c19]
[c88] [c85] [c83] [j20] [j18] [j17] [c81] [c80] [c79] [c77] [c73] [c72] [c70] [c69] [c68] [i9] [i8] [i6] [j15] [c65] [c60] [i5] [c57] [c56] [c55] [c53] [c51] [c48] [c47] [j14] [c46] [c45] [j13] [j12] [c40] [c39] [c38] [i2] [i1] [j11] [j9] [c37] [c36] [j8] [j7] [c33] [c31] [c29] [j5] [c28] [c23] [c22] [c21] [c19] [c16] [c15]
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