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ORCIDSuhwan Kim 0001
Person information
- affiliation: Seoul National University, Department of Electrical and Computer Engineering, ISRC, Gwanak-gu, Korea
- affiliation (2001-2004): IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
- affiliation (PhD 2001): University of Michigan, Department of Electrical Engineering and Computer Science, Ann Arbor, MI, USA
- affiliation (1993-1999): LG Electronics, Korea
Other persons with the same name
- Suhwan Kim (aka: Su Hwan Kim) — disambiguation page
- Suhwan Kim 0002
![[0000-0002-0875-1218]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-0875-1218")
— Intel Corporation, Intel Labs, Hillsboro, OR, USA (and 2 more) - Suhwan Kim 0003 — Korea Advanced Institute of Science and Technology, KAIST, Daejeon, Korea
- Suhwan Kim 0004 — Konkuk University, Department of Computer Science and Engineering, Seoul, Korea
- Suhwan Kim 0005 (aka: Su-Hwan Kim 0005) — Incheon National University, Department of Electrical Engineering, Korea
- Suhwan Kim 0006 — Georgia Institute of Technology, School of Electrical and Computer Engineering, Atlanta, GA, USA
- Suhwan Kim 0007 (aka: Su Hwan Kim 0007) — Klinikum Rechts der Isar, Department of Diagnostic and Interventional Neuroradiology, Munich, Germany (and 1 more)
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2020 – today
- 2025
[j62]Junho Kang, Woosol Han, Suhwan Kim, Jaehoon Jun:
Comprehensive Analysis of Design and Performance Evaluation Methodologies for a High-Resolution Read-Out IC With Ultralow 1/ f Corner for DC Measurement Applications. IEEE Trans. Instrum. Meas. 74: 1-14 (2025)- 2024
- [j61]Jaekwang Yun, Sangyoon Lee, Jaewook Kim, Joo-Hyung Chae, Suhwan Kim, Yong-Un Jeong:
A Single-Ended Impedance-Matched Transmitter With Single Ring-Oscillator-Based Time-Domain ZQ Calibration for Memory Interfaces. IEEE J. Solid State Circuits 59(9): 2971-2982 (2024) - [j60]Shin-Hyun Jeong, Yong-Un Jeong, Suhwan Kim:
An N/PBTI-Isolated BTI Monitor With a Configurable Switching Network and Calibration for Process Variation in Memory Periphery. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4628-4632 (2024) - [c61]Sanghyuk Seo, Yong-Un Jeong, Jaekwang Yun, Jaewook Kim, Suhwan Kim:
A 0.77-pJ/bit 40-Gb/s/pin Single-Ended Hybrid DAC-Based Transmitter for Memory Interfaces. ISCAS 2024: 1-5 - [c60]Goeun Kim, Younghwan Chang, Yong-Un Jeong, Suhwan Kim:
A 8Gb/s PAM-4/NRZ Dual-Mode Transmitter for Panel Interfaces with Run-length Limited Maximum Transition. SOCC 2024: 1-5 - 2023
- [j59]Jaewook Kim, Jaekwang Yun, Joo-Hyung Chae, Suhwan Kim:
A 50-1600 MHz Wide-Range Digital Duty-Cycle Corrector With Counter-Based Half-Cycle Delay Line. IEEE Access 11: 30555-30561 (2023) - [j58]Yong-Un Jeong, Joo-Hyung Chae, Suhwan Kim:
A 0.85-pJ/b 16-Gb/s/Pin Single-Ended Transmitter With Integrated Voltage Modulation for Low-Power Memory Interfaces. IEEE J. Solid State Circuits 58(9): 2659-2667 (2023) - [j57]Yong-Un Jeong, Sungphil Choi, Suhwan Kim, Joo-Hyung Chae:
Single-Ended Receiver-Side Crosstalk Cancellation With Independent Gain and Timing Control for Minimum Residual FEXT. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4793-4803 (2023) - [c59]Junho Kang, Soungchul Park, Suhwan Kim, Jooyeol Rhee:
A 56-to-110 dB Gain Programmable Gain Amplifier with Second-Order Band Pass Filter for Ultrasonic Sensor Systems. ICEIC 2023: 1-5 - [c58]Soungchul Park, Wooyoung Kim, Suhwan Kim, Jooyeol Rhee:
A 133.3 dB Dynamic Range Pulse Oximeter Front-End with Low-Noise Area-Efficient Offset Cancellation Current DAC. ICEIC 2023: 1-5 - 2022
- [j56]Byunggyu Lee, Jinho Yang, Jun Soo Cho, Suhwan Kim:
A Low-Power Digital Capacitive MEMS Microphone Based on a Triple-Sampling Delta-Sigma ADC With Embedded Gain. IEEE Access 10: 75323-75330 (2022) - [j55]Hyunkyu Park, Yong-Un Jeong, Suhwan Kim:
A 24-Gb/s/pin Single-Ended PAM-4 Receiver With 1-Tap Decision Feedback Equalizer Using Inverter-Based Summer for Memory Interfaces. IEEE Access 10: 91888-91896 (2022) - [j54]Yong-Un Jeong, Sungphil Choi, Joo-Hyung Chae, Jaekwang Yun, Shin-Hyun Jeong, Suhwan Kim:
A 10 Gb/s/pin Single-Ended Transmitter With Reflection-Aided Duobinary Modulation for Dual-Rank Mobile Memory Interfaces. IEEE Trans. Circuits Syst. I Regul. Pap. 69(3): 1125-1134 (2022) - [j53]Sangyoon Lee, Yong-Un Jeong, Jaekwang Yun, Joo-Hyung Chae, Suhwan Kim:
A Low-Power DRAM Transmitter With Phase and Current-Mode Amplitude Equalization to Improve Impedance Matching. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4208-4212 (2022) - [c57]Heon Hwa Cheong, Suhwan Kim:
A 19-bit Range and 4.5-ps Resolution Fully-Synthesizable Time-to-Digital Converter with Quad-Edge Offset Cancellation. ISCAS 2022: 3378-3382 - [c56]Sangyoon Lee, Jaekwang Yun, Suhwan Kim:
A 78.8fJ/b/mm 12.0Gb/s/Wire Capacitively Driven On-Chip Link Over 5.6mm with an FFE-Combined Ground-Forcing Biasing Technique for DRAM Global Bus Line in 65nm CMOS. ISSCC 2022: 454-456 - 2021
- [j52]Sungphil Choi, Yong-Un Jeong, Joo-Hyung Chae, Shin-Hyun Jeong, Suhwan Kim:
A Differentiating Receiver With a Transition-Detecting DFE for Dual-Rank Mobile Memory Interface. IEEE Access 9: 120285-120296 (2021) - [j51]Heon Hwa Cheong, Suhwan Kim:
A Fast-Locking All-Digital PLL With Triple-Stage Phase-Shifting. IEEE Access 9: 160224-160237 (2021) - [j50]Yong-Un Jeong, Hyunkyu Park, Changho Hyun, Joo-Hyung Chae, Shin-Hyun Jeong, Suhwan Kim:
A 0.64-pJ/Bit 28-Gb/s/Pin High-Linearity Single-Ended PAM-4 Transmitter With an Impedance-Matched Driver and Three-Point ZQ Calibration for Memory Interface. IEEE J. Solid State Circuits 56(4): 1278-1287 (2021) - [j49]Hyeongjun Ko, Mino Kim, Hyunkyu Park, Sangyoon Lee, Jaewook Kim, Suhwan Kim, Joo-Hyung Chae:
A Controller PHY for Managed DRAM Solution With Damping-Resistor-Aided Pulse-Based Feed-Forward Equalizer. IEEE J. Solid State Circuits 56(8): 2563-2573 (2021) - [c55]Heon Hwa Cheong, Suhwan Kim:
A Power-Efficient and Fast-Locking Digital Quadrature Clock Generator with Ping-Pong Phase Detection. ISCAS 2021: 1-4 - [c54]Hyunkyu Park, Jihwan Park, Jae-Whan Lee, Yong-Un Jeong, Shin-Hyun Jeong, Suhwan Kim, Joo-Hyung Chae:
A High-Accuracy and Fast-Correction Quadrature Signal Corrector Using an Adaptive Delay Gain Controller for Memory Interfaces. ISCAS 2021: 1-5 - [c53]Sangmin Shin, Minsung Kim, Junyoung Park, Hyunjoong Lee, Suhwan Kim:
Energy-Efficient Read-Out IC for High-Precision DC Measurement System with Instrumentation Amplifier Power Reduction Technique. ISCAS 2021: 1-5 - 2020
- [j48]Cyuyeol Rhee, Junyoung Park, Suhwan Kim:
A 0.3 lx-1.4 Mlx Monolithic Silicon Nanowire Light-to-Digital Converter With Temperature-Independent Offset Cancellation. IEEE J. Solid State Circuits 55(2): 378-391 (2020) - [j47]Joo-Hyung Chae, Minchang Kim, Sungphil Choi, Suhwan Kim:
A 10.4-Gb/s 1-Tap Decision Feedback Equalizer With Different Pull-Up and Pull-Down Tap Weights for Asymmetric Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 220-224 (2020) - [j46]Susie Kim, Cyuyeol Rhee, Suhwan Kim:
A Wide Dynamic Range Multi-Mode Band-Pass Continuous-Time Delta-Sigma Modulator Employing Single-Opamp Resonator With Positive Resistor-Feedback. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 235-239 (2020) - [j45]Youngtae Yang, Byunggyu Lee, Jun Soo Cho, Suhwan Kim, Hyunjoong Lee:
A Digital Capacitive MEMS Microphone for Speech Recognition With Fast Wake-Up Feature Using a Sound Activity Detector. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1509-1513 (2020) - [j44]Yong-Un Jeong, Jihwan Park, Mino Kim, Joo-Hyung Chae, Jaekwang Yun, Hyunjoong Lee, Suhwan Kim:
A 9Gb/s Wide Output Range Transmitter With 2D Binary-Segmented Driver and Dual-Loop Calibration for Intra-Panel Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1589-1593 (2020) - [j43]Joo-Hyung Chae, Yong-Un Jeong, Suhwan Kim:
Data-Dependent Selection of Amplitude and Phase Equalization in a Quarter-Rate Transmitter for Memory Interfaces. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 2972-2983 (2020) - [j42]Sangyoon Lee, Han-Gon Ko, Joo-Hyung Chae, Soyeong Shin, Jaekwang Yun, Deog-Kyoon Jeong, Suhwan Kim:
A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45° Strobe Phase for Energy-Efficient Skew Compensation. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1735-1739 (2020) - [j41]Soyeong Shin, Han-Gon Ko, Chan-Ho Kye, Sang-Yoon Lee, Jaekwang Yun, Doobock Lee, Hae-Kang Jung, Suhwan Kim, Deog-Kyoon Jeong:
A 0.45 pJ/b, 6.4 Gb/s Forwarded-Clock Receiver With DLL-Based Self-Tracking Loop for Unmatched Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1814-1818 (2020) - [c52]Jaekwang Yun, Sangyoon Lee, Yong-Un Jeong, Shin-Hyun Jeong, Suhwan Kim:
A 0.4-1.7GHz Wide Range Fractional-N PLL Using a Transition-Detection DAC for Jitter Reduction. A-SSCC 2020: 1-4 - [c51]Yongjoon Ahn, Suhwan Kim, Hyunjoong Lee:
A Sub-1 ppm/°C CMOS Bandgap Voltage Reference With Process Tolerant Piecewise Second-Order Curvature Compensation. SoCC 2020: 231-235 - [c50]Yong-Un Jeong, Hyunkyu Park, Changho Hyun, Suhwan Kim:
A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ Calibration for Memory Interfaces. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j40]Jaehoon Jun, Soungchul Park, Junho Kang, Suhwan Kim:
A 22-bit Read-Out IC With 7-ppm INL and Sub-100-µHz 1/ f Corner for DC Measurement Systems. IEEE J. Solid State Circuits 54(11): 3086-3096 (2019) - [j39]Joo-Hyung Chae, Hyeongjun Ko, Jihwan Park, Suhwan Kim:
A 12.8-Gb/s Quarter-Rate Transmitter Using a 4: 1 Overlapped Multiplexing Driver Combined With an Adaptive Clock Phase Aligner. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 372-376 (2019) - [j38]Taehoon Kim, Sangmin Shin, Suhwan Kim:
An 80.2 dB DR 23.25 mW/Channel 8-Channel Ultrasound Receiver With a Beamforming Embedded SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 66-II(9): 1487-1491 (2019) - [j37]Joo-Hyung Chae, Hyeongjun Ko, Jihwan Park, Suhwan Kim:
A Quadrature Clock Corrector for DRAM Interfaces, With a Duty-Cycle and Quadrature Phase Detector Based on a Relaxation Oscillator. IEEE Trans. Very Large Scale Integr. Syst. 27(4): 978-982 (2019) - [c49]Changho Hyun, Hyeongjun Ko, Joo-Hyung Chae, Hyunkyu Park, Suhwan Kim:
A 20Gb/s Dual-Mode PAM4/NRZ Single-Ended Transmitter with RLM Compensation. ISCAS 2019: 1-4 - [c48]Jaehoon Jun, Junho Kang, Suhwan Kim:
A 16 Bit Incremental ADC with Swapping DAC for Low Power Sensor Applications. ISCAS 2019: 1-4 - [c47]Yong-Un Jeong, Joo-Hyung Chae, Sungphil Choi, Jaekwang Yun, Shin-Hyun Jeong, Suhwan Kim:
A Low-Power and Low-Noise 20: 1 Serializer with Two Calibration Loops in 55-nm CMOS. ISLPED 2019: 1-6 - [c46]Youngtae Yang, Jun Soo Cho, Byunggyu Lee, Suhwan Kim:
A Sound Activity Detector Embedded Low-Power MEMS Microphone Readout Interface for Speech Recognition. ISLPED 2019: 1-6 - [c45]Han-Gon Ko, Soyeong Shin, Chan-Ho Kye, Sang-Yoon Lee, Jaekwang Yun, Hae-Kang Jung, Doobock Lee, Suhwan Kim, Deog-Kyoon Jeong:
A 370-fJ/b, 0.0056 mm2/DQ, 4.8-Gb/s DQ Receiver for HBM3 with a Baud-Rate Self-Tracking Loop. VLSI Circuits 2019: 94- - 2018
- [j36]Joo-Hyung Chae, Mino Kim, Gi-Moon Hong, Jihwan Park, Suhwan Kim:
A 3.2 Gb/s 16-Channel Transmitter for Intra-Panel Interfaces, With Independently Controllable Output Swing, Common-Mode Voltage, and Equalization. IEEE Access 6: 78055-78064 (2018) - [j35]Jihwan Park, Joo-Hyung Chae, Yong-Un Jeong, Jae-Whan Lee, Suhwan Kim:
A 2.1-Gb/s 12-Channel Transmitter With Phase Emphasis Embedded Serializer for 55-in UHD Intra-Panel Interface. IEEE J. Solid State Circuits 53(10): 2878-2888 (2018) - [j34]Jun Soo Cho, Cyuyeol Rhee, Susie Kim, Youngtae Yang, Jaehoon Jun, Suhwan Kim, Hyunjoong Lee:
A 1.2-V 108.9-dB A-Weighted DR 101.4-dB SNDR Audio ΣΔ ADC Using a Multi-Rate Noise-Shaping Quantizer. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1315-1319 (2018) - [j33]Mino Kim, Joo-Hyung Chae, Sungphil Choi, Gi-Moon Hong, Hyeongjun Ko, Deog-Kyoon Jeong, Suhwan Kim:
A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous Feedback CTLE and An Adaptive 3-Step Eye Detection Algorithm for Memory Controller. IEEE Trans. Circuits Syst. II Express Briefs 65-II(12): 1894-1898 (2018) - [j32]Yujin Park, Junghee Yun, Dongchul Park, Sangwoo Kim, Suhwan Kim:
An Uncooled Microbolometer Infrared Imager With a Shutter-Based Successive-Approximation Calibration Loop. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 122-132 (2018) - [j31]Susie Kim, Seung-In Na, Youngtae Yang, Suhwan Kim:
A 2-MHz BW 82-dB DR Continuous-Time Delta-Sigma Modulator With a Capacitor-Based Voltage DAC for ELD Compensation. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 1999-2006 (2018) - [c44]Jae-Whan Lee, Joo-Hyung Chae, Jihwan Park, Hyunkyu Park, Jaekwang Yun, Suhwan Kim:
Energy-Efficient Dynamic Comparator with Active Inductor for Receiver of Memory Interfaces. ISLPED 2018: 10:1-10:6 - [c43]Jaehoon Jun, Cyuyeol Rhee, Minsung Kim, Junho Kang, Suhwan Kim:
A 21.8b sub-100μHz 1/f corner 2.4μV-offset programmable-gain read-out IC for bridge measurement systems. ISSCC 2018: 330-332 - 2017
- [c42]Taehoon Kim, Suhwan Kim:
A 12.1mW, 60dB SNR, 8-channel beamforming embedded SAR ADC for ultrasound imaging systems. A-SSCC 2017: 141-144 - [c41]Jihwan Park, Joo-Hyung Chae, Yong-Un Jeong, Jae-Whan Lee, Suhwan Kim:
A 2.1Gbps 12-channel transmitter with phase emphasis embedded serializer for UHD intra-panel interface. A-SSCC 2017: 257-260 - [c40]Han Yang, Jun Soo Cho, Youngtae Yang, Suhwan Kim:
A load variation tolerant readout interface for high linear MEMS capacitive microphones. ISCAS 2017: 1-4 - [c39]Sungwon Yim, Yujin Park, Han Yang, Suhwan Kim:
Power efficient SAR ADC adaptive to input activity for ECG monitoring applications. ISCAS 2017: 1-4 - [c38]Jihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae, Suhwan Kim:
A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communication. ISLPED 2017: 1-6 - [c37]Minchang Kim, Jihwan Park, Joo-Hyung Chae, Hyeongjun Ko, Mino Kim, Suhwan Kim:
An 8Gb/s adaptive DFE with level calibration using training data pattern for mobile DRAM interface. ISOCC 2017: 286-287 - [c36]Youngtae Yang, Jaehoon Jun, Suhwan Kim:
A low-pass continuous-time delta-sigma interface circuit for wideband MEMS gyroscope readout ASIC. SoCC 2017: 35-39 - [c35]Hyunjong Kim, Yujin Park, Han Yang, Suhwan Kim:
A constant bandwidth switched-capacitor programmable-gain amplifier utilizing adaptive miller compensation technique. SoCC 2017: 249-252 - 2016
- [j30]Yujin Park, Han Yang, Jeahyun Ahn, Suhwan Kim:
Column readout circuit with dual integration CDS for infrared imagers. IEICE Electron. Express 13(7): 20151037 (2016) - [j29]Hyunjoong Lee, Daeyong Shim, Cyuyeol Rhee, Mino Kim, Suhwan Kim:
A Sub-1.0-V On-Chip CMOS Thermometer With a Folded Temperature Sensor for Low-Power Mobile DRAM. IEEE Trans. Circuits Syst. II Express Briefs 63-II(6): 553-557 (2016) - [c34]Jae-Whan Lee, Mino Kim, Jihwan Park, Gi-Moon Hong, Suhwan Kim:
Phase shift keying demodulator with decision feedback phase-locked loop. ISCAS 2016: 1550-1553 - [c33]Jaehoon Jun, Cyuyeol Rhee, Suhwan Kim:
A 386-μW, 15.2-bit Programmable-Gain Embedded Delta-Sigma ADC for Sensor Applications. ISLPED 2016: 278-283 - [c32]Dongwoo Ha, Yujin Park, Suhwan Kim:
A current-mirror technique used for high-order curvature compensated bandgap reference in automotive application. MWSCAS 2016: 1-4 - [c31]Taehoon Kim, Han Yang, Sangmin Shin, Hyongmin Lee, Suhwan Kim:
A CMOS analog front-end for driving a high-speed SAR ADC in low-power ultrasound imaging systems. SoCC 2016: 163-168 - 2015
- [j28]Hyongmin Lee, Jisung Kim, Dongwoo Ha, Taehoon Kim, Suhwan Kim:
Differentiating ASK Demodulator for Contactless Smart Cards Supporting VHBR. IEEE Trans. Circuits Syst. II Express Briefs 62-II(7): 641-645 (2015) - [c30]Joo-Hyung Chae, Gi-Moon Hong, Jihwan Park, Mino Kim, Hyeongjun Ko, Woo-Yeol Shin, Hankyu Chi, Deog-Kyoon Jeong, Suhwan Kim:
A 1.74mW/GHz 0.11-2.5GHz fast-locking, jitter-reducing, 180° phase-shift digital DLL with a window phase detector for LPDDR4 memory controllers. A-SSCC 2015: 1-4 - [c29]Taehoon Kim, Sunkwon Kim, Jong-Kwan Woo, Hyongmin Lee, Suhwan Kim:
A 9-bit, 110-MS/s pipelined-SAR ADC using time-interleaved technique with shared comparator. SoCC 2015: 170-174 - [c28]Yujin Park, Han Yang, Hyunjong Kim, Jun Soo Cho, Suhwan Kim:
Low noise output stage for oversampling audio DAC. SoCC 2015: 227-230 - 2014
- [j27]Jong-Kwan Woo, Hyunjoong Lee, Hwi-Cheol Kim, Deog-Kyoon Jeong, Suhwan Kim:
1.2 V 10-bit 75 MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS. IEEE Trans. Very Large Scale Integr. Syst. 22(3): 585-592 (2014) - 2013
- [j26]Daeyong Shim, Hyunsik Jeong, Hyunjoong Lee, Cyuyeol Rhee, Deog-Kyoon Jeong, Suhwan Kim:
A Process-Variation-Tolerant On-Chip CMOS Thermometer for Auto Temperature Compensated Self-Refresh of Low-Power Mobile DRAM. IEEE J. Solid State Circuits 48(10): 2550-2557 (2013) - [j25]Sunkwon Kim, Jong-Kwan Woo, Woo-Yeol Shin, Gi-Moon Hong, Hyongmin Lee, Hyunjoong Lee, Suhwan Kim:
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System. IEEE Trans. Circuits Syst. II Express Briefs 60-II(1): 6-10 (2013) - [j24]Rahul Singh, Gi-Moon Hong, Suhwan Kim:
Bitline Techniques With Dual Dynamic Nodes for Low-Power Register Files. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(4): 965-974 (2013) - [c27]Seung-In Na, Susie Kim, Taehoon Kim, Hyongmin Lee, Hyunjoong Lee, Suhwan Kim:
A 32-channel neural recording system with a liquid-crystal polymer MEA. BioCAS 2013: 13-16 - [c26]Mino Kim, Woo-Yeol Shin, Gi-Moon Hong, Jihwan Park, Joo-Hyung Chae, Nan Xing, Jong-Kwan Woo, Suhwan Kim:
High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay line. ESSCIRC 2013: 311-314 - 2012
- [j23]Rahul Singh, Gi-Moon Hong, Mino Kim, Jihwan Park, Woo-Yeol Shin, Suhwan Kim:
Static-switching pulse domino: A switching-aware design technique for wide fan-in dynamic multiplexers. Integr. 45(3): 253-262 (2012) - [j22]Hyunjoong Lee, Sanghoon Lee, Dai-Hong Kim, David Perello, Young June Park, Seong-Hyeon Hong, Minhee Yun, Suhwan Kim:
Integrating Metal-Oxide-Decorated CNT Networks with a CMOS Readout in a Gas Sensor. Sensors 12(3): 2582-2597 (2012) - [j21]Rahul Singh, Jong-Kwan Woo, Hyunjoong Lee, SoYoung Kim, Suhwan Kim:
Power-Gating Noise Minimization by Three-Step Wake-Up Partitioning. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(4): 749-762 (2012) - [c25]Susie Kim, Seung-In Na, Tae-Hoon Kim, Hyunjoong Lee, Sunkwon Kim, Cyuyeol Rhee, Suhwan Kim:
Neural recording system with low-noise analog front-end and comparator-based cyclic ADC. SoCC 2012: 110-114 - 2011
- [j20]Heesoo Song, Deok-Soo Kim, Do-Hwan Oh, Suhwan Kim, Deog-Kyoon Jeong:
A 1.0-4.0-Gb/s All-Digital CDR With 1.0-ps Period Resolution DCO and Adaptive Proportional Gain Control. IEEE J. Solid State Circuits 46(2): 424-434 (2011) - [j19]Dong-Yong Shin, Hyunjoong Lee, Suhwan Kim:
A Delta-Sigma Interface Circuit for Capacitive Sensors With an Automatically Calibrated Zero Point. IEEE Trans. Circuits Syst. II Express Briefs 58-II(2): 90-94 (2011) - [j18]Manho Kim, Hyunjoong Lee, Jong-Kwan Woo, Nan Xing, Min-Oh Kim, Suhwan Kim:
A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching. IEEE Trans. Circuits Syst. II Express Briefs 58-II(3): 169-173 (2011) - [j17]Dong-Yong Shin, Hyunjoong Lee, Suhwan Kim:
Improving the Accuracy of Capacitance-to-Frequency Converter by Accumulating Residual Charges. IEEE Trans. Instrum. Meas. 60(12): 3950-3955 (2011) - [c24]Rahul Singh, Jae-Cheol Son, Ukrae Cho, Gunok Jung, Min-Su Kim, Hyoungwook Lee, Suhwan Kim:
A static-switching pulse domino technique for statistical power reduction of wide fan-in dynamic gates. ACM Great Lakes Symposium on VLSI 2011: 127-132 - [c23]Jong-Kwan Woo, Tae-Hoon Kim, Hyongmin Lee, Sunkwon Kim, Hyunjoong Lee, Suhwan Kim:
A comparator-based cyclic analog-to-digital converter with boosted preset voltage. ISLPED 2011: 199-204 - [c22]Sunkwon Kim, Jong-Kwan Woo, Woo-Yeol Shin, Gi-Moon Hong, Hyongmin Lee, Hyunjoong Lee, Suhwan Kim:
A low-power referenceless clock and data recovery circuit with clock-edge modulation for biomedical sensor applications. ISLPED 2011: 347-350 - [c21]Hyunjoong Lee, Hyongmin Lee, Jong-Kwan Woo, Sunkwon Kim, Young June Park, Suhwan Kim:
A CMOs readout integrated circuit with wide dynamic range for a CNT bio-sensor array system. ISLPED 2011: 357-360 - [c20]Woo-Yeol Shin, Gi-Moon Hong, Hyongmin Lee, Jaeduk Han, Sunkwon Kim, Kyu-Sang Park, Dong-Hyuk Lim, Jung-Hoon Chun, Deog-Kyoon Jeong, Suhwan Kim:
A 4.8Gb/s impedance-matched bidirectional multi-drop transceiver for high-capacity memory interface. ISSCC 2011: 494-496 - 2010
- [j16]Deok-Soo Kim, Heesoo Song, Taeho Kim, Suhwan Kim, Deog-Kyoon Jeong:
A 0.3-1.4 GHz All-Digital Fractional-N PLL With Adaptive Loop Gain Controller. IEEE J. Solid State Circuits 45(11): 2300-2311 (2010) - [j15]Hyunjoong Lee, Jong-Kwan Woo, Hyo-Jin Nam, Won-Hyeog Jin, Moongi Jeong, Young-Sik Kim, Jin-Koog Shin, Suhwan Kim:
Charge Amplifier With an Enhanced Frequency Response for SPM-Based Data Storage. IEEE Trans. Circuits Syst. II Express Briefs 57-II(9): 691-695 (2010) - [j14]Nan Xing, Jong-Kwan Woo, Woo-Yeol Shin, Hyunjoong Lee, Suhwan Kim:
A 14.6 ps Resolution, 50 ns Input-Range Cyclic Time-to-Digital Converter Using Fractional Difference Conversion Method. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(12): 3064-3072 (2010) - [c19]Rahul Singh, AhReum Kim, SoYoung Kim, Suhwan Kim:
A three-step power-gating turn-on technique for controlling ground bounce noise. ISLPED 2010: 171-176 - [c18]Jong-Kwan Woo, Hyunjoong Lee, SungHo Ahn, Suhwan Kim:
A high-resolution and fast-conversion readout circuit for differential capacitive sensors. SoCC 2010: 44-47 - [c17]Rahul Singh, AhReum Kim, Suhwan Kim:
Footer voltage feedforward domino technique for wide fan-in dynamic logic. SoCC 2010: 224-229
2000 – 2009
- 2009
- [j13]Young-Deok Kim, Hyun-Seok Ahn, Suhwan Kim, Deog-Kyoon Jeong:
A High-Speed Range-Matching TCAM for Storage-Efficient Packet Classification. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(6): 1221-1230 (2009) - [j12]Jong-Kwan Woo, Dong-Yong Shin, Deog-Kyoon Jeong, Suhwan Kim:
High-speed 10-bit LCD column driver with a split DAC and a class-AB output buffer. IEEE Trans. Consumer Electron. 55(3): 1431-1438 (2009) - [c16]Nan Xing, Heesoo Song, Deog-Kyoon Jeong, Suhwan Kim:
A PVT-insensitive time-to-digital converter using fractional difference Vernier delay lines. SoCC 2009: 43-46 - [c15]Manho Kim, Nan Xing, Dong-Yong Shin, Hyunjoong Lee, Suhwan Kim:
A high resolution capacitance deviation-to-digital converter utilizing time stretching. SoCC 2009: 83-86 - 2007
- [j11]Hoesam Jeong, Byoung-Joo Yoo, Cheol Kyu Han, Sang-Yoon Lee, Kang-Yoon Lee, Suhwan Kim, Deog-Kyoon Jeong, Wonchan Kim:
A 0.25-µm CMOS 1.9-GHz PHS RF Transceiver With a 150-kHz Low-IF Architecture. IEEE J. Solid State Circuits 42(6): 1318-1327 (2007) - [j10]Suhwan Kim, Stephen V. Kosonocky, Daniel R. Knebel, Kevin Stawiasz, Marios C. Papaefthymiou:
A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs. IEEE Trans. Circuits Syst. II Express Briefs 54-II(7): 586-590 (2007) - [c14]Do-Hwan Oh, Deok-Soo Kim, Suhwan Kim, Deog-Kyoon Jeong, Wonchan Kim:
A 2.8Gb/s All-Digital CDR with a 10b Monotonic DCO. ISSCC 2007: 222-598 - 2006
- [c13]Young-Deok Kim, Hyun-Seok Ahn, Joon-Young Park, Suhwan Kim, Deog-Kyoon Jeong:
A Storage- and Power-Efficient Range-Matching TCAM for Packet Classification. ISSCC 2006: 587-596 - 2005
- [j9]Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:
Charge-Recovery Computing on Silicon. IEEE Trans. Computers 54(6): 651-659 (2005) - [c12]Visvesh S. Sathe, Juang-Ying Chueh, Joohee Kim, Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou:
Fast, efficient, recovering, and irreversible. Conf. Computing Frontiers 2005: 407-413 - 2004
- [j8]Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang:
Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization. J. VLSI Signal Process. 38(2): 101-113 (2004) - [c11]Suhwan Kim, Stephen V. Kosonocky, Daniel R. Knebel, Kevin Stawiasz:
Experimental measurement of a novel power gating structure with intermediate power saving mode. ISLPED 2004: 20-25 - [c10]Shu-Shin Chin, Sangjin Hong, Suhwan Kim:
Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units. ISVLSI 2004: 158-166 - [c9]Visvesh S. Sathe, Conrad H. Ziesler, Marios C. Papaefthymiou, Suhwan Kim, Stephen V. Kosonocky:
A synchronous interface for SoCs with multiple clock domains. SoCC 2004: 173-174 - 2003
- [j7]Suhwan Kim, Conrad H. Ziesler:
A clockless future for systems on chip. IEEE Des. Test Comput. 20(6): 120- (2003) - [j6]Stephen V. Kosonocky, Azeez J. Bhavnagarwala, Kenneth Chin, George Gristede, Anne-Marie Haen, Wei Hwang, Mark B. Ketchen, Suhwan Kim, Daniel R. Knebel, Kevin W. Warren, Victor V. Zyuban:
Low-power circuits and technology for wireless digital systems. IBM J. Res. Dev. 47(2-3): 283-298 (2003) - [j5]Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:
Fine-grain real-time reconfigurable pipelining. IBM J. Res. Dev. 47(5-6): 599-610 (2003) - [j4]Jean-Olivier Plouchart, Noah Zamdmer, Jonghae Kim, Melanie Sherony, Yue Tan, Asit Ray, Mohamed Talbi, Lawrence F. Wagner, Kun Wu, Naftali E. Lustig, Shreesh Narasimha, Patricia O'Neil, Nghia Phan, Michael Rohn, James Strom, David M. Friend, Stephen V. Kosonocky, Daniel R. Knebel, Suhwan Kim, Keith A. Jenkins, Michel M. Rivier:
Application of an SOI 0.12-µm CMOS technology to SoCs with low-power and high-frequency circuits. IBM J. Res. Dev. 47(5-6): 611-630 (2003) - [j3]Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:
A true single-phase energy-recovery multiplier. IEEE Trans. Very Large Scale Integr. Syst. 11(2): 194-207 (2003) - [c8]Suhwan Kim, Stephen V. Kosonocky, Daniel R. Knebel, Kevin Stawiasz, David F. Heidel, Michael Immediato:
Minimizing inductive noise in system-on-a-chip with multiple power gating structures. ESSCIRC 2003: 635-638 - [c7]Suhwan Kim, Stephen V. Kosonocky, Daniel R. Knebel:
Understanding and minimizing ground bounce during mode transition of power gating structures. ISLPED 2003: 22-25 - 2002
- [j2]Sangjin Hong, Suhwan Kim, Wayne E. Stark:
Low-power Application-specific Parallel Array Multiplier Design for DSP Applications. VLSI Design 14(3): 287-298 (2002) - [c6]Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang:
Multiplier architecture power consumption characterization for low-power DSP applications. ICECS 2002: 741-744 - 2001
- [j1]Suhwan Kim, Marios C. Papaefthymiou:
True single-phase adiabatic circuitry. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 52-63 (2001) - [c5]Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:
Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier. ARVLSI 2001: 42-58 - [c4]Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:
A True Single-Phase 8-bit Adiabatic Multiplier. DAC 2001: 758-763 - [c3]Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou:
A resonant clock generator for single-phase adiabatic systems. ISLPED 2001: 159-164
1990 – 1999
- 1999
- [c2]Suhwan Kim, Marios C. Papaefthymiou:
Single-phase source-coupled adiabatic logic. ISLPED 1999: 97-99 - 1998
- [c1]Suhwan Kim, Marios C. Papaefthymiou:
True single-phase energy-recovering logic for low-power, high-speed VLSI. ISLPED 1998: 167-172
Coauthor Index
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