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ORCID"Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology."
Aibin Yan et al. (2017)
- Aibin Yan
, Zhengfeng Huang, Maoxiang Yi, Xiumin Xu, Yiming Ouyang, Huaguo Liang:
Double-Node-Upset-Resilient Latch Design for Nanoscale CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 25(6): 1978-1982 (2017)
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