"Dual-modular-redundancy and dual-level error-interception based ..."

Aibin Yan et al. (2021)

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DOI: 10.1016/J.MEJO.2021.105034

access: closed

type: Journal Article

metadata version: 2021-05-26

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Aibin Yan, Zhihui He, Jun Zhou, Jie Cui, Tianming Ni, Zhengfeng Huang, Xiaoqing Wen, Patrick Girard:
Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications. Microelectron. J. 111: 105034 (2021)

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