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ORCIDMichael J. Wirthlin
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- affiliation: Brigham Young University, UT, USA
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2020 – today
- 2024
[j20]Andrew Elbert Wilson, Nathan Baker, Ethan Campbell, Michael J. Wirthlin:
Improving Fault Tolerance for FPGA SoCs through Post-Radiation Design Analysis. ACM Trans. Reconfigurable Technol. Syst. 17(3): 50:1-50:21 (2024)- 2023
- [j19]Aurélien Alacchi
, Edouard Giacomin, Scott Temple, Roman Gauchi, Michael J. Wirthlin, Pierre-Emmanuel Gaillardon:
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 2028-2036 (2023) - [c58]Andrew Elbert Wilson, Nathan Baker, Ethan Campbell, Jackson Sahleen, Michael J. Wirthlin:
Post-Radiation Fault Analysis of a High Reliability FPGA Linux SoC. FPGA 2023: 123-133 - 2022
- [j18]Andrew M. Keller, Michael J. Wirthlin:
The Impact of Terrestrial Radiation on FPGAs in Data Centers. ACM Trans. Reconfigurable Technol. Syst. 15(2): 12:1-12:21 (2022) - 2020
- [c57]Andrew M. Keller, Jared Anderson, Michael J. Wirthlin, Shi-Jie Wen, Rita Fung, Conner Chambers:
Using Partial Duplication With Compare to Detect Radiation-Induced Failure in a Commercial FPGA-Based Networking System. IRPS 2020: 1-6 - [c56]Dallin Skouson, Andrew M. Keller, Michael J. Wirthlin:
Netlist Analysis and Transformations Using SpyDrNet. SciPy 2020: 40-47
2010 – 2019
- 2019
- [c55]Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin:
Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules. FCCM 2019: 9-16 - [c54]Andrew M. Keller, Michael J. Wirthlin:
Impact of Soft Errors on Large-Scale FPGA Cloud Computing. FPGA 2019: 272-281 - [c53]Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin:
Maverick: A Stand-alone CAD Flow for Xilinx 7-Series FPGAs. FPGA 2019: 306-307 - [c52]Corbin Thurlow, Hayden Rowberry, Michael J. Wirthlin:
TURTLE: A Low-Cost Fault Injection Platform for SRAM-based FPGAs. ReConFig 2019: 1-8 - [c51]Andrew E. Wilson, Michael J. Wirthlin:
Reconfigurable Real-Time Video Pipelines on SRAM-based FPGAs. ReConFig 2019: 1-7 - 2018
- [c50]Matthew Cannon, Andrew M. Keller, Michael J. Wirthlin:
Improving the Effectiveness of TMR Designs on FPGAs with SEU-Aware Incremental Placement. FCCM 2018: 141-148 - 2017
- [c49]W. Feng, A. George, H. Lamm, Michael J. Wirthlin:
Center for High-Performance Reconfigurable Computing (CHREC): A Ten-Year Odyssey. Conf. Computing Frontiers 2017: 326-327 - [c48]Brad L. Hutchings, Michael J. Wirthlin:
Rapid implementation of a partially reconfigurable video system with PYNQ. FPL 2017: 1-8 - 2016
- [j17]René Cumplido, Michael Hübner, Michael J. Wirthlin:
Introduction to the special section on FPGAs Technology and Applications. Comput. Electr. Eng. 55: 88-90 (2016) - [c47]Michael J. Wirthlin, Andrew M. Keller, Chase McCloskey, Parker Ridd, David S. Lee, Jeffrey Draper:
SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing. FPGA 2016: 205-214 - [c46]Ammon Gruwell, Peter Zabriskie, Michael J. Wirthlin:
High-speed programmable FPGA Configuration through JTAG. FPL 2016: 1-4 - [c45]Luke Newmeyer, Doran Wilde, Brent E. Nelson, Michael J. Wirthlin:
Efficient processing of phased array radar in sense and avoid application using heterogeneous computing. FPL 2016: 1-8 - [c44]Aaron Stoddard, Ammon Gruwell, Peter Zabriskie, Michael J. Wirthlin:
High-speed PCAP configuration scrubbing on Zynq-7000 All Programmable SoCs. FPL 2016: 1-8 - [c43]Thomas Townsend, Brent E. Nelson, Michael J. Wirthlin:
An XDL alternative for interfacing RapidSmith and Vivado. FPL 2016: 1 - 2015
- [j16]René Cumplido, Eduardo de la Torre, Claudia Feregrino Uribe, Michael J. Wirthlin:
Introduction to Special issue on Reconfigurable computing and FPGAs. Microprocess. Microsystems 39(7): 541-542 (2015) - [j15]Michael J. Wirthlin:
High-Reliability FPGA-Based Systems: Space, High-Energy Physics, and Beyond. Proc. IEEE 103(3): 379-389 (2015) - [j14]Heather M. Quinn, Diane Roussel-Dupre, Michael P. Caffrey, Paul S. Graham, Michael J. Wirthlin, Keith Morgan, Anthony Salazar, Tony Nelson, William Howes, Darrel Eric Johnson, Jonathan M. Johnson, Brian H. Pratt, Nathan Rollins, Jim Krone:
The Cibola Flight Experiment. ACM Trans. Reconfigurable Technol. Syst. 8(1): 3:1-3:22 (2015) - [c42]Nathan A. Harward, Michael R. Gardiner, Luke W. Hsiao, Michael J. Wirthlin:
Estimating Soft Processor Soft Error Sensitivity through Fault Injection. FCCM 2015: 143-150 - 2013
- [j13]Brian H. Pratt, Megan Fuller, Michael Rice, Michael J. Wirthlin:
Reduced-Precision Redundancy for Reliable FPGA Communications Systems in High-Radiation Environments. IEEE Trans. Aerosp. Electron. Syst. 49(1): 369-380 (2013) - [c41]Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings:
Implementing high-performance, low-power FPGA-based optical flow accelerators in C. ASAP 2013: 363-369 - [c40]Michael J. Wirthlin, Joshua E. Jensen, Alex Wilson, William Howes, Shi-Jie Wen, Rick Wong:
Placement of repair circuits for in-field FPGA repair. FPGA 2013: 115-124 - [c39]Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings:
Optimization techniques for a high level synthesis implementation of the Sobel filter. ReConFig 2013: 1-6 - 2012
- [j12]Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings:
A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform. Int. J. Reconfigurable Comput. 2012: 850487:1-850487:11 (2012) - [c38]Nathaniel H. Rollins, Michael J. Wirthlin:
Reliability of a softcore processor in a commercial SRAM-based FPGA. FPGA 2012: 171-174 - 2011
- [j11]Brian H. Pratt, Megan Fuller, Michael J. Wirthlin:
Reduced-Precision Redundancy on FPGAs. Int. J. Reconfigurable Comput. 2011: 897189:1-897189:12 (2011) - [c37]Nathaniel H. Rollins, Michael J. Wirthlin:
Software Fault-Tolerant Techniques for Softcore Processors in Commercial SRAM-Based FPGAs. ARCS Workshops 2011 - [c36]Patrick S. Ostler, Michael J. Wirthlin, Joshua E. Jensen:
FPGA Bootstrapping on PCIe Using Partial Reconfiguration. ReConFig 2011: 380-385 - [e1]Paul Chow, Michael J. Wirthlin:
IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011, Salt Lake City, Utah, USA, 1-3 May 2011. IEEE Computer Society 2011, ISBN 978-0-7695-4301-7 [contents] - 2010
- [c35]Shepard Siegel, Michael J. Wirthlin:
FPGA-2010 pre-conference workshop on open-source for FPGA. FPGA 2010: 1 - [c34]Jonathan M. Johnson, Michael J. Wirthlin:
Voter insertion algorithms for FPGA designs using triple modular redundancy. FPGA 2010: 249-258 - [c33]Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin:
Using Hard Macros to Reduce FPGA Compilation Time. FPL 2010: 438-441 - [c32]Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, Travis Haroldsen, Jared Havican, Marc Padilla, Brent E. Nelson, Michael Rice, Michael J. Wirthlin:
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis. FPL 2010: 538-543 - [c31]Brian H. Pratt, Megan Fuller, Michael Rice, Michael J. Wirthlin:
Reliable Communications Using FPGAs in High-Radiation Environments - Part I: Characterization. ICC 2010: 1-5 - [c30]Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings:
Fault Injection Results of Linux Operating on an FPGA Embedded Platform. ReConFig 2010: 37-42
2000 – 2009
- 2009
- [j10]Heather M. Quinn, Paul S. Graham, Michael J. Wirthlin, Brian H. Pratt, Keith Morgan, Michael P. Caffrey, Jim Krone:
A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based FPGA Devices and Designs. IEEE Trans. Instrum. Meas. 58(10): 3380-3395 (2009) - [c29]Michael P. Caffrey, Keith Morgan, Diane Roussel-Dupre, Scott Robinson, Anthony Nelson, Anthony Salazar, Michael J. Wirthlin, William Howes, Daniel Richins:
On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat). FCCM 2009: 3-10 - [c28]Brian H. Pratt, Michael J. Wirthlin, Michael P. Caffrey, Paul S. Graham, Keith Morgan:
Noise impact of single-event upsets on an FPGA-based digital filter. FPL 2009: 38-43 - [c27]Jonathan Heiner, Benjamin Sellers, Michael J. Wirthlin, Jeff Kalb:
FPGA partial reconfiguration via configuration scrubbing. FPL 2009: 99-104 - [c26]Adam Arnesen, Nathan Rollins, Michael J. Wirthlin:
A multi-layered XML schema and design tool for reusing and integrating FPGA IP. FPL 2009: 472-475 - [c25]Benjamin Sellers, Jonathan Heiner, Michael J. Wirthlin, Jeff Kalb:
Bitstream compression through frame removal and partial reconfiguration. FPL 2009: 476-480 - 2008
- [j9]Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov:
OpenFPGA CoreLib core library interoperability effort. Parallel Comput. 34(4-5): 231-244 (2008) - [j8]Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin:
Design, Debug, Deploy: The Creation of Configurable Computing Applications. J. Signal Process. Syst. 53(1-2): 187-196 (2008) - [c24]Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn A. Bohner:
Design Productivity for Configurable Computing. ERSA 2008: 57-66 - [c23]Heather Quinn, Paul S. Graham, Keith Morgan, Jim Krone, Michael P. Caffrey, Michael J. Wirthlin:
An Introduction to Radiation-Induced Failure Modes and Related Mitigation Methods For Xilinx SRAM FPGAs. ERSA 2008: 139-145 - [c22]Brian H. Pratt, Michael P. Caffrey, Derrick Gibelyou, Paul S. Graham, Keith Morgan, Michael J. Wirthlin:
TMR with More Frequent Voting for Improved FPGA Reliability. ERSA 2008: 153-158 - 2007
- [j7]Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer:
FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 254-265 (2007) - [c21]Michael J. Wirthlin, Misha Burich, Andrew Guyler, Brian Von Herzen:
High-level languages: the future or a passing fad? FPGA 2007: 127 - 2006
- [j6]Maya B. Gokhale, Paul S. Graham, Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins:
Dynamic reconfiguration for management of radiation-induced faults in FPGAs. Int. J. Embed. Syst. 2(1/2): 28-38 (2006) - [c20]Matthew French, Li Wang, Michael J. Wirthlin:
Power Visualization, Analysis, and Optimization Tools for FPGAs. FCCM 2006: 185-194 - [c19]Michael J. Wirthlin, Welson Sun:
DSynth: A Pipeline Synthesis Environment for FPGAs. FCCM 2006: 343-344 - [c18]Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer:
Combining module selection and resource sharing for efficient FPGA pipeline synthesis. FPGA 2006: 179-188 - 2005
- [c17]Matthew French, Li Wang, Tyler Anderson, Michael J. Wirthlin:
Post Synthesis Level Power Modeling of FPGAs. FCCM 2005: 281-282 - [c16]Toomas P. Plaks, Philip Heng Wai Leong, Michael J. Wirthlin:
Mobile Computing Architectures, Design and Implementation. HICSS 2005 - [c15]Michael J. Wirthlin:
Senior-Level Embedded Systems Design Project Using FPGAs. MSE 2005: 91-92 - 2004
- [j5]Michael J. Wirthlin:
Constant Coefficient Multiplication Using Look-Up Tables. J. VLSI Signal Process. 36(1): 7-15 (2004) - [c14]Michael J. Wirthlin:
Improving the reliability of FPGA circuits using triple-modular redundancy (TMR) & efficient voter placement. FPGA 2004: 252 - [c13]Maya B. Gokhale, Paul S. Graham, Darrel Eric Johnson, Nathan Rollins, Michael J. Wirthlin:
Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs. IPDPS 2004 - 2003
- [j4]Edward A. Lee, Stephen Neuendorffer, Michael J. Wirthlin:
Actor-Oriented Design of Embedded Hardware and Software Systems. J. Circuits Syst. Comput. 12(3): 231-260 (2003) - [j3]Michael J. Wirthlin, Brian McMurtrey:
Web-based IP evaluation and distribution using applets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(8): 985-994 (2003) - [c12]Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins, Michael P. Caffrey, Paul S. Graham:
The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets. FCCM 2003: 133-142 - 2002
- [c11]Michael J. Wirthlin, Brian McMurtrey:
IP delivery for FPGAs using Applets and JHDL. DAC 2002: 2-7 - [c10]Wesley J. Landaker, Michael J. Wirthlin, Brad L. Hutchings:
Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. FPL 2002: 806-815 - 2001
- [c9]Michael J. Wirthlin, Brad L. Hutchings, Carl D. Worth:
Synthesizing RTL Hardware from Java Byte Codes. FPL 2001: 123-132 - [c8]Michael J. Wirthlin, Brian McMurtrey:
Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures. FPL 2001: 555-564 - 2000
- [j2]Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin:
Designing and Debugging Custom Computing Applications. IEEE Des. Test Comput. 17(1): 20-28 (2000) - [c7]Michael J. Wirthlin, Steve Morrison, Paul S. Graham, Brian Bray:
Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware. FCCM 2000: 267-278 - [c6]Michael J. Wirthlin, Paul S. Graham:
Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract). FPGA 2000: 219 - [c5]Michael J. Wirthlin, Navaneethan Sundaramoorthy:
Measuring the Routing Costs of FPGA Circuit Components. PDPTA 2000
1990 – 1999
- 1998
- [j1]Michael J. Wirthlin, Brad L. Hutchings:
Improving functional density using run-time circuit reconfiguration [FPGAs]. IEEE Trans. Very Large Scale Integr. Syst. 6(2): 247-256 (1998) - 1997
- [c4]Michael J. Wirthlin, Brad L. Hutchings:
Improving Functional Density Through Run-Time Constant Propagation. FPGA 1997: 86-92 - 1996
- [c3]Michael J. Wirthlin, Brad L. Hutchings:
Sequencing Run-Time Reconfigured Hardware with Software. FPGA 1996: 122-128 - 1995
- [c2]Michael J. Wirthlin, Brad L. Hutchings:
A dynamic instruction set computer. FCCM 1995: 99-109 - [c1]Brad L. Hutchings, Michael J. Wirthlin:
Implementation Approaches for Reconfigurable Logic Applications. FPL 1995: 419-428
Coauthor Index
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