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Gabriel Weisz
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2020 – today
- 2023
- [c10]Cheng Tan, Deepak Patil, Antonino Tumeo, Gabriel Weisz, Steven K. Reinhardt, Jeff Zhang:
VecPAC: A Vectorizable and Precision-Aware CGRA. ICCAD 2023: 1-9
2010 – 2019
- 2019
- [j2]Jeremy Fowers, Kalin Ovtcharov, Michael K. Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger:
Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor. IEEE Micro 39(3): 20-28 (2019) - 2018
- [j1]Eric S. Chung, Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Adrian M. Caulfield, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Maleen Abeydeera, Logan Adams, Hari Angepat, Christian Boehn, Derek Chiou, Oren Firestein, Alessandro Forin, Kang Su Gatlin, Mahdi Ghandi, Stephen Heil, Kyle Holohan, Ahmad El Husseini, Tamás Juhász, Kara Kagi, Ratna Kovvuri, Sitaram Lanka, Friedel van Megen, Dima Mukhortov, Prerak Patel, Brandon Perez, Amanda Rapsang, Steven K. Reinhardt, Bita Rouhani, Adam Sapek, Raja Seera, Sangeetha Shekar, Balaji Sridharan, Gabriel Weisz, Lisa Woods, Phillip Yi Xiao, Dan Zhang, Ritchie Zhao, Doug Burger:
Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. IEEE Micro 38(2): 8-20 (2018) - [c9]Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger:
A Configurable Cloud-Scale DNN Processor for Real-Time AI. ISCA 2018: 1-14 - 2017
- [c8]Andrew G. Schmidt, Gabriel Weisz, Matthew French:
Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs. FCCM 2017: 121-124 - [i1]Andrew G. Schmidt, Gabriel Weisz, Matthew French:
Evaluating Rapid Application Development with Python for Heterogeneous Processor-based FPGAs. CoRR abs/1705.05209 (2017) - 2016
- [c7]Nikolaos Alachiotis, Gabriel Weisz:
High Performance Linkage Disequilibrium: FPGAs Hold the Key. FPGA 2016: 118-127 - [c6]Gabriel Weisz, Joseph Melber, Yu Wang, Kermin Fleming, Eriko Nurvitadhi, James C. Hoe:
A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems. FPGA 2016: 264-273 - 2015
- [c5]Gabriel Weisz, James C. Hoe:
CoRAM++: Supporting data-structure-specific memory interfaces for FPGA computing. FPL 2015: 1-8 - 2014
- [c4]Eriko Nurvitadhi, Gabriel Weisz, Yu Wang, Skand Hurkat
, Marie Nguyen, James C. Hoe, José F. Martínez
, Carlos Guestrin:
GraphGen: An FPGA Framework for Vertex-Centric Graph Computation. FCCM 2014: 25-28 - 2013
- [c3]Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe:
Cross-platform FPGA accelerator development using CoRAM and CONNECT. FPGA 2013: 3-4 - [c2]Gabriel Weisz, James C. Hoe:
C-to-CoRAM: compiling perfect loop nests to the portable CoRAM abstraction. FPGA 2013: 221-230 - 2012
- [c1]Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai
:
Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing. FPGA 2012: 139-142
Coauthor Index
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