Thomas Hollstein

Haoyuan Ying, Thomas Hollstein, Klaus Hofmann: Fast and optimized task allocation method for low vertical link density 3-dimensional networks-on-chip based many core systems. DATE 2013: 1777-1782

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method. Microprocessors and Microsystems - Embedded Hardware Design 36(6): 449-461 (2012)

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461. Microprocessors and Microsystems - Embedded Hardware Design 36(6): 527 (2012)

Haoyuan Ying, Ashok Jaiswal, Mohamed A. Abd El-Ghany, Thomas Hollstein, Klaus Hofmann: A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations. DDECS 2012: 83-88

Mohsin Amin, Mihkel Tagel, Gert Jervan, Thomas Hollstein: Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints. ReCoSoC 2012: 1-6

Haoyuan Ying, Thomas Hollstein, Klaus Hofmann: Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip. ReCoSoC 2012: 1-6

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip. Microprocessors and Microsystems - Embedded Hardware Design 35(3): 343-358 (2011)

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip. IEEE Trans. Parallel Distrib. Syst. 22(4): 544-557 (2011)

Haoyuan Ying, Ashok Jaiswal, Thomas Hollstein, Klaus Hofmann: A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication. DSD 2011: 63-70

Thomas Hollstein, Faizal Arya Samman, Ashok Jaiswal, Haoyuan Ying, Manfred Glesner, Klaus Hofmann: Invited paper: Design criteria for dependable System-on-Chip architectures. ReCoSoC 2011: 1-6

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip. IEEE Trans. VLSI Syst. 18(7): 1067-1080 (2010)

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management. VLSI Design 2009 (2009)

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Multicast Parallel Pipeline Router Architecture for Network-on-Chip. DATE 2008: 1396-1401

Faizal Arya Samman, Thomas Hollstein, Manfred Glesner: Flexible parallel pipeline network-on-chip based on dynamic packet identity management. IPDPS 2008: 1-8

Manfred Glesner, Tudor Murgan, Thomas Hollstein: Hardware Based Rapid Prototyping. Wiley Encyclopedia of Computer Science and Engineering 2008

Thomas Hollstein, Manfred Glesner: Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms. Computers & Electrical Engineering 33(4): 310-319 (2007)

Martin K. F. Schafer, Thomas Hollstein, Heiko Zimmer, Manfred Glesner: Deadlock-free routing and component placement for irregular mesh-based networks-on-chip. ICCAD 2005: 238-245

Heiko Zimmer, Stefan Zink, Thomas Hollstein, Manfred Glesner: Buffer-Architecture Exploration for Routers in a Hierarchical Network-on-Chip. IPDPS 2005

Thomas Hollstein, Sujan Pandey, Manfred Glesner: Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip. ReCoSoC 2005: 85-92

Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf: Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. SAMOS 2005: 12-21

Gilles Sassatelli, Manfred Glesner, Lionel Torres, Leandro Soares Indrusiak, Thomas Hollstein (Eds.): Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005. Univ. Montpellier II 2005, isbn 2-9517-4611-3

Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan: Reconfigurable platforms for ubiquitous computing. Conf. Computing Frontiers 2004: 377-389

Peter Zipf, Heiko Hinkelmann, Adeel Ashraf, Thomas Hollstein, Manfred Glesner: An Asynchronous Switch Implmentation for Systems-on-a-Chip. MBMV 2004: 224-231

Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner: Rapid Prototyping of an Integrated Testing and Debugging Unit. IEEE International Workshop on Rapid System Prototyping 2004: 187-192

Tudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek: Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. FPL 2003: 1111-1114

Thomas Hollstein, Ralf Ludewig, Christoph Mager, Peter Zipf, Manfred Glesner: A hierarchical generic approach for on-chip communication, testing and debugging of SoCs. VLSI-SOC 2003: 44-49

André Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatová, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng: Integrated Design and Test Generation Under Internet Based Environment MOSCITO. DSD 2002: 187-195

Jochen Mades, Thomas Schneider, André Windisch, Thomas Hollstein, Jürgen Becker, Manfred Glesner: Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design. MSE 2001: 2-3

Matthias Meixner, Jürgen Becker, Thomas Hollstein, Manfred Glesner: Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems. MBMV 1999: 182-191

Thomas Hollstein, Jürgen Becker, Andreas Kirschbaum, Manfred Glesner: HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems. CODES 1998: 29-33

Claus Schneider, Martin Kayss, Thomas Hollstein, Jürgen Deicke: From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms. DATE 1998: 186-190

Thomas Hollstein, Andreas Kirschbaum, Manfred Glesner: A prototyping environment for fuzzy controllers. FPL 1997: 482-490

Thomas Hollstein, Saman K. Halgamuge, Manfred Glesner: Computer-aided design of fuzzy systems based on generic VHDL specifications. IEEE T. Fuzzy Systems 4(4): 403-417 (1996)

U. Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner: Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. FPL 1995: 241-250

Thomas Hollstein, Saman K. Halgamuge, Andreas Kirschbaum, Manfred Glesner: Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays. Fuzzy Days 1994: 8-14