ICCD 2003: San Jose, CA, USA


Energy Efficiency

Timing Verification

Electrical Analysis for System LSI

Power Optimization

Gene Chip Design

Embedded Tutorial

System Level Design

Systems Performance

Micro Processor Test & Diagnosis

Physical Design

Performance Optimization

Clock & Signal Distribution

Performance and Power-Driven Physical Design

Instruction Execution

Test Compression Technology

Physical Design for Regular Fabrics and FPGA's

Array Design Optimization

Test Compaction

Techniques for Synthesizing into Fabrics

Hardware Partitioning

Energy-Aware Design and Application

High-Speed Design Issues and Test Challenges

Efficiency and Reliability

Novel Methods in Logic Synthesis

Communications and Context Management

Board Test and Power-Aware Test

maintained by Schloss Dagstuhl LZI at University of Trier