"A Microeconomic Model for Simultaneous Gate Sizing and Voltage Scaling for ..."

N. Ranganathan, Ashok K. Murugavel (2003)

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DOI: 10.1109/ICCD.2003.1240907

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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N. Ranganathan, Ashok K. Murugavel:
A Microeconomic Model for Simultaneous Gate Sizing and Voltage Scaling for Power Optimization. ICCD 2003: 276-281

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