DFT 2008:
Boston, MA, USACristiana Bolchini , Yong-Bin Kim , Dimitris Gizopoulos , Mohammad Tehranipoor (Eds.):
23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA.
IEEE Computer Society 2008 Keynote Talk
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Phil Nigh :
The Evolving Role of Test ... it is now a "Value Add" Operation.
3-3
Session 1 - Defect and Fault Tolerance
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Session 2 - Dependability Analysis and Evaluation
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Invited Talk
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Kartik Mohanram :
Error Detection and Tolerance for Scaled Electronic Technologies.
83-83
Session 3 - Hot Topics
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Session 4 - Design for Testability
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Shianling Wu ,
Laung-Terng Wang ,
Zhigang Jiang ,
Jiayong Song ,
Boryau Sheu ,
Xiaoqing Wen ,
Michael S. Hsiao ,
James Chien-Mo Li ,
Jiun-Lang Huang ,
Ravi Apte :
On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs.
143-151
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Invited Talk
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Session 5 - Poster Session
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Rui Gong ,
Kui Dai ,
Zhiying Wang :
A Framework to Evaluate the Trade-off among AVF Performance and Area of Soft Error Tolerant Microprocessors.
184-192
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Invited Talk
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Shubu Mukherjee :
Architectural Vulnerability Factor (or, does a soft error matter?).
301-301
Session 6 - Reliability and Fault Tolerance
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Session 7 - Error Detection and Correction (I)
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Qiaoyan Yu ,
Paul Ampadu :
Adaptive Error Control for NoC Switch-to-Switch Links in a Variable Noise Environment.
352-360
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Prashant D. Joshi :
Error Detect Logic Resulting in Faster Address Generate and Decode for Caches.
370-377
Invited Talk
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Zahi S. Abuhamdeh :
A Case Study of ATPG Delay Path Performance Based on Measured Power Rail Integrity.
381-381
Session 8 - Testing Techniques
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Hyunbean Yi ,
Sandip Kundu :
Core Test Wrapper Design to Reduce Test Application Time for Modular SoC Testing.
412-420
Invited Talk
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Session 10 - Error Detection and Correction (2)
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conf/dft/ManiatakosKMJT08
Session 11 - Testing for Timing and Parametric Failures
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Yukiya Miura ,
Jiro Kato :
Diagnosis of Analog Circuits by Using Multiple Transistors and Data Sampling.
491-499
Invited Talks
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Kamran Zarrineh :
Design for Test Challenges of High Performance/Low Power Microprocessors.
503-503
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Session 12 - Emerging Technologies
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