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2020 – today
- 2023
[j32]Israa Khaled
, Ammar El Falou, Charlotte Langlais, Michel Jézéquel, Bachar Elhassan:
Angle-Domain Hybrid Beamforming-Based mmWave Massive MIMO-NOMA Systems. IEEE Open J. Commun. Soc. 4: 684-699 (2023)- 2022
- [j31]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel:
A Literature Survey on Algorithms and Hardware Architectures of Max-Log-MAP Demapping. J. Circuits Syst. Comput. 31(3): 2230001:1-2230001:48 (2022) - 2021
- [j30]Israa Khaled, Charlotte Langlais, Ammar El Falou, Bachar A. ElHassan, Michel Jézéquel:
Multi-User Angle-Domain MIMO-NOMA System for mmWave Communications. IEEE Access 9: 129443-129459 (2021) - [j29]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat:
No-instruction-set-computer design experience of flexible and efficient architectures for digital communication applications: two case studies on MIMO turbo detection and universal turbo demapping. Des. Autom. Embed. Syst. 25(1): 1-42 (2021) - [j28]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Youssef Atat, Yasser Mohanna:
NISC-Based MIMO MMSE Detector. J. Circuits Syst. Comput. 30(4): 2150069:1-2150069:35 (2021) - [c60]Israa Khaled, Charlotte Langlais, Ammar El Falou, Michel Jézéquel, Bachar ElHassan:
Joint Single- and Multi-Beam Angle-Domain NOMA for Hybrid MmWave MIMO Systems. WSA 2021: 1-6 - 2020
- [c59]Israa Khaled, Charlotte Langlais, Ammar El Falou, Michel Jézéquel, Bachar ElHassan:
Joint SDMA and Power-Domain NOMA System for Multi-User Mm-Wave Communications. IWCMC 2020: 1112-1117 - [c58]Israa Khaled, Ammar El Falou, Charlotte Langlais, Bachar El-Hassan, Michel Jézéquel:
Multi-User Digital Beamforming Based on Path Angle Information for mm-Wave MIMO Systems. WSA 2020: 1-6 - [i4]Israa Khaled, Charlotte Langlais, Ammar El Falou, Bachar Elhassan, Michel Jézéquel:
Low-Complexity Angle-Domain MIMO NOMA System with partial channel state information for MmWave Communications. CoRR abs/2011.10473 (2020)
2010 – 2019
- 2019
- [j27]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel:
Computational Complexity Reduction of MMSE-IC MIMO Turbo Detection. J. Circuits Syst. Comput. 28(13): 1950228:1-1950228:26 (2019) - [j26]Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Budget Restricted Incremental Learning with Pre-Trained Convolutional Neural Networks and Binary Associative Memories. J. Signal Process. Syst. 91(9): 1063-1073 (2019) - [c57]Israa Khaled, Ammar El Falou, Charlotte Langlais, Bachar ElHassan, Michel Jézéquel:
Performance Evaluation of Linear Precoding mmWave Multi-User MIMO Systems with NYUSIM Channel Simulator. MENACOMM 2019: 1-6 - [c56]Ghouthi B. Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Efficient Hardware Implementation of Incremental Learning and Inference on Chip. NEWCAS 2019: 1-4 - [i3]Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Efficient Hardware Implementation of Incremental Learning and Inference on Chip. CoRR abs/1911.07847 (2019) - 2018
- [c55]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Ali Chamas Al Ghouwayel:
NISC Design Experience of Flexible Architectures for Digital Communication Applications. ICCA 2018: 123-129 - [i2]Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Transfer Incremental Learning using Data Augmentation. CoRR abs/1810.02020 (2018) - 2017
- [j25]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat:
Efficient quantization and fixed-point representation for MIMO turbo-detection and turbo-demapping. EURASIP J. Embed. Syst. 2017: 33 (2017) - [j24]Atif Raza Jafri, Amer Baghdadi, Muhammad Najam-ul-Islam, Michel Jézéquel:
Heterogeneous Multi-ASIP and NoC-Based Architecture for Adaptive Parallel TBICM-ID-SSD. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 259-263 (2017) - [c54]Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Incremental learning on chip. GlobalSIP 2017: 789-792 - [c53]Ghouthi Boukli Hacene, Vincent Gripon, Nicolas Farrugia, Matthieu Arzel, Michel Jézéquel:
Budget restricted incremental learning with pre-trained convolutional neural networks and binary associative memories. SiPS 2017: 1-6 - 2015
- [j23]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat:
NISC-Based Soft-Input-Soft-Output Demapper. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1098-1102 (2015) - 2014
- [j22]Daniel Gomez Toro, Matthieu Arzel, Fabrice Seguin, Michel Jézéquel:
Soft Error Detection and Correction Technique for Radiation Hardening Based on C-element and BICS. IEEE Trans. Circuits Syst. II Express Briefs 61-II(12): 952-956 (2014) - [c52]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat:
Design and prototyping flow of NISC-based flexible MIMO turbo-equalizer. RSP 2014: 16-21 - 2013
- [j21]Oscar Sanchez, Christophe Jégo, Michel Jézéquel:
Analysis of the Convergence Process by EXIT Charts for Parallel Implementations of Turbo Decoders. IEEE Commun. Lett. 17(7): 1427-1430 (2013) - [c51]Purushotham Murugappa, Amer Baghdadi, Michel Jézéquel:
Parameterized area-efficient multi-standard turbo decoder. DATE 2013: 109-114 - [c50]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohana, Youssef Atat:
Statically-scheduled application-specific processor design: a case-study on MMSE MIMO equalization. DATE 2013: 677-680 - [c49]Esteban Gabriel Cabanillas, Didier Lohy, Cyril Lahuec, Michel Jézéquel:
Efficient NISI compensation technique for a low-cost satellite video receiver. ICC 2013: 5564-5567 - [c48]Mostafa Rizk, Amer Baghdadi, Michel Jézéquel, Yasser Mohanna, Youssef Atat:
Flexible and efficient architecture design for MIMO MMSE-IC linear turbo-equalization. ICCIT 2013: 340-344 - [c47]Yangyang Tang, Emmanuel Boutillon, Chris Winstead, Christophe Jégo, Michel Jézéquel:
Muller C-element based Decoder (MCD): A decoder against transient faults. ISCAS 2013: 1680-1683 - [c46]Daniel Gomez Toro, Fabrice Seguin, Matthieu Arzel, Michel Jézéquel:
Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technology. MWSCAS 2013: 241-244 - [c45]Tuan Anh Truong, Hao Lin, Bruno Jahan, Matthieu Arzel, Michel Jézéquel:
PAPR reduction using contiguous-tone Tone Reservation technique in optical OFDM IMDD transmissions. OFC/NFOEC 2013: 1-3 - [c44]Purushotham Murugappa, Vianney Lapotre, Amer Baghdadi, Michel Jézéquel:
Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes. RSP 2013: 87-93 - 2012
- [j20]Haisheng Liu, Christophe Jégo, Emmanuel Boutillon, Michel Jézéquel, Jean-Philippe Diguet:
A contribution to the reduction of the dynamic power dissipation in the turbo decoder. Ann. des Télécommunications 67(7-8): 397-406 (2012) - [j19]Salim Haddad, Amer Baghdadi, Michel Jézéquel:
Complexity adaptive iterative receiver performing TBICM-ID-SSD. EURASIP J. Adv. Signal Process. 2012: 131 (2012) - [j18]Salim Haddad, Amer Baghdadi, Michel Jézéquel:
On the Convergence Speed of Turbo Demodulation With Turbo Decoding. IEEE Trans. Signal Process. 60(8): 4452-4458 (2012) - [c43]Jean Dion, Marie-Hélène Hamon, Pierre Penard, Matthieu Arzel, Michel Jézéquel:
Multi-standard trellis-based FEC decoder. DASIP 2012: 1-7 - [c42]Oscar Sanchez, C. Jegoy, Michel Jézéquel, Yannick Saouter:
High speed low complexity radix-16 Max-Log-MAP SISO decoder. ICECS 2012: 400-403 - [c41]Salim Haddad, Oscar Sanchez, Amer Baghdadi, Michel Jézéquel:
Complexity reduction of shuffled parallel iterative demodulation with turbo decoding. ICT 2012: 1-6 - [c40]Yangyang Tang, Chris Winstead, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel:
An LDPC decoding method for fault-tolerant digital logic. ISCAS 2012: 3025-3028 - [c39]Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel:
Architecture efficiency of application-specific processors: A 170Mbit/s 0.644mm2 multi-standard turbo decoder. ISSoC 2012: 1-7 - [c38]Chris Winstead, Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel:
A space-time redundancy technique for embedded stochastic error correction. ISTC 2012: 36-40 - [c37]Jean Dion, Marie-Hélène Hamon, Pierre Penard, Matthieu Arzel, Michel Jézéquel:
Adapted scheduling of QC-LDPC decoding for multistandard receivers. ISTC 2012: 111-115 - [c36]Salim Haddad, Amer Baghdadi, Michel Jézéquel:
Adaptive complexity MIMO turbo receiver applying turbo demodulation. ISTC 2012: 235-239 - [c35]Esteban Cabanillas, Didier Lohy, Cyril Lahuec, Michel Jézéquel:
Compensating the high power amplifier nonlinearity for a DVB-S2 system. NEWCAS 2012: 441-444 - [c34]Purushotham Murugappa, Jean-Noel Bazin, Amer Baghdadi, Michel Jézéquel:
FPGA prototyping and performance evaluation of multi-standard Turbo/LDPC Encoding and Decoding. RSP 2012: 143-148 - [c33]Oscar Sanchez, Michel Jézéquel, Saeed-ur Rehman, Awais Sani, Cyrille Chavet, Philippe Coussy, Christophe Jégo:
A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders. SiPS 2012: 288-293 - [i1]Salim Haddad, Amer Baghdadi, Michel Jézéquel:
On the Convergence Speed of Turbo Demodulation with Turbo Decoding. CoRR abs/1203.5037 (2012) - 2011
- [j17]Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel:
Parallel MIMO Turbo Equalization. IEEE Commun. Lett. 15(3): 290-292 (2011) - [j16]Cyril Lahuec, Shaban Almouahed, Matthieu Arzel, Deepak Gupta, Chafiaâ Hamitouche, Michel Jézéquel, Eric Stindel, Christian Roux:
A Self-Powered Telemetry System to Estimate the Postoperative Instability of a Knee Implant. IEEE Trans. Biomed. Eng. 58(3): 822-825 (2011) - [j15]Camille Leroux, Christophe Jégo, Patrick Adde, Deepak Gupta, Michel Jézéquel:
Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. J. Signal Process. Syst. 64(1): 17-29 (2011) - [c32]Purushotham Murugappa, Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel:
A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding. DATE 2011: 228-233 - [c31]Pallavi Reddy, Fabien Clermidy, Amer Baghdadi, Michel Jézéquel:
A low complexity stopping criterion for reducing power consumption in turbo decoders. DATE 2011: 649-654 - [c30]Rachid Al-Khayat, Purushotham Murugappa, Amer Baghdadi, Michel Jézéquel:
Area and throughput optimized ASIP for multi-standard turbo decoding. International Symposium on Rapid System Prototyping 2011: 79-84 - [c29]Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel:
Hardware efficiency versus error probability in unreliable computation. SiPS 2011: 168-173 - [c28]Salim Haddad, Amer Baghdadi, Michel Jézéquel:
Reducing the number of iterations in iterative demodulation with turbo decoding. SoftCOM 2011: 1-6 - 2010
- [j14]Olivier Muller, Amer Baghdadi, Michel Jézéquel:
Parallelism Efficiency in Convolutional Turbo Decoding. EURASIP J. Adv. Signal Process. 2010 (2010) - [j13]Meysam Zargham, Christian Schlegel, Jorge Pérez Chamorro, Cyril Lahuec, Fabrice Seguin, Michel Jézéquel, Vincent C. Gaudet:
Scaling of analog LDPC decoders in sub-100 nm CMOS processes. Integr. 43(4): 365-377 (2010) - [c27]Yangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel:
A new single-error correction scheme based on self-diagnosis residue number arithmetic. DASIP 2010: 27-33 - [c26]Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel:
Rapid design and prototyping of universal soft demapper. ISCAS 2010: 3769-3772 - [c25]Pallavi Reddy, Fabien Clermidy, Rasheed Al Khayat, Amer Baghdadi, Michel Jézéquel:
Power consumption analysis and energy efficient optimization for turbo decoder implementation. SoC 2010: 12-17
2000 – 2009
- 2009
- [j12]Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel:
ASIP-Based Universal Demapper for Multiwireless Standards. IEEE Embed. Syst. Lett. 1(1): 9-13 (2009) - [j11]Olivier Muller, Amer Baghdadi, Michel Jézéquel:
From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 92-102 (2009) - [j10]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. J. Signal Process. Syst. 57(3): 349-361 (2009) - [c24]Atif Raza Jafri, Daoud Karakolah, Amer Baghdadi, Michel Jézéquel:
ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications. DATE 2009: 1620-1625 - [c23]Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jézéquel:
Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm. DSD 2009: 582-589 - [c22]Daoud Karakolah, Christophe Jégo, Charlotte Langlais, Michel Jézéquel:
Design of an Iterative Receiver for Linearly Precoded MIMO Systems. ISCAS 2009: 597-600 - [c21]Jorge Pérez Chamorro, Fabrice Seguin, Cyril Lahuec, Michel Jézéquel, Gwenaëlle Le Mestre:
Decoding a Family of Dense Codes using the Sum-Product Algorithm. ISCAS 2009: 2685-2688 - [c20]Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel:
Rapid Prototyping of ASIP-based Flexible MMSE-IC Linear Equalizer. IEEE International Workshop on Rapid System Prototyping 2009: 130-133 - 2008
- [c19]Hazem Moussa, Amer Baghdadi, Michel Jézéquel:
Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder. DAC 2008: 429-434 - [c18]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
On the higher efficiency of parallel Reed-Solomon turbo-decoding. ICECS 2008: 1308-1311 - [c17]Hazem Moussa, Amer Baghdadi, Michel Jézéquel:
Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder. ISCAS 2008: 97-100 - [c16]Olivier Muller, Amer Baghdadi, Michel Jézéquel:
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding. IEEE International Workshop on Rapid System Prototyping 2008: 128-134 - [c15]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel, Deepak Gupta:
A highly parallel Turbo Product Code decoder without interleaving resource. SiPS 2008: 1-6 - 2007
- [j9]Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel:
Semi-Iterative Analog Turbo Decoding. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(6): 1305-1316 (2007) - [c14]Hazem Moussa, Olivier Muller, Amer Baghdadi, Michel Jézéquel:
Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding. DATE 2007: 654-659 - [c13]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
Towards Gb/s turbo decoding of product code onto an FPGA device. ISCAS 2007: 909-912 - [c12]Haisheng Liu, Jean-Philippe Diguet, Christophe Jégo, Michel Jézéquel, Emmanuel Boutillon:
Energy Efficient Turbo Decoder with Reduced State Metric Quantization. SiPS 2007: 237-242 - 2006
- [c11]Olivier Muller, Amer Baghdadi, Michel Jézéquel:
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding. DATE 2006: 1330-1335 - [c10]Olivier Muller, Amer Baghdadi, Michel Jézéquel:
On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference. GLOBECOM 2006 - [c9]Matthieu Arzel, Fabrice Seguin, Cyril Lahuec, Michel Jézéquel:
Semi-iterative analog turbo decoding. ISCAS 2006 - [c8]Erwan Piriou, Christophe Jégo, Patrick Adde, Raphaël Le Bidan, Michel Jézéquel:
Efficient architecture for Reed Solomon block turbo code. ISCAS 2006 - [c7]Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel:
A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes. ISVLSI 2006: 430-431 - [c6]Erwan Piriou, Christophe Jégo, Patrick Adde, Michel Jézéquel:
Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. ReCoSoC 2006: 152-159 - 2005
- [j8]Ramesh Pyndiah, Michel Jézéquel:
Foreword / Éditorial. Ann. des Télécommunications 60(1-2): 6-9 (2005) - [j7]David Gnaedig, Emmanuel Boutillon, Michel Jézéquel, Vincent C. Gaudet, P. Glenn Gulak:
On Multiple Slice Turbo Codes. Ann. des Télécommunications 60(1-2): 79-102 (2005) - [j6]David Gnaedig, Emmanuel Boutillon, Michel Jézéquel:
Design of Three-Dimensional Multiple Slice Turbo Codes. EURASIP J. Adv. Signal Process. 2005(6): 808-819 (2005) - [c5]Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel:
. Analog slice turbo decoding. ISCAS (1) 2005: 332-335 - 2004
- [j5]David Gnaedig, Emmanuel Boutillon, Eric Martin, Amor Nafkha, Michel Jézéquel, Jacky Tousch, Nathalie Brengarth:
Synthèse d'architecture pour la réalisation comportementale de l'algorithme MAP pour Turbo Décodeur. Ann. des Télécommunications 59(3-4): 325-348 (2004) - [c4]Claude Berrou, Yannick Saouter, Catherine Douillard, Sylvie Kerouédan, Michel Jézéquel:
Designing good permutations for turbo codes: towards a single model. ICC 2004: 341-345 - 2002
- [c3]Claude Berrou, Sandrine Vaton, Michel Jézéquel, Catherine Douillard:
Computing the minimum distance of linear codes by the error impulse method. GLOBECOM 2002: 1017-1020 - [c2]Claude Berrou, Michel Jézéquel, Catherine Douillard, Laura Conde:
Application of the error impulse method in the design of high-order turbo coded modulation. ITW 2002: 41-44 - 2001
- [j4]Michel Jézéquel, Ramesh Pyndiah:
Turbo codes: A wide-spreading technique. Ann. des Télécommunications 56(7-8): 375-376 (2001) - [j3]Michel Jézéquel, Ramesh Pyndiah:
Turbocodes: Une technique qui se diffuse. Ann. des Télécommunications 56(7-8): 377-378 (2001) - [c1]Claude Berrou, Michel Jézéquel, Catherine Douillard, Sylvie Kerouédan:
The advantages of non-binary turbo codes. ITW 2001: 61-63
1990 – 1999
- 1999
- [j2]Claude Berrou, Catherine Douillard, Michel Jézéquel:
Multiple parallel concatenation of circular recursive systematic convolutional (Crsc ) codes. Ann. des Télécommunications 54(3-4): 166-172 (1999) - 1995
- [j1]Catherine Douillard, Michel Jézéquel, Claude Berrou, Annie Picart, Pierre Didier, Alain Glavieux:
Iterative correction of intersymbol interference: Turbo-equalization. Eur. Trans. Telecommun. 6(5): 507-511 (1995)
Coauthor Index
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