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2020 – today
- 2024
- [c98]Bram Nauta:
1.2 Racing Down the Slopes of Moore's Law. ISSCC 2024: 16-23 - [c97]Stef van Zanten, Ronan A. R. van der Zee, Bram Nauta:
5.5 A Stacking Mixer-First Receiver Achieving >20dBm Adjacent-Channel IIP3 Consuming less than 25mW. ISSCC 2024: 96-98 - 2023
- [j127]Joep Zanen, Eric A. M. Klumperink, Bram Nauta:
A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation. IEEE J. Solid State Circuits 58(8): 2214-2225 (2023) - [j126]Alexander S. Delke, Thomas J. Hoen, Anne-Johan Annema, Yanyu Jin, Jos Verlinden, Bram Nauta:
A Single-Trim Frequency Reference System With 0.7 ppm/°C From -63 °C to 165 °C Consuming 210 μW at 70 MHz. IEEE J. Solid State Circuits 58(9): 2585-2596 (2023) - [j125]Shubham Yadav, Patrice Abbie D. Legaspi, Mark S. Oude Alink, André B. J. Kokkeler, Bram Nauta:
Hardware Implementations for Voice Activity Detection: Trends, Challenges and Outlook. IEEE Trans. Circuits Syst. I Regul. Pap. 70(3): 1083-1096 (2023) - [c96]Maryam Dodangeh, Mark S. Oude Alink, Jan Prummel, Bram Nauta:
A 50μW 2.45GHz Direct-Conversion RX with On-Chip LO with -84dBm Sensitivity for 1Mb/s GFSK. ESSCIRC 2023: 41-44 - [c95]Jelle H. T. Bakker, Mark S. Oude Alink, Jurriaan Schmitz, Bram Nauta:
Characterisation of Photodiodes in 22 nm FDSOI at 850 nm. ESSDERC 2023: 65-68 - [c94]Wouter T. Overeem, Mark S. Oude Alink, Bram Nauta:
Inverter Chain Buffer Optimization for N-path Filter Switch Drivers and Validation through Simulations in 22nm FD-SOI Technology. ISCAS 2023: 1-5 - 2022
- [j124]Vijaya Kumar Purushothaman, Eric A. M. Klumperink, Roel Plompen, Bram Nauta:
Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain. IEEE J. Solid State Circuits 57(1): 245-259 (2022) - [j123]Anoop Narayan Bhat, Ronan A. R. van der Zee, Bram Nauta:
A 22-nm FDSOI CMOS Low-Noise Active Balun Achieving p-p Output Swing Over 0.01-5.4-GHz for Direct RF Sampling Applications. IEEE J. Solid State Circuits 57(5): 1432-1445 (2022) - [j122]Maikel Huiskamp, Mark S. Oude Alink, Bram Nauta, Anne-Johan Annema, Harijot Singh Bindra:
Reconstructing Aliased Frequency Spectra by Using Multiple Sample Rates. IEEE Trans. Circuits Syst. I Regul. Pap. 69(3): 999-1012 (2022) - [c93]Harijot Singh Bindra, Jeroen Ponte, Bram Nauta:
A 174μVRMS Input Noise, 1 G8/s Comparator in 22nm FDSOI with a Dynamic-Bias Preamplifier Using Tail Charge Pump and Capacitive Neutralization Across the Latch. ISSCC 2022: 1-3 - [c92]Maryam Dodangeh, Mark S. Oude Alink, Bram Nauta:
Quantifying the Trade-off Between Latency and Power Consumption in Bluetooth Low Energy and Its Mitigation by Using a Wake-Up Receiver. WF-IoT 2022: 1-8 - 2021
- [j121]Vijaya Kumar Purushothaman, Mina R. M. Mikhael, Mark S. Oude Alink, Eric A. M. Klumperink, André B. J. Kokkeler, Bram Nauta:
Multi-Receiver Cross-Correlation Technique for (B)FSK Radios. IEEE Access 9: 96791-96798 (2021) - [j120]Christiaan E. Lokin, Daniël Schinkel, Ronan A. R. van der Zee, Bram Nauta:
Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology. IEEE Access 9: 108101-108111 (2021) - [j119]Sajad Golabighezelahmad, Eric A. M. Klumperink, Bram Nauta:
A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming. IEEE J. Solid State Circuits 56(5): 1527-1540 (2021) - [j118]Anoop Narayan Bhat, Ronan A. R. van der Zee, Bram Nauta:
A Baseband-Matching-Resistor Noise-Canceling Receiver With a Three-Stage Inverter-Only OpAmp for High In-Band IIP3 and Wide IF Applications. IEEE J. Solid State Circuits 56(7): 1994-2006 (2021) - [j117]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta:
2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter. IEEE J. Solid State Circuits 56(7): 2007-2017 (2021) - [j116]Joeri Lechevallier, Harijot Singh Bindra, Ronan A. R. van der Zee, Bram Nauta:
Energy Efficient Startup of Crystal Oscillators Using Stepwise Charging. IEEE J. Solid State Circuits 56(8): 2427-2437 (2021) - [j115]Alexander S. Delke, Anne-Johan Annema, Mark S. Oude Alink, Yanyu Jin, Jos Verlinden, Bram Nauta:
A Single-Trim Frequency Reference Achieving ±120 ppm Accuracy From -50 °C to 170 °C. IEEE J. Solid State Circuits 56(11): 3434-3444 (2021) - [j114]Joep Zanen, Eric A. M. Klumperink, Bram Nauta:
Power Efficiency Model for MIMO Transmitters Including Memory Polynomial Digital Predistortion. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1183-1187 (2021) - 2020
- [j113]Vijaya Kumar Purushothaman, Eric A. M. Klumperink, Berta Trullas Clavera, Bram Nauta:
A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer. IEEE J. Solid State Circuits 55(5): 1139-1150 (2020) - [j112]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta:
Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR. IEEE J. Solid State Circuits 55(7): 1785-1795 (2020) - [j111]Jeroen Ponte, Ali Ghahremani, Maikel Huiskamp, Anne-Johan Annema, Bram Nauta:
Theory and Implementation of a Load-Mismatch Protective Class-E PA System. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 369-377 (2020) - [j110]Christiaan E. Lokin, Ronan A. R. van der Zee, Daniël Schinkel, Bram Nauta:
EMI Reduction in Class-D Amplifiers by Actively Reducing PWM Ripple. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(3): 765-773 (2020) - [j109]Joep Zanen, Eric A. M. Klumperink, Bram Nauta:
Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs. IEEE Trans. Circuits Syst. II Express Briefs 67-II(10): 1904-1908 (2020) - [c91]Alexander S. Delke, Anne-Johan Annema, Mark S. Oude Alink, Yanyu Jin, Jos Verlinden, Bram Nauta:
A Colpitts-Based Frequency Reference Achieving a Single-Trim ± 120ppm Accuracy from -50 to 170°C. CICC 2020: 1-4 - [c90]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta:
30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI. ISSCC 2020: 466-468 - [c89]Sajad Golabighezelahmad, Eric A. M. Klumperink, Bram Nauta:
EVM-based Performance Evaluation of Co-channel Interference Mitigation using Spatial Filtering for Digital MIMO Receivers. VTC Fall 2020: 1-5
2010 – 2019
- 2019
- [j108]Saifullah Amir, Ronan A. R. van der Zee, Bram Nauta:
A Self-Oscillating Boosting Amplifier With Adaptive Soft Switching Control for Piezoelectric Transducers. IEEE J. Solid State Circuits 54(1): 253-265 (2019) - [j107]Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta:
High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for N-path Filters/Mixers. IEEE J. Solid State Circuits 54(2): 323-335 (2019) - [j106]Joeri Lechevallier, Ronan A. R. van der Zee, Bram Nauta:
Fast & Energy Efficient Start-Up of Crystal Oscillators by Self-Timed Energy Injection. IEEE J. Solid State Circuits 54(11): 3107-3117 (2019) - [j105]Mohammed Abdulaziz, Eric A. M. Klumperink, Bram Nauta, Henrik Sjöland:
Improving Receiver Close-In Blocker Tolerance by Baseband Gm-C Notch Filtering. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 885-896 (2019) - [j104]Ali Ghahremani, Anne-Johan Annema, Bram Nauta:
A +20 dBm Highly Efficient Linear Outphasing Class-E PA Without AM/AM and AM/PM Characterization Requirements. IEEE Trans. Circuits Syst. II Express Briefs 66-II(7): 1149-1153 (2019) - [j103]Claudia Palattella, Eric A. M. Klumperink, Mark S. Oude Alink, Bram Nauta:
Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3761-3774 (2019) - [c88]Harijot Singh Bindra, Anne-Johan Annema, Gerard Wienk, Bram Nauta, Simon M. Louwsma:
A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply. CICC 2019: 1-4 - [c87]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta:
A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers. ESSCIRC 2019: 171-174 - [c86]Harijot Singh Bindra, Anne-Johan Annema, Simon M. Louwsma, Bram Nauta:
A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator. VLSI Circuits 2019: 74- - 2018
- [j102]Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink:
A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. IEEE J. Solid State Circuits 53(3): 715-727 (2018) - [j101]Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta:
Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback. IEEE J. Solid State Circuits 53(5): 1348-1360 (2018) - [j100]Ali Ghahremani, Anne-Johan Annema, Bram Nauta:
Outphasing Class-E Power Amplifiers: From Theory to Back-Off Efficiency Improvement. IEEE J. Solid State Circuits 53(5): 1374-1386 (2018) - [j99]Harijot Singh Bindra, Chris E. Lokin, Daniël Schinkel, Anne-Johan Annema, Bram Nauta:
A 1.2-V Dynamic Bias Latch-Type Comparator in 65-nm CMOS With 0.4-mV Input Noise. IEEE J. Solid State Circuits 53(7): 1902-1912 (2018) - [j98]Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta:
Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1574-1578 (2018) - [j97]Maikel Huiskamp, Anne-Johan Annema, Bram Nauta:
A Delay Spread Cancelling Waveform Characterizer for RF Power Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs 65-II(12): 1834-1838 (2018) - [c85]Jeroen Ponte, Ali Ghahremani, Maikel Huiskamp, Anne-Johan Annema, Bram Nauta:
Augmentation of Class-E PA Reliability under Load Mismatch Conditions. ICECS 2018: 33-36 - 2017
- [j96]Michiel C. M. Soer, Eric A. M. Klumperink, Dirk-Jan van den Broek, Bram Nauta, Frank E. van Vliet:
Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion. IEEE J. Solid State Circuits 52(3): 735-746 (2017) - [j95]Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta:
Hardware Implementation Overhead of Switchable Matching Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1152-1163 (2017) - [c84]Harijot Singh Bindra, Joeri Lechevallier, Anne-Johan Annema, Simon M. Louwsma, Ed van Tuijl, Bram Nauta:
Range pre-selection sampling technique to reduce input drive energy for SAR ADCs. A-SSCC 2017: 217-220 - [c83]Reda Kasri, Eric A. M. Klumperink, Philippe Cathelin, Eric Toumier, Bram Nauta:
A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers. CICC 2017: 1-4 - [c82]Eric A. M. Klumperink, Hugo J. Westerveld, Bram Nauta:
N-path filters and mixer-first receivers: A review. CICC 2017: 1-8 - [c81]Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink:
Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking. CICC 2017: 1-4 - [c80]Harijot Singh Bindra, Chris E. Lokin, Anne-Johan Annema, Bram Nauta:
A 30fJ/comparison dynamic bias comparator. ESSCIRC 2017: 71-74 - [c79]Harijot Singh Bindra, Anne-Johan Annema, Simon M. Louwsma, Ed J. M. van Tuijl, Bram Nauta:
An energy reduced sampling technique applied to a 10b 1MS/s SAR ADC. ESSCIRC 2017: 235-238 - [c78]Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta:
24.3 A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio. ISSCC 2017: 412-413 - 2016
- [j94]Andrea Mazzanti, Bram Nauta, Stefan Rusu:
Introduction to the Special Issue on the 41st European Solid-State Circuits Conference (ESSCIRC). IEEE J. Solid State Circuits 51(7): 1511-1513 (2016) - [j93]Dawei Ye, Ronan A. R. van der Zee, Bram Nauta:
A 915 MHz 175 µW Receiver Using Transmitted-Reference and Shifted Limiters for 50 dB In-Band Interference Tolerance. IEEE J. Solid State Circuits 51(12): 3114-3124 (2016) - [c77]Vishal Agarwal, Anne-Johan Annema, Satadal Dutta, Raymond J. E. Hueting, Lis K. Nanver, Bram Nauta:
Random Telegraph Signal phenomena in avalanche mode diodes: Application to SPADs. ESSDERC 2016: 264-267 - [c76]Dawei Ye, Ronan A. R. van der Zee, Bram Nauta:
26.2 An Ultra-Low-Power receiver using transmitted-reference and shifted limiters for in-band interference resilience. ISSCC 2016: 438-439 - 2015
- [j92]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency. IEEE J. Solid State Circuits 50(3): 693-703 (2015) - [j91]Erik Olieman, Anne-Johan Annema, Bram Nauta:
An Interleaved Full Nyquist High-Speed DAC Technique. IEEE J. Solid State Circuits 50(3): 704-713 (2015) - [j90]Jiayoon Zhiyu Ru, Claudia Palattella, Paul F. J. Geraedts, Eric A. M. Klumperink, Bram Nauta:
A High-Linearity Digital-to-Time Converter Technique: Constant-Slope Charging. IEEE J. Solid State Circuits 50(6): 1412-1423 (2015) - [j89]Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta:
A High-Voltage Class-D Power Amplifier With Switching Frequency Regulation for Improved High-Efficiency Output Power Range. IEEE J. Solid State Circuits 50(6): 1451-1462 (2015) - [j88]Harish Kundur Subramaniyan, Eric A. M. Klumperink, Venkatesh Srinivasan, Ali Kiaei, Bram Nauta:
RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations. IEEE J. Solid State Circuits 50(11): 2591-2602 (2015) - [j87]Dirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta:
An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation. IEEE J. Solid State Circuits 50(12): 3003-3014 (2015) - [j86]Lammert Duipmans, Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(1): 263-272 (2015) - [j85]Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta:
On the Minimum Number of States for Switchable Matching Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(2): 433-440 (2015) - [j84]Claudia Palattella, Eric A. M. Klumperink, Jiayun Ru, Bram Nauta:
A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation. IEEE Trans. Circuits Syst. II Express Briefs 62-II(8): 741-745 (2015) - [c75]Xiang Gao, Eric A. M. Klumperink, Bram Nauta:
Sub-sampling PLL techniques. CICC 2015: 1-8 - [c74]Bram Nauta:
Multiphase RF techniques in CMOS: Applied to beam-forming and full duplex receivers: CICC 2015 educational session. CICC 2015: 1-147 - [c73]Björn Debaillie, Barend van Liempd, Benjamin P. Hershberg, Jan Craninckx, Kari Rikkinen, D. J. van den Broek, Eric A. M. Klumperink, Bram Nauta:
In-band full-duplex transceiver technology for 5G mobile networks. ESSCIRC 2015: 84-87 - [c72]Dirk-Jan van den Broek, Eric A. M. Klumperink, Bram Nauta:
19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakage. ISSCC 2015: 1-3 - [c71]Joeri Lechevallier, Remko E. Struiksma, Hani Sherry, Andreia Cathelin, Eric A. M. Klumperink, Bram Nauta:
5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply. ISSCC 2015: 1-3 - 2014
- [j83]Eric A. M. Klumperink, Bram Nauta:
Software defined radio receivers exploiting noise cancelling: A tutorial review. IEEE Commun. Mag. 52(10): 111-117 (2014) - [j82]Ramen Dutta, Ronan A. R. van der Zee, André B. J. Kokkeler, Mark J. Bentum, Eric A. M. Klumperink, Bram Nauta:
An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(3): 248-261 (2014) - [j81]Paul F. J. Geraedts, Ed J. M. van Tuijl, Eric A. M. Klumperink, Gerard J. M. Wienk, Bram Nauta:
Towards minimum achievable phase noise of relaxation oscillators. Int. J. Circuit Theory Appl. 42(3): 238-257 (2014) - [j80]Björn Debaillie, Dirk-Jan van den Broek, Cristina Lavin, Barend van Liempd, Eric A. M. Klumperink, Carmen Palacios, Jan Craninckx, Bram Nauta, Aarno Pärssinen:
Analog/RF Solutions Enabling Compact Full-Duplex Radios. IEEE J. Sel. Areas Commun. 32(9): 1662-1673 (2014) - [j79]Saqib Subhan, Eric A. M. Klumperink, Amir Ghaffari, Gerard J. M. Wienk, Bram Nauta:
A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving <-40 dBc for ALL Harmonics. IEEE J. Solid State Circuits 49(3): 595-607 (2014) - [j78]Dlovan H. Mahrof, Eric A. M. Klumperink, Zhiyu Ru, Mark S. Oude Alink, Bram Nauta:
Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity. IEEE J. Solid State Circuits 49(5): 1112-1124 (2014) - [j77]Amir Ghaffari, Eric A. M. Klumperink, Frank E. van Vliet, Bram Nauta:
A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs. IEEE J. Solid State Circuits 49(6): 1303-1316 (2014) - [j76]Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta:
Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage. IEEE J. Solid State Circuits 49(7): 1514-1524 (2014) - [j75]P. V. Ananda Mohan, Eric A. M. Klumperink, Dlovan H. Mahrof, Bram Nauta:
Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity". IEEE J. Solid State Circuits 49(9): 2083 (2014) - [c70]Harish Kundur Subramaniyan, Eric A. M. Klumperink, Bram Nauta, Venkatesh Srinivasan, Ali Kiaei:
RF transconductor linearization technique robust to process, voltage and temperature variations. A-SSCC 2014: 333-336 - [c69]Bram Nauta:
Reconfigurable SDR front-end techniques. CICC 2014: 1-103 - [c68]Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering. ESSCIRC 2014: 223-226 - [c67]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming. ISSCC 2014: 66-67 - [c66]Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta:
17.1 An integrated 80V 45W class-D power amplifier with optimal-efficiency-tracking switching frequency regulation. ISSCC 2014: 286-287 - [c65]Erik Olieman, Anne-Johan Annema, Bram Nauta:
A 110mW, 0.04mm2, 11GS/s 9-bit interleaved DAC in 28nm FDSOI with >50dB SFDR across Nyquist. VLSIC 2014: 1-2 - 2013
- [j74]Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Gerard J. M. Smit, Bram Nauta:
Spectrum Sensing With High Sensitivity and Interferer Robustness Using Cross-Correlation Energy Detection. IEEE J. Emerg. Sel. Topics Circuits Syst. 3(4): 566-575 (2013) - [j73]Wei Cheng, Mark S. Oude Alink, Anne-Johan Annema, Gerard Wienk, Bram Nauta:
A Wideband IM3 Cancellation Technique for CMOS Π- and T-Attenuators. IEEE J. Solid State Circuits 48(2): 358-368 (2013) - [j72]Amir Ghaffari, Eric A. M. Klumperink, Bram Nauta:
Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification. IEEE J. Solid State Circuits 48(6): 1370-1382 (2013) - [j71]Wei Cheng, Anne-Johan Annema, Gerard Wienk, Bram Nauta:
A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance. IEEE J. Solid State Circuits 48(10): 2390-2402 (2013) - [j70]Milad Darvishi, Ronan A. R. van der Zee, Bram Nauta:
Design of Active N-Path Filters. IEEE J. Solid State Circuits 48(12): 2962-2976 (2013) - [j69]Ramen Dutta, Eric A. M. Klumperink, Xiang Gao, Zhiyu Ru, Ronan A. R. van der Zee, Bram Nauta:
Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic. IEEE Trans. Circuits Syst. II Express Briefs 60-II(7): 422-426 (2013) - [j68]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
Frequency Limitations of First-Order gm - RC All-Pass Delay Circuits. IEEE Trans. Circuits Syst. II Express Briefs 60-II(9): 572-576 (2013) - [c64]Haifeng Ma, Ronan A. R. van der Zee, Bram Nauta:
An integrated 80-V class-D power output stage with 94% efficiency in a 0.14µm SOI BCD process. ESSCIRC 2013: 89-92 - [c63]Anantha P. Chandrakasan, Bram Nauta:
Session 1 overview: Plenary session. ISSCC 2013: 6-7 - [c62]Amir Ghaffari, Eric A. M. Klumperink, Frank E. van Vliet, Bram Nauta:
Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB. ISSCC 2013: 84-85 - [c61]Milad Darvishi, Ronan A. R. van der Zee, Bram Nauta:
A 0.1-to-1.2GHz tunable 6th-order N-path channel-select filter with 0.6dB passband ripple and +7dBm blocker tolerance. ISSCC 2013: 172-173 - [c60]Trudy Stetzler, Anantha P. Chandrakasan, Bram Nauta:
EP1: Antiques from the innovations attic. ISSCC 2013: 514 - [c59]Bram Nauta, Trudy Stetzler:
International technical program committee. ISSCC 2013: 525-526 - 2012
- [j67]Milad Darvishi, Ronan A. R. van der Zee, Eric A. M. Klumperink, Bram Nauta:
Widely Tunable 4th Order Switched Gm-C Band-Pass Filter Based on N-Path Filters. IEEE J. Solid State Circuits 47(12): 3105-3119 (2012) - [j66]Shadi Youssef, Ronan A. R. van der Zee, Bram Nauta:
Active Feedback Technique for RF Channel Selection in Front-End Receivers. IEEE J. Solid State Circuits 47(12): 3130-3144 (2012) - [j65]Mark S. Oude Alink, Eric A. M. Klumperink, André B. J. Kokkeler, Michiel C. M. Soer, Gerard J. M. Smit, Bram Nauta:
A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(3): 479-492 (2012) - [j64]Wei Cheng, Mark S. Oude Alink, Anne-Johan Annema, Jeroen A. Croon, Bram Nauta:
RF Circuit Linearity Optimization Using a General Weak Nonlinearity Model. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10): 2340-2353 (2012) - [c58]Shuichi Fukuda, Shinji Miya, Miho Io, Koichi Hamashita, Bram Nauta:
Direct-digital modulation (DIDIMO) transmitter with -156dBc/Hz Rx-band noise using FIR structure. ESSCIRC 2012: 53-56 - [c57]Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Zhiyu Ru, Wei Cheng, Bram Nauta:
Improving harmonic rejection for spectrum sensing using crosscorrelation. ESSCIRC 2012: 361-364 - [c56]Amir Ghaffari, Eric A. M. Klumperink, Bram Nauta:
8-Path tunable RF notch filters for blocker suppression. ISSCC 2012: 76-78 - [c55]Wei Cheng, Mark S. Oude Alink, Anne-Johan Annema, Gerard Wienk, Bram Nauta:
A wideband IM3 cancellation technique for CMOS attenuators. ISSCC 2012: 78-80 - [c54]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
A 1-to-2.5GHz phased-array IC based on gm-RC all-pass time-delay cells. ISSCC 2012: 80-82 - [c53]Shadi Youssef, Ronan A. R. van der Zee, Bram Nauta:
Active feedback receiver with integrated tunable RF channel selectivity, distortion cancelling, 48dB stopband rejection and >+12dBm wideband IIP3, occupying 2 in 65nm CMOS. ISSCC 2012: 166-168 - [c52]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS. ISSCC 2012: 174-176 - [c51]Milad Darvishi, Ronan A. R. van der Zee, Eric A. M. Klumperink, Bram Nauta:
A 0.3-to-1.2GHz tunable 4th-order switched gm-C bandpass filter with >55dB ultimate rejection and out-of-band IIP3 of +29dBm. ISSCC 2012: 358-360 - [c50]Fawzi Houfaf, Mathieu Egot, Andreas Kaiser, Andreia Cathelin, Bram Nauta:
A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications. ISSCC 2012: 362-364 - 2011
- [j63]Amir Ghaffari, Eric A. M. Klumperink, Michiel C. M. Soer, Bram Nauta:
Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification. IEEE J. Solid State Circuits 46(5): 998-1010 (2011) - [j62]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta:
A 65-nm CMOS Temperature-Compensated Mobility-Based Frequency Reference for Wireless Sensor Networks. IEEE J. Solid State Circuits 46(7): 1544-1552 (2011) - [j61]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator. IEEE J. Solid State Circuits 46(12): 2933-2942 (2011) - [j60]Wei Cheng, Anne-Johan Annema, Jeroen A. Croon, Bram Nauta:
Noise and Nonlinearity Modeling of Active Mixers for Fast and Accurate Estimation. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(2): 276-289 (2011) - [j59]Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Gerard J. M. Smit, Bram Nauta:
Lowering the SNR Wall for Energy Detection Using Cross-Correlation. IEEE Trans. Veh. Technol. 60(8): 3748-3757 (2011) - [c49]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta:
Effects of packaging and process spread on a mobility-based frequency reference in 0.16-μm CMOS. ESSCIRC 2011: 511-514 - [c48]Fabian van Houwelingen, Ed van Tuijl, Bram Nauta, Maarten Vertregt:
A narrow-to-wideband scrambling technique increasing software radio receiver linearity. ESSCIRC 2011: 535-538 - [c47]Eric A. M. Klumperink, Ramen Dutta, Zhiyu Ru, Bram Nauta, Xiang Gao:
Jitter-Power minimization of digital frequency synthesis architectures. ISCAS 2011: 165-168 - [c46]Saqib Subhan, Eric A. M. Klumperink, Bram Nauta:
Towards suppression of all harmonics in a polyphase multipath transmitter. ISCAS 2011: 2185-2188 - [c45]Michiel C. M. Soer, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution. ISSCC 2011: 64-66 - [c44]Mark S. Oude Alink, A. R. Smeenge, André B. J. Kokkeler, Eric A. M. Klumperink, Gerard J. M. Smit, Bram Nauta:
Exploring the Use of Two Antennas for Crosscorrelation Spectrum Sensing. VTC Fall 2011: 1-5 - 2010
- [j58]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta:
Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects. IEEE J. Solid State Circuits 45(2): 447-457 (2010) - [j57]Zhiyu Ru, Eric A. M. Klumperink, Carlos E. Saavedra, Bram Nauta:
A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver. IEEE J. Solid State Circuits 45(5): 967-978 (2010) - [j56]Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta:
A 10-bit Charge-Redistribution ADC Consuming 1.9 μ W at 1 MS/s. IEEE J. Solid State Circuits 45(5): 1007-1015 (2010) - [j55]Salvatore Drago, Domine Leenaerts, Bram Nauta, Fabio Sebastiano, Kofi A. A. Makinwa, Lucien J. Breems:
A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS. IEEE J. Solid State Circuits 45(7): 1305-1315 (2010) - [j54]Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta:
Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio. IEEE J. Solid State Circuits 45(9): 1732-1745 (2010) - [j53]Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta:
Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector. IEEE J. Solid State Circuits 45(9): 1809-1821 (2010) - [j52]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta:
A 1.2-V 10-μ W NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2°C (3 Sigma ) From - 70°C to 125°C. IEEE J. Solid State Circuits 45(12): 2591-2601 (2010) - [j51]Michiel C. M. Soer, Eric A. M. Klumperink, Pieter-Tjerk de Boer, Frank E. van Vliet, Bram Nauta:
Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(10): 2618-2631 (2010) - [c43]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta:
A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor Networks. ESSCIRC 2010: 102-105 - [c42]Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet:
Time delay circuits: A quality criterion for delay variations versus frequency. ISCAS 2010: 4281-4284 - [c41]Salvatore Drago, Domine M. W. Leenaerts, Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Bram Nauta:
A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with -82dBm sensitivity for crystal-less wireless sensor nodes. ISSCC 2010: 224-225 - [c40]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta:
A 1.2V 10µW NPN-based temperature sensor in 65nm CMOS with an inaccuracy of ±0.2°C (3s) from -70°C to 125°C. ISSCC 2010: 312-313 - [c39]Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta:
Spur-reduction techniques for PLLs using sub-sampling phase detection. ISSCC 2010: 474-475
2000 – 2009
- 2009
- [j50]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 44(2): 319 (2009) - [j49]Rameswor Shrestha, Ronan A. R. van der Zee, Anton de Graauw, Bram Nauta:
A Wideband Supply Modulator for 20 MHz RF Bandwidth Polar PAs in 65 nm CMOS. IEEE J. Solid State Circuits 44(4): 1272-1280 (2009) - [j48]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 44(6): 1667 (2009) - [j47]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine M. W. Leenaerts, Bram Nauta:
A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios. IEEE J. Solid State Circuits 44(7): 2002-2009 (2009) - [j46]Bram Nauta:
New Associate Editors. IEEE J. Solid State Circuits 44(9): 2263-2264 (2009) - [j45]Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta:
A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N2. IEEE J. Solid State Circuits 44(12): 3253-3263 (2009) - [j44]Zhiyu Ru, Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta:
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference. IEEE J. Solid State Circuits 44(12): 3359-3375 (2009) - [j43]Xiang Gao, Eric A. M. Klumperink, Paul F. J. Geraedts, Bram Nauta:
Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops. IEEE Trans. Circuits Syst. II Express Briefs 56-II(2): 117-121 (2009) - [j42]Salvatore Drago, Fabio Sebastiano, Lucien J. Breems, Domine Leenaerts, Kofi A. A. Makinwa, Bram Nauta:
Impulse-Based Scheme for Crystal-Less ULP Radios. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 1041-1052 (2009) - [j41]Mark S. Oude Alink, André B. J. Kokkeler, Eric A. M. Klumperink, Kenneth C. Rovers, Gerard J. M. Smit, Bram Nauta:
Spurious-Free Dynamic Range of a Uniform Quantizer. IEEE Trans. Circuits Syst. II Express Briefs 56-II(6): 434-438 (2009) - [j40]Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta:
Low-Power, High-Speed Transceivers for Network-on-Chip Communication. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 12-21 (2009) - [c38]Salvatore Drago, Domine Leenaerts, Bram Nauta, Fabio Sebastiano, Kofi A. A. Makinwa, Lucien J. Breems:
A 200 µA duty-cycled PLL for wireless sensor nodes. ESSCIRC 2009: 132-135 - [c37]Paul Veldhorst, George Goksun, Anne-Johan Annema, Bram Nauta, Berry A. J. Buter, Maarten Vertregt:
A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior. ESSCIRC 2009: 464-467 - [c36]Michiel C. M. Soer, Eric A. M. Klumperink, Zhiyu Ru, Frank E. van Vliet, Bram Nauta:
A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF. ISSCC 2009: 222-223 - [c35]Zhiyu Ru, Eric A. M. Klumperink, Gerard Wienk, Bram Nauta:
A software-defined radio receiver architecture robust to out-of-band interference. ISSCC 2009: 230-231 - [c34]Niels A. Moseley, Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta:
A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation. ISSCC 2009: 232-233 - [c33]Anne-Johan Annema, Paul Veldhorst, Gerben Doornbos, Bram Nauta:
A sub-1V bandgap voltage reference in 32nm FinFET technology. ISSCC 2009: 332-333 - [c32]Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta:
A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS. ISSCC 2009: 392-393 - 2008
- [j39]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 43(2): 311 (2008) - [j38]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 43(3): 578 (2008) - [j37]Simon M. Louwsma, A. J. M. van Tuijl, Maarten Vertregt, Bram Nauta:
A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS. IEEE J. Solid State Circuits 43(4): 778-786 (2008) - [j36]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 43(5): 1051 (2008) - [j35]Bram Nauta, Willy Sansen:
Retraction of Papers With Falsified Information. IEEE J. Solid State Circuits 43(6): 1339 (2008) - [j34]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 43(6): 1340 (2008) - [j33]Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine M. W. Leenaerts, Bram Nauta:
Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling. IEEE J. Solid State Circuits 43(6): 1341-1350 (2008) - [j32]Bram Nauta:
New Associate Editor. IEEE J. Solid State Circuits 43(11): 2351 (2008) - [j31]Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine M. W. Leenaerts, Bram Nauta:
The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology. IEEE J. Solid State Circuits 43(12): 2706-2715 (2008) - [j30]Xiang Gao, Bram Nauta, Eric A. M. Klumperink:
Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation. IEEE Trans. Circuits Syst. II Express Briefs 55-II(3): 244-248 (2008) - [j29]Ettore Lorenzo Firrao, Bram Nauta:
An Automatic Antenna Tuning System Using Only RF Signal Amplitudes. IEEE Trans. Circuits Syst. II Express Briefs 55-II(9): 833-837 (2008) - [j28]Niels A. Moseley, Eric A. M. Klumperink, Bram Nauta:
A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 55-II(10): 966-970 (2008) - [j27]Amorn Jiraseree-amornkun, Apisak Worapishet, Eric A. M. Klumperink, Bram Nauta, Wanlop Surakampontorn:
Theoretical Analysis of Highly Linear Tunable Filters Using Switched-Resistor Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3641-3654 (2008) - [c31]Wei Cheng, Anne-Johan Annema, Jeroen A. Croon, Dirk B. M. Klaassen, Bram Nauta:
A general weak nonlinearity model for LNAs. CICC 2008: 221-224 - [c30]Fabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta:
A low-voltage mobility-based frequency reference for crystal-less ULP radios. ESSCIRC 2008: 306-309 - [c29]Fabio Sebastiano, Salvatore Drago, Lucien J. Breems, Domine Leenaerts, Kofi A. A. Makinwa, Bram Nauta:
Impulse based scheme for crystal-less ULP radios. ISCAS 2008: 1508-1511 - [c28]Wei Cheng, Anne-Johan Annema, Bram Nauta:
A multi-step P-cell for LNA design automation. ISCAS 2008: 2550-2553 - [c27]Michiel van Elzakker, Ed van Tuijl, Paul F. J. Geraedts, Daniël Schinkel, Eric A. M. Klumperink, Bram Nauta:
A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC. ISSCC 2008: 244-245 - [c26]Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta:
A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection. ISSCC 2008: 322-323 - [c25]Stephan C. Blaakmeer, Eric A. M. Klumperink, Domine Leenaerts, Bram Nauta:
A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS. ISSCC 2008: 326-327 - [c24]Paul F. J. Geraedts, Ed van Tuijl, Eric A. M. Klumperink, Gerard Wienk, Bram Nauta:
A 90μW 12MHz Relaxation Oscillator with a -162dB FOM. ISSCC 2008: 348-349 - [c23]Mustafa Acar, Anne-Johan Annema, Bram Nauta:
Digital Detection of Oxide Breakdown and Life-Time Extension in Submicron CMOS Technology. ISSCC 2008: 530-531 - 2007
- [j26]Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Vincent J. Arkesteijn, Bram Nauta:
Cognitive radios for dynamic spectrum access - polyphase multipath radio circuits for dynamic spectrum access. IEEE Commun. Mag. 45(5): 104-112 (2007) - [j25]Arnoud P. van der Wel, Eric A. M. Klumperink, Jay S. Kolhatkar, Eric Hoekstra, Martijn F. Snoeij, Cora Salm, Hans Wallinga, Bram Nauta:
Low-Frequency Noise Phenomena in Switched MOSFETs. IEEE J. Solid State Circuits 42(3): 540-550 (2007) - [j24]Bram Nauta:
Message from the Incoming Editor-in-Chief. IEEE J. Solid State Circuits 42(8): 1632 (2007) - [j23]Mustafa Acar, Anne-Johan Annema, Bram Nauta:
Analytical Design Equations for Class-E Power Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(12): 2706-2717 (2007) - [j22]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta:
Optimal Positions of Twists in Global On-Chip Differential Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 15(4): 438-446 (2007) - [c22]Simon M. Louwsma, Ed van Tuijl, Maarten Vertregt, Bram Nauta:
A Time-Interleaved Track & hold in 0.13 μm CMOS sub-sampling a 4 GHz signal with 43 dB SNDR. CICC 2007: 329-332 - [c21]Stephan C. Blaakmeer, Eric A. M. Klumperink, Bram Nauta, Domine M. W. Leenaerts:
An inductorless wideband balun-LNA in 65nm CMOS with balanced output. ESSCIRC 2007: 364-367 - [c20]Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Gerard Wienk, Zhiyu Ru, Bram Nauta:
Multipath Polyphase Circuits and their Application to RF Transceivers. ISCAS 2007: 273-276 - [c19]Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta:
On the Suitability of Discrete-Time Receivers for Software-Defined Radio. ISCAS 2007: 2522-2525 - [c18]Mustafa Acar, Anne-Johan Annema, Bram Nauta:
Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance. ISCAS 2007: 2818-2821 - [c17]Xiang Gao, Eric A. M. Klumperink, Bram Nauta:
Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. ISCAS 2007: 2854-2857 - [c16]Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta:
A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time. ISSCC 2007: 314-605 - [c15]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta:
A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects. ISSCC 2007: 414-612 - [c14]Ian Galton, Matt Miller, Robert Bogdan Staszewski, Bram Nauta, Michiel Steyaert:
Analog, Mixed-Signal, and RF Circuit Design in Nanometer CMOS. ISSCC 2007: 635-636 - 2006
- [j21]Daniël Schinkel, Eisse Mensink, Eric A. M. Klumperink, Ed J. M. van Tuijl, Bram Nauta:
A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects. IEEE J. Solid State Circuits 41(1): 297-306 (2006) - [j20]Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta:
Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS. IEEE J. Solid State Circuits 41(4): 990-999 (2006) - [j19]Rameswor Shrestha, Eric A. M. Klumperink, Eisse Mensink, Gerard J. M. Wienk, Bram Nauta:
A Polyphase Multipath Technique for Software-Defined Radio Transmitters. IEEE J. Solid State Circuits 41(12): 2681-2692 (2006) - [j18]Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta:
Jitter requirements of the sampling clock in software radio receivers. IEEE Trans. Circuits Syst. II Express Briefs 53-II(2): 90-94 (2006) - [c13]Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta:
Wireline Equalization using Pulse-Width Modulation. CICC 2006: 591-598 - [c12]Mustafa Acar, Anne-Johan Annema, Bram Nauta:
Generalized Analytical Design Equations for Variable Slope Class-E Power Amplifiers. ICECS 2006: 431-434 - [c11]Amorn Jiraseree-amornkun, Apisak Worapishet, Eric A. M. Klumperink, Bram Nauta, Wanlop Surakampontorn:
Slew rate induced distortion in switched-resistor integrators. ISCAS 2006 - [c10]Rameswor Shrestha, Eisse Mensink, Eric A. M. Klumperink, Gerard J. M. Wienk, Bram Nauta:
A multipath technique for canceling harmonics and sidebands in a wideband power upconverter. ISSCC 2006: 1800-1809 - 2005
- [j17]Anne-Johan Annema, Bram Nauta, Ronald van Langevelde, Hans Tuinhout:
Analog circuits in ultra-deep-submicron CMOS. IEEE J. Solid State Circuits 40(1): 132-143 (2005) - [j16]Sasa Radovanovic, Anne-Johan Annema, Bram Nauta:
A 3-Gb/s optical detector in standard CMOS for 850-nm optical communication. IEEE J. Solid State Circuits 40(8): 1706-1717 (2005) - [j15]Sasa Radovanovic, Anne-Johan Annema, Bram Nauta:
Bandwidth of integrated photodiodes in standard CMOS for CD/DVD applications. Microelectron. Reliab. 45(3-4): 705-710 (2005) - [j14]Eisse Mensink, Eric A. M. Klumperink, Bram Nauta:
Distortion cancellation by polyphase multipath circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(9): 1785-1794 (2005) - [c9]Bram Nauta, Anne-Johan Annema:
Analog/RF circuit design techniques for nanometerscale IC technologies. ESSCIRC 2005: 45-53 - [c8]T. S. Doorn, Ed van Tuijl, Daniël Schinkel, Anne-Johan Annema, Marco Berkhout, Bram Nauta:
An audio FIR-DAC in a BCD process for high power class-D amplifiers. ESSCIRC 2005: 459-462 - [c7]Eisse Mensink, Daniël Schinkel, Eric A. M. Klumperink, Ed van Tuijl, Bram Nauta:
Optimally-placed twists in global on-chip differential interconnects. ESSCIRC 2005: 475-478 - [c6]Jan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta:
Jitter limitations on multi-carrier modulation. ISCAS (6) 2005: 6090-6093 - 2004
- [j13]Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta:
Wide-band CMOS low-noise amplifier exploiting thermal noise canceling. IEEE J. Solid State Circuits 39(2): 275-282 (2004) - [j12]Arnoud P. van der Wel, Sander L. J. Gierkink, Robert C. Frye, Vito Boccuzzi, Bram Nauta:
A robust 43-GHz VCO in CMOS for OC-768 SONET applications. IEEE J. Solid State Circuits 39(7): 1159-1163 (2004) - [j11]Eric A. M. Klumperink, Simon M. Louwsma, Gerard J. M. Wienk, Bram Nauta:
A CMOS switched transconductor mixer. IEEE J. Solid State Circuits 39(8): 1231-1240 (2004) - [j10]Remco C. H. van de Beek, Cicero S. Vaucher, Domine M. W. Leenaerts, Eric A. M. Klumperink, Bram Nauta:
A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-μm CMOS. IEEE J. Solid State Circuits 39(11): 1862-1872 (2004) - [c5]Vincent J. Arkesteijn, Eric A. M. Klumperink, Bram Nauta:
A wideband high-linearity RF receiver front-end in CMOS. ESSCIRC 2004: 71-74 - [c4]Simon M. Louwsma, Ed J. M. van Tuijl, Maarten Vertregt, Peter C. S. Scholtens, Bram Nauta:
A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 μm CMOS [ADC applications]. ESSCIRC 2004: 343-346 - [c3]Eisse Mensink, Eric A. M. Klumperink, Bram Nauta:
Distortion cancellation via polyphase multipath circuits. ISCAS (1) 2004: 1098-1101 - 2003
- [j9]Eric A. M. Klumperink, Bram Nauta:
Systematic comparison of HF CMOS transconductors. IEEE Trans. Circuits Syst. II Express Briefs 50(10): 728-741 (2003) - 2002
- [c2]Stefan Rusu, Manoj Sachdev, Christer Svensson, Bram Nauta:
Trends and Challenges in VLSI Technology Scaling towards 100nm (Tutorial Abstract). ASP-DAC/VLSI Design 2002: 16-17 - 2001
- [j8]Federico Bruccoleri, Eric A. M. Klumperink, Bram Nauta:
Generating all two-MOS-transistor amplifiers leads to new wide-band LNAs. IEEE J. Solid State Circuits 36(7): 1032-1040 (2001) - [c1]Eric A. M. Klumperink, Federico Bruccoleri, Bram Nauta:
Finding all elementary circuits exploiting transconductance. ISCAS (1) 2001: 667-670 - 2000
- [j7]Eric A. M. Klumperink, Sander L. J. Gierkink, Arnoud P. van der Wel, Bram Nauta:
Reducing MOSFET 1/f noise and power consumption by switched biasing. IEEE J. Solid State Circuits 35(7): 994-1001 (2000)
1990 – 1999
- 1999
- [j6]Sander L. J. Gierkink, Eric A. M. Klumperink, Arnoud P. van der Wel, Gian Hoogzaad, Ed A. J. M. van Tuijl, Bram Nauta:
Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators. IEEE J. Solid State Circuits 34(7): 1022-1025 (1999) - 1998
- [j5]Alain Guyot, Bram Nauta:
Guest Editorial. IEEE J. Solid State Circuits 33(7): 935-936 (1998) - [j4]Gerrit W. den Besten, Bram Nauta:
Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC's in 3.3 V CMOS technology. IEEE J. Solid State Circuits 33(7): 956-962 (1998) - [j3]Bram Nauta, Marcel B. Dijkstra:
Analog line driver with adaptive impedance matching. IEEE J. Solid State Circuits 33(12): 1992-1998 (1998) - 1997
- [j2]Clemens H. J. Mensink, Bram Nauta, Hans Wallinga:
A CMOS "soft-switched" transconductor and its application in gain control and filters. IEEE J. Solid State Circuits 32(7): 989-998 (1997) - 1995
- [j1]Bram Nauta, Ardie G. Venes:
A 70-MS/s 110-mW 8-b CMOS folding and interpolating A/D converter. IEEE J. Solid State Circuits 30(12): 1302-1308 (1995)
Coauthor Index
aka: Domine M. W. Leenaerts
aka: Gerard J. M. Wienk
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