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ORCIDRobert Gauthier 0002
Person information
- affiliation: IBM Microelectronics, Essex Junction, Semiconductor Research and Development Center, Systems and Technology Group, VT, USA
Other persons with the same name
- Robert Gauthier 0001
![[0000-0003-4882-8870]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-4882-8870")
(aka: Robert P. Gauthier) — University of Waterloo, Ontario, Canada (and 1 more)
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2020 – today
- 2021
[c9]Sagar Premnath Karalkar, Vishal Ganesan, Milova Paul, Kyong Jin Hwang, Robert Gauthier:
Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power Clamp. IRPS 2021: 1-5- 2020
- [c8]You Li, Meng Miao, Robert Gauthier:
ESD Protection Design Overview in Advanced SOI and Bulk FinFET Technologies. CICC 2020: 1-4 - [c7]Kyong Jin Hwang, Sagar Premnath Karalkar, Vishal Ganesan, Sevashanmugam Marimuthu, Alban Zaka, Tom Herrmann, Bhoopendra Singh, Robert Gauthier:
Design Optimization of MV-NMOS for ESD Self-protection in 28nm CMOS technology. IRPS 2020: 1-4 - [c6]Zhiqing Li, Baofu Zhu, Anindya Nath, Meng Miao, Alain Loiseau, You Li, Jeffrey B. Johnson, Souvick Mitra, Robert Gauthier:
Understanding ESD Induced Thermal Mechanism in FinFETs Through Predictive TCAD Simulation. IRPS 2020: 1-4
2010 – 2019
- 2019
- [c5]Jie Jack Zeng, Ruchil Jain, Kyong Jin Hwang, Robert Gauthier:
A Novel HV-NPN ESD Protection Device with Buried Floating P-Type Implant. IRPS 2019: 1-4 - 2017
- [c4]Ahmed Y. Ginawi, Robert Gauthier, Tian Xia:
Investigation of diode triggered silicon control rectifier turn-on time during ESD events. SoCC 2017: 175-178 - 2014
- [c3]Ahmed Ginawi, Tian Xia, Robert Gauthier:
Reducing the turn-on time and overshoot voltage for a diode-triggered silicon-controlled rectifier during an electrostatic discharge event. SoCC 2014: 109-114 - 2010
- [j7]Tommaso Cilento, M. Schenkel, C. Yun, R. Mishra, Junjun Li, Kiran V. Chatty, Robert Gauthier:
Simulation of ESD protection devices in an advanced CMOS technology using a TCAD workbench based on an ESD calibration methodology. Microelectron. Reliab. 50(9-11): 1367-1372 (2010) - [c2]Ali Khaki-Firooz, Kangguo Cheng, Basanth Jagannathan, Pranita Kulkarni, Jeffrey W. Sleight, Davood Shahrjerdi, Josephine B. Chang, Sungjae Lee, Junjun Li, Huiming Bu, Robert Gauthier, Bruce Doris, Ghavam G. Shahidi:
Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond. ISSCC 2010: 152-153
2000 – 2009
- 2009
- [j6]Adrien Ille, Wolfgang Stadler, Thomas Pompl, Harald Gossner, Tilo Brodbeck, Kai Esmark, Philipp Riess, David Alvarez, Kiran V. Chatty, Robert Gauthier, Alain Bravaix:
Reliability aspects of gate oxide under ESD pulse stress. Microelectron. Reliab. 49(12): 1407-1416 (2009) - [j5]David Alvarez, Kiran V. Chatty, Christian Russ, Michel J. Abou-Khalil, Junjun Li, Robert Gauthier, Kai Esmark, Ralph Halbach, Christopher Seguin:
Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology. Microelectron. Reliab. 49(12): 1417-1423 (2009) - 2007
- [j4]Ciaran J. Brennan, Shunhua Chang, Min Woo, Kiran V. Chatty, Robert Gauthier:
Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90 nm CMOS ASICs. Microelectron. Reliab. 47(7): 1030-1035 (2007) - [j3]Ciaran J. Brennan, Kiran V. Chatty, Jeff Sloan, Paul Dunn, Mujahid Muhammad, Robert Gauthier:
Design automation to suppress cable discharge event (CDE) induced latchup in 90 nm CMOS ASICs. Microelectron. Reliab. 47(7): 1069-1073 (2007) - 2006
- [j2]David Alvarez, Michel J. Abou-Khalil, Christian Russ, Kiran V. Chatty, Robert Gauthier, D. Kontos, Junjun Li, Christopher Seguin, Ralph Halbach:
Analysis of ESD failure mechanism in 65nm bulk CMOS ESD NMOSFETs with ESD implant. Microelectron. Reliab. 46(9-11): 1597-1602 (2006) - 2003
- [j1]Franco Stellari, Peilin Song, Moyra K. McManus, Alan J. Weger, Robert Gauthier, Kiran V. Chatty, Mujahid Muhammad, Pia N. Sanda, Philip Wu, Steven C. Wilson:
Latchup Analysis Using Emission Microscopy. Microelectron. Reliab. 43(9-11): 1603-1608 (2003) - [c1]Franco Stellari, Peilin Song, Moyra K. McManus, Robert Gauthier, Alan J. Weger, Kiran V. Chatty, Mujahid Muhammad, Pia N. Sanda:
Optical and Electrical Testing of Latchup in I/O Interface Circuits. ITC 2003: 236-245
Coauthor Index
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