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Semantic ScholarIRPS 2019: Monterey, CA, USA
IEEE International Reliability Physics Symposium, IRPS 2019, Monterey, CA, USA, March 31 - April 4, 2019. IEEE 2019, ISBN 978-1-5386-9504-3 Sriram Balasubramanian, Hari Balan, Lei Liu, Kevin Khua, Wah-Peng Neo, Dianji Sui, Tze Ho Simon Chan:
Enhanced Fail Rate Projections Using Negative Design Assist in Automotive Grade SRAMs. 1-4Florian Cacho, X. Federspiel, D. Nouguier, C. Diouf:
Investigation of NBTI Dynamic Behavior with Ultra-Fast Measurement. 1-6Louise De Conti, Sorin Cristoloveanu, Maud Vinet, Philippe Galy:
Thin-Film FD-SOI BIMOS Topologies for ESD Protection. 1-5Shinji Yokogawa, Kyosuke Kunii:
A Simple Prediction Method for Chip-Level Electromigration Lifetime Using Generalized Gamma Distribution. 1-6Kin Leong Pey, A. Ranjan, Nagarajan Raghavan, Kalya Shubhakar, Sean J. O'Shea:
Dielectric Breakdown in 2D Layered Hexagonal Boron Nitride - The Knowns and the Unknowns. 1-12Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Zlatan Stanojevic, Alexander Makarov, Adrian Chasin, Erik Bury, Hans Mertens, Dimitri Linten, Guido Groeseneken:
Full (Vg, Vd) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs. 1-7Lili Cheng, Seungman Choi, Sean P. Ogden, Teck Jung Tang, Robert Fox:
Robust BEOL MIMCAP for Long and Controllable TDDB Lifetime. 1-3Balaji Narasimham, K. Chandrasekharan, J. K. Wang, Bharat L. Bhuva:
Soft Error Performance of High-Speed Pulsed-DICE-Latch Design in 16 nm and 7 nm FinFET Processes. 1-4Hai Jiang, Hyun-Chul Sagong, Jinju Kim, Junekyun Park, Sangchul Shin, Sangwoo Pae:
Localized Layout Effect Related Reliability Approach in 8nm FinFETs Technology: From Transistor to Circuit. 1-5A. Kruv, A. Arreghini, M. Gonzalez, D. Verreck, G. Van den bosch, I. De Wolf, A. Furnemont:
Impact of Mechanical Stress on the Electrical Performance of 3D NAND. 1-5Steve Stoffels, Niels Posthuma, Stefaan Decoutere, Benoit Bakeroot, A. N. Tallarico, Enrico Sangiorgi, Claudio Fiegna, J. Zheng, X. Ma, Matteo Borga, Elena Fabris, Matteo Meneghini, Enrico Zanoni, Gaudenzio Meneghesso, Juraj Priesol, Alexander Satka:
Perimeter Driven Transport in the p-GaN Gate as a Limiting Factor for Gate Reliability. 1-10Rui Cao, Jixuan Wu, Wenjing Yang, Jiezhi Chen, Xiangwei Jiang:
Program/Erase Cycling Enhanced Lateral Charge Diffusion in Triple-Level Cell Charge-Trapping 3D NAND Flash Memory. 1-4Yueyang Liu, Xiangwei Jiang, Liwei Wang, Yunfei En, Runsheng Wang:
Distinguishing Interfacial Hole Traps in (110), (100) High-K Gate Stack. 1-4H. W. Wan, Y. J. Hong, L. B. Young, M. Hong, J. Kwo:
Fundamental Understanding of Oxide Defects in HfO2 and Y2O3 on GaAs(001) with High Thermal Stability. 1-4Yefan Liu, Hao Yu, Gaspard Hiblot, Anastasiia Kruv, Marc Schaekers, Naoto Horiguchi, Dimitrios Velenis, Ingrid De Wolf:
Study of the Mechanical Stress Impact on Silicide Contact Resistance by 4-Point Bending. 1-5M. H. Lin, W. S. Chou, Y. T. Yang, A. S. Oates:
Characterization of Critical Peak Current and General Model of Interconnect Systems Under Short Pulse-Width Conditions. 1-7Luca Pirro, A. Zaka, O. Zimmerhackl, T. Hermann, M. Otto, E. M. Bazizi, Jan Hoentschel, X. Li, R. Taylor:
Low-Frequency Noise Reduction in 22FDX®: Impact of Device Geometry and Back Bias. 1-5Kyoji Mizoguchi, Kyosuke Maeda, Ken Takeuchi:
Automatic Data Repair Overwrite Pulse for 3D-TLC NAND Flash Memories with 38x Data-Retention Lifetime Extension. 1-5S. E. Liu, M. H. Hsieh, Y. R. Chen, J. Y. Jao, M. Z. Lin, Y. H. Fang, M. J. Lin:
High Voltage Tolerant Design with Advanced Process for TV Application. 1-4Jyotika Athavale, Riccardo Mariani, Michael Paulitsch:
Flight Safety Certification Implications for Complex Multi-Core Processor Based Avionics Systems. 1-6James P. Ashton, Patrick M. Lenahan, Daniel J. Lichtenwalner, Aivars J. Lelis, Mark A. Anders:
Reliability and Performance Issues in SiC MOSFETs: Insight Provided by Spin Dependent Recombination. 1-5Kaustubh Joshi, Yung-Huei Lee, Yu-Cheng Yao, Shu-Wen Chang, Siao-Syong Bian, P. J. Liao, Jiaw-Ren Shih, Min-Jan Chen:
A Statistical Learning Model for Accurate Prediction of Time-Dependent Dielectric Degradation for Low Failure Rates. 1-6Ernest Y. Wu, Baozhen Li, James H. Stathis, Andrew Kim:
Comprehensive Methodology for Multiple Spots Competing Progressive Breakdown for BEOL/FEOL Applications. 1-8Daniel M. Fleetwood:
Reliability Limiting Defects in MOS Gate Oxides: Mechanisms and Modeling Implications. 1-10Song-Ju Kim, Kaori Ohkoda, Masashi Aono, Hisashi Shima, Makoto Takahashi, Yasuhisa Naitoh, Hiroyuki Akinaga:
Reinforcement Learning System Comprising Resistive Analog Neuromorphic Devices. 1-6Y. Ji, H. J. Goo, J. Lim, S. B. Lee, S. Lee, T. Uemura, J. C. Park, S. I. Han, S. C. Shin, J. H. Lee, Y. J. Song, K. M. Lee, H. M. Shin, S. H. Hwang, B. Y. Seo, Y. K. Lee, J. C. Kim, G. H. Koh, K. C. Park, S. Pae, G. T. Jeong, J. S. Yoon, E. S. Jung:
Reliability of 8Mbit Embedded-STT-MRAM in 28nm FDSOI Technology. 1-3Ajit Kanale, Kijeong Han, B. Jayant Baliga, Subhashish Bhattacharya:
Stability of 4H-SiC JBS Diodes Under Repetitive Avalanche Stress. 1-6Shih-Hung Chen, Dimitri Linten, Geert Hellings, Marco Simicic, Ben Kaczer, Thomas Chiarella, Hans Mertens, Jérôme Mitard, Anda Mocuta, N. Horiguchi:
CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies. 1-7Wen Yang, Jiann-Shiun Yuan, Balakrishnan Krishnan, Patrick Shea:
Low-Side GaN Power Device Dynamic Ron Characteristics Under Different Substrate Biases. 1-7V. B. Naik, J. H. Lim, K. Yamane, D. Zeng, H. Yang, N. Thiyagarajah, J. H. Kwon, N. L. Chung, R. Chao, T. Ling, K. Lee:
Superior Endurance Performance of 22-nm Embedded MRAM Technology. 1-4Shouhei Fukuyama, Atsuna Hayakawa, Ryutaro Yasuhara, Shinpei Matsuda, Hiroshi Kinoshita, Ken Takeuchi:
Comprehensive Analysis of Data-Retention and Endurance Trade-Off of 40nm TaOx-based ReRAM. 1-6Kanghyun Choi, Jongwon Lee, Jongwoo Park:
Nonlinear Mixed Model and Reliability Prediction for OLED Luminance Degradation. 1-4Farid N. Najm, Valeriy Sukharev:
Efficient Simulation of Electromigration Damage in Large Chip Power Grids Using Accurate Physical Models (Invited Paper). 1-10Sridhar Srinivasan, Matthew Hogan:
Physics to Tapeout: The Challenge of Scaling Reliability Verification. 1-5Elnatan Mataev, James H. Stathis, Giuseppe La Rosa, Barry P. Linder:
Long Term NBTI Relaxation Under AC and DC Biased Stress and Recovery. 1-5Jeff Gambino, Derryl D. J. Allman, Gavin D. R. Hall, D. Price, L. Sheng, R. Takada, Y. Kanuma:
Reliability of an Al2O3/SiO2MIM Capacitor for 180nm (3.3V) Technology. 1-5Nam-Hyun Lee, Jongkyun Kim, Donghee Son, Kangjun Kim, Jung Eun Seok:
Comprehensive Study for OFF-State Hot Carrier Degrdation of Scaled nMOSFETs in DRAM. 1-4Alaleh Tajalli, E. Canato, A. Nardo, Matteo Meneghini, Arno Stockman, Peter Moens, Enrico Zanoni, Gaudenzio Meneghesso:
Impact of Sidewall Etching on the Dynamic Performance of GaN-on-Si E-Mode Transistors. 1-6Yuh-Yue Chen, Tsyr-Shyang Liou, Shyh-Chyi Wong:
Novel RC-Clamp Design for High Supply Voltage. 1-6Tonmoy Dhar, Sachin S. Sapatnekar:
Reliability Analysis of a Delay-Locked Loop Under HCI and BTI Degradation. 1-6Young-Joon Park, Jungwoo Joh, Jayhoon Chung, Srikanth Krishnan:
Current Crowding Impact on Electromigration in Al Interconnects. 1-6Carlo Cagli, Luca Perniola, F. Gaillard, S. Duenkel, T. Melde, B. Mueller, M. Trentzsch, S. Wittek, S. Beyer:
Performance Improvement on HfO2-Based 1T Ferroelectric NVM by Electrical Preconditioning. 1-4Venkata Chaitanya Krishna Chekuri, Arvind Singh, Nihar Dasari, Saibal Mukhopadhyay:
On the Effect of NBTI Induced Aging of Power Stage on the Transient Performance of On-Chip Voltage Regulators. 1-5Abhishek Mishra, Adil Meersha, Nagothu Karmel Kranthi, Kruti Trivedi, Harsha B. Variar, N. S. Veenadhari Bellamkonda, Srinivasan Raghavan, Mayank Shrivastava:
First Demonstration and Physical Insights into Time-Dependent Breakdown of Graphene Channel and Interconnects. 1-6Nikolaos Papandreou, Haralampos Pozidis, Thomas P. Parnell, Nikolas Ioannou, Roman A. Pletka, Sasa Tomic, Patrick Breen, Gary A. Tressler, Aaron Fry, Timothy Fisher:
Characterization and Analysis of Bit Errors in 3D TLC NAND Flash Memory. 1-6Matt Ring, Johan De Greve, Bill Cowell, Darren Moore, Jeff Gambino:
BEOL Process Development Using Fast Power Cycling on Test Structures. 1-6Christian Schlünder, Katja Waschneck, Peter Rotter, Susanne Lachenmann, Hans Reisinger, Franz Ungar, Georg Georgakos:
From Device Aging Physics to Automated Circuit Reliability Sign Off. 1-12Norbert Herfurth, Anne Beyreuther, Elham Amini, Christian Boit, Michél Simon-Najasek, Susanne Hübner, Frank Altmann, R. Herfurth, C. Wu, I. De Wolf, K. Croes:
New Access to Soft Breakdown Parameters of Low-k Dielectrics Through Localisation-Based Analysis. 1-9Jie Jack Zeng, Ruchil Jain, Kyong Jin Hwang, Robert Gauthier:
A Novel HV-NPN ESD Protection Device with Buried Floating P-Type Implant. 1-4Hang Li, Kalpathy B. Sundaram, Yuanzhong (Paul) Zhou, Javier A. Salcedo, Jean-Jacques Hajjar:
Characterization and Modeling of the Transient Safe Operating Area in LDMOS Transistors. 1-5Wei-Hao Hsiao, Nian-Jia Wang, Ming-Yi Lee, Li-Kuang Kuo, Ding-Jhang Lin, Yen-Hai Chao, Chih-Yuan Lu:
Modeling of Apparent Activation Energy and Lifetime Estimation for Retention of 3D SGVC Memory. 1-5Timo Schossler, Florian Schon, Christian Lemier, Gerald Urban:
Wafer Level Approach for the Investigation of the Long-Term Stability of Resistive Platinum Devices at Elevated Temperatures. 1-5Peter F. Satterthwaite, Ananth Saran Yalamarthy, Sam Vaziri, Miguel Munoz-Rojo, Eric Pop, Debbie G. Senesky:
Process-Induced Anomalous Current Transport in Graphene/InA1N/GaN Heterostructured Diodes. 1-6Hyewon Shim, Jeongmin Jo, Yoohwan Kim, Bongyong Jeong, Minji Shon, Hai Jiang, Sangwoo Pae:
Aging-Aware Design Verification Methods Under Real Product Operating Conditions. 1-4Frank Sill Torres, Hussam Amrouch, Jörg Henkel, Rolf Drechsler:
Impact of NBTI on Increasing the Susceptibility of FinFET to Radiation. 1-6Diganta Das, Edmond Elburn, Michael G. Pecht, Bhanu Sood:
Evaluating Impact of Information Uncertainties on Component Reliability Assessment. 1-9Armen Kteyan, Henrik Hovsepyan, Jun-Ho Choy, Valeriy Sukharev:
Assesment of CPI Stress Impact on IC Reliability and Performance in 2.5D/3D Packages. 1-7Eric E. Fabris, Matteo Meneghini, Carlo De Santi, Matteo Borga, Gaudenzio Meneghesso, Enrico Zanoni, Y. Kinoshita, K. Tanaka, H. Ishida, T. Ueda:
Hot-Electron Effects in GaN GITs and HD-GITs: A Comprehensive Analysis. 1-6J. M. Passage, N. Azhari, J. R. Lloyd:
Stress Migration Followed by Electromigration Reliability Testing. 1-5Bonnie E. Weir, Vani Prasad, Shahriar Moinian, SangJune Park, Joseph Blasko, Jason Brown, Jayanthi Pallinti:
Utilizing a Thorough Understanding of Critical Aging and Failure Mechanisms in finFET Technologies to Enable Reliable High Performance Circuits. 1-5X. Ju, D. S. Ang:
Response of Switching Hole Traps in the Small-Area P-MOSFET Under Channel Hot-Hole Effect. 1-4S. A. Wender, J. M. O'Donnell, L. Zavorka, B. L. Bhuva:
Neutron Beam Attenuation Through Semiconductor Devices During SEU Testing. 1-4Sandeep R. Bahl, Paul Brohlin:
A New Approach to Validate GaN FET Reliability to Power-Line Surges Under Use-Conditions. 1-4Kentaro Kojima, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi:
An Accurate Device-Level Simulation Method to Estimate Cross Sections of Single Event Upsets by Silicon Thickness in Raised Layer. 1-5Yuji Yamagishi, Yasuo Cho:
High Resolution Observation of Subsurface Defects at SiO2/4H-SiC Interfaces by Local Deep Level Transient Spectroscopy Based on Time-Resolved Scanning Nonlinear Dielectric Microscopy. 1-4F. Sy, Q. Rafhay, Julien Poette, G. Grosa, C. Besset, G. Beylier, P. Grosse, D. Roy, Jean-Emmanuel Broquin:
Characterization and Modelling of High Speed Ge Photodetectors Reliability. 1-5Nagothu Karmel Kranthi, Akram A. Salman, Gianluca Boselli, Mayank Shrivastava:
Current Filament Dynamics Under ESD Stress in High Voltage (Bidirectional) SCRs and It's Implications on Power Law Behavior. 1-5Kaichen Zhu, Xianhu Liang, Bin Yuan, Marco A. Villena, Chao Wen, Tao Wang, Shaochuan Chen, Mario Lanza, Fei Hui, Yuanyuan Shi:
Tristate Resistive Switching in Heterogenous Van Der Waals Dielectric Structures. 1-6Chenran Lei, Albert Lee, Qinkan Kang, MinKwang Lee, Seiji Yang, Dan Oliver, Tu Giao:
Use of High Voltage OBIRCH Fault Isolation Technique in Failure Analysis of High Voltage IC's. 1-4Siddarth Sundaresan, Vamsi Mulpuri, Stoyan Jeliazkov, Ranbir Singh:
Avalanche and Short-Circuit Robustness of 4600 V SiC DMOSFETs. 1-7Zhilu Ye, Rui Liu, Hugh Barnaby, Shimeng Yu:
Evaluation of Single Event Effects in SRAM and RRAM Based Neuromorphic Computing System for Inference. 1-4George Thiel, Flavio Griggio:
Novel Cumulative Degradation Approach to Predict Components Failure Rates. 1-7Woojin Ahn, Yen-Pu Chen, Muhammad Ashraful Alam:
An Analytical Transient Joule Heating Model for an Interconnect in a Modern IC: Material Selection (Cu, Co, Ru) and Cooling Strategies. 1-6Roman Rechter, Robert Kwasnick, Almog Reshef, Oren Zonensain, Tal Raz, Anisur Rahman, Praveen Polasam, Maxim Levit:
Product Reliability Methods to Enable High Performance CPU's. 1-5Hideaki Tsuchiya, Naohito Suzumura, Ryuji Shibata, Hideki Aono, Makoto Ogasawara, Toshihiko Akiba, Kenji Sakata, Kazuyuki Nakagawa, Takuo Funaya:
Electromigration Early Failures for Cu Pillar Interconnections with an ENEPIG Pad Finish and its Suppression. 1-6Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Makoto Yabuuchi, Yasumasa Tsukamoto, Koji Shibutani:
Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process. 1-6Kevin Matocha, In-Hwan Ji, Xuning Zhang, Sauvik Chowdhury:
SiC Power MOSFETs: Designing for Reliability in Wide-Bandgap Semiconductors. 1-8Jay Sarkar, Cory Peterson:
Operational Workload Impact on Robust Solid-State Storage Analyzed with Interpretable Machine Learning. 1-8Hideya Matsuyama, Takashi Suzuki, Motoki Shiozu, Hideo Ehara, Takeshi Soeda, Hirokazu Hosoi, Masao Oshima, Kikuo Yamabe:
Verification of Copper Stress Migration Under Low Temperature Long Time Stress. 1-5Taiki Uemura, Soonyoung Lee, Dahye Min, Ihlhwa Moon, Seungbae Lee, Sangwoo Pae:
SEIFF: Soft Error Immune Flip-Flop for Mitigating Single Event Upset and Single Event Transient in 10 nm FinFET. 1-6L. Xu, J. Cao, B. L. Bhuva, Indranil Chatterjee, S.-J. Wen, R. Wong, Lloyd W. Massengill:
Single-Event Upset Responses of Dual- and Triple-Well D Flip-Flop Designs in 7-nm Bulk FinFET Technology. 1-5C. S. Premachandran, Thuy Tran-Quinn, Lloyd Burrell, Patrick Justison:
A Comprehensive Wafer Level Reliability Study on 65nm Silicon Interposer. 1-8Kannan K. Thankappan, Adeel Ahmad Bajwa, Boris Vaisband, SivaChandra Jangam, Subramanian S. Iyer:
Reliability Evaluation of Silicon Interconnect Fabric Technology. 1-5Geert Hellings, Philippe Roussel, Nian Wang, Roman Boschke, Shih-Hung Chen, Marko Simicic, Mirko Scholz, Soeren Stoedel, Kris Myny, Dimitri Linten, Paul Hellings, Nowab Reza M. D. Ashif:
Concise Analytical Expression for Wunsch-Bell 1-D Pulsed Heating and Applications in ESD Using TLP. 1-6Y. Sacchettini, J.-P. Carrere, Vincent Goiffon, Pierre Magnan:
Plasma Antenna Charging in CMOS Image Sensors. 1-5Niaz Mahmud, Nabihah Azhari, J. R. Lloyd:
Comparative Study of TDDB Models on BEOL Interconnects for Sub-20 nm Spacings. 1-4James A. O'Donnell, Chris Connor, Tanmoy Pramanik, Jeff Hicks, Juan G. Alzate, Fatih Hamzaoglu, Justin Brockman, Oleg Golonzka, Kevin Fischer:
eNVM MRAM Retention Reliability Modeling in 22FFL FinFET Technology. 1-3Peter Moens, Arno Stockman:
A Physical-Statistical Approach to AlGaN/GaN HEMT Reliability. 1-6Jian-Hsing Lee, Natarajan Mahadeva Iyer:
Tunable Holding-Voltage High Voltage ESD Devices. 1-8D. J. Wouters:
From Emerging Memory to Novel Devices for Neuromorphic Systems: Consequences for the Reliability Requirements of Memristive Devices. 1-4Albert G. Baca, B. A. Klein, A. M. Armstrong, A. A. Allerman, E. A. Douglas, T. R. Fortune, R. J. Kaplar:
Stability in Fluorine-Treated Al-Rich High Electron Mobility Transistors with 85% Al-Barrier Composition. 1-4Gaspard Hiblot, Yefan Liu, Geert Hellings, Geert Van der Plas:
Comparative Analysis of the Degradation Mechanisms in Logic and I/O FinFET Devices Induced by Plasma Damage. 1-5Xinggon Wan, Baofu Zhu, Meera Mohan, Keija Wu, Dongil Choi, Arfa Gondal:
HCI Improvement on 14nm FinFET IO Device by Optimization of 3D Junction Profile. 1-4Evelyn Landman, Shai Cohen, Noam Brousard, Raanan Gewirtzman, Inbar Weintrob, Eyal Fayne, Yahel David, Yuval Bonen, Omer Niv, Shai Tzroia, Alex Burlak, J. W. McPherson:
Degradation Monitoring - from a Vision to Reality. 1-4H. Huang, P. S. McLaughin, J. J. Kelly, C.-C. Yang, R. G. Southwick, M. Wang, G. Bonilla, G. Karve:
Time Dependent Dielectric Breakdown of Cobalt and Ruthenium Interconnects at 36nm Pitch. 1-5Jongwon Lee, Sangkil Kim, Yoonsuk Choi, Jongwoo Park:
Process Variation of Pixel Definition and Effects of Flexible OLED Luminance Degradation. 1-6Zhuo-Jie Wu, Manish Nayini, Charles Carey, Samantha Donovan, David Questad, Edmund D. Blackshear:
CPI Reliability Challenges of Large Flip Chip Packages and Effects of Kerf Size and Substrate. 1-7Antony Fan, Joddy Wang, Vladimir Aptekar:
Advanced Circuit Reliability Verification for Robust Design. 1-8Niloofar Shakoorzadeh, Amir Hanna, Subramanian Iyer:
Bilayer Passivation Film for Cu Interconnects on Si Interconnect Fabric. 1-5Shu-Han Hsu, Kexin Yang, Linda Milor:
Machine Learning for Detection of Competing Wearout Mechanisms. 1-9Chen Wu, Adrian Chasin, A. Padovani, Alicja Lesniewska, Steven Demuynck, Kris Croes:
Role of Defects in the Reliability of HfO2/Si-Based Spacer Dielectric Stacks for Local Interconnects. 1-6M. Iqbal Mahmud, A. Gupta, Maria Toledano-Luque, N. Mavilla, J. Johnson, P. Srinivasan, A. Zainuddin, S. Rao, S. Cimino, B. Min, Tanya Nigam:
Hot Carrier Reliability Improvement of Thicker Gate Oxide nFET Devices in Advanced FinFETs. 1-6A. Hirler, A. Alsioufy, J. Biba, T. Lehndorff, D. Lipp, H. Lochner, M. Siddabathula, S. Simon, T. Sulima, M. Wiatr, Walter Hansch:
Alternating Temperature Stress and Deduction of Effective Stress Levels from Mission Profiles for Semiconductor Reliability. 1-4Xiaolei Ma, Xiangwei Jiang, Jiezhi Chen, Liwei Wang, Yunfei En:
Scaling Behaviour of State-to-State Coupling During Hole Trapping at Si/SiO2. 1-4Daniel B. Habersat, Ronald Green, Aivars J. Lelis:
Permanent and Transient Effects of High-Temperature Bias Stress on Room- Temperature $V_{T}$ Drift Measurements in SiC Power MOSFETs. 1-4Fernando Leonel Aguirre, Andrea Padovani, Alok Ranjan, Nagarajan Raghavan, Nahuel Vega, Nahuel Muller, Sebastián Matías Pazos, Mario Debray, Joel Molina Reyes, Kin Leong Pey, Felix Palumbo:
Spatio-Temporal Defect Generation Process in Irradiated HfO2 MOS Stacks: Correlated Versus Uncorrelated Mechanisms. 1-8Art Schaldenbrand, Jushan Xie, Hany Elhak:
Recent Updates to Transistor Level Reliability Analysis. 1-8Zhicheng Wu, Jacopo Franco, Dieter Claes, Gerhard Rzepa, Philippe J. Roussel, Nadine Collaert, Guido Groeseneken, Dimitri Linten, Tibor Grasser, Ben Kaczer:
Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling. 1-7Tian Shen, Abu Naser Zainuddin, Purushothaman Srinivasan, Zakariae Chbili, Kai Zhao, Patrick Justison:
Novel Oxide Top-Off Process Enabling Reliable PC-CA TDDB on IO Devices with Self Aligned Contact. 1-5C. Diouf, N. Guitard, M. Rafik, J. J. Martinez, X. Federspiel, Alain Bravaix, D. Muller, D. Roy:
Process Optimization for HCI Improvement in I/O Analog Devices. 1-6M. L. Breeding, R. A. Reed, K. M. Warren, M. L. Alles:
Exploration of the Impact of Physical Integration Schemes on Soft Errors in 3D ICs Using Monte Carlo Simulation. 1-7Pavel Bolshakov, Rodolfo A. Rodriguez-Davila, Manuel Quevedo-Lopez, Chadwin D. Young:
Positive Bias Instability in ZnO TFTs with Al2O3 Gate Dielectric. 1-5E. Canato, F. Masin, Matteo Borga, Enrico Zanoni, Matteo Meneghini, Gaudenzio Meneghesso, Arno Stockman, A. Banerjee, Peter Moens:
$\mu s$-Range Evaluation of Threshold Voltage Instabilities of GaN-on-Si HEMTs with p-GaN Gate. 1-6Ethan S. Lee, Luis Hurtado, Jungwoo Joh, Srikanth Krishnan, Sameer Pendharkar, Jesús A. del Alamo:
Time-Dependent Dielectric Breakdown Under AC Stress in GaN MIS-HEMTs. 1-5M. K. Mahadevaiah, E. Perez, Christian Wenger, Alessandro Grossi, Cristian Zambelli, Piero Olivo, F. Zahari, H. Kohlstedt, M. Ziegler:
Reliability of CMOS Integrated Memristive HfO2 Arrays with Respect to Neuromorphic Computing. 1-4Y. Higashi, Karine Florent, A. Subirats, Ben Kaczer, Luca Di Piazza, Sergiu Clima, N. Ronchi, S. R. C. McMitchell, K. Banerjee, Umberto Celano, M. Suzuki, Dimitri Linten, Jan Van Houdt:
New Insights into the Imprint Effect in FE-HfO2 and its Recovery. 1-7A. G. Viey, W. Vandendaele, M. A. Jaud, R. Gwoziecki, A. Torres, M. Plissonnier, F. Gaillard, Gérard Ghibaudo, R. Modica, F. Iucolano, Matteo Meneghini, Gaudenzio Meneghesso:
Influence of Gate Length on pBTI in GaN-on-Si E-Mode MOSc-HEMT. 1-6Jonas Doevenspeck, Robin Degraeve, Andrea Fantini, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene:
Low Voltage Transient RESET Kinetic Modeling of OxRRAM for Neuromorphic Applications. 1-6J. Cao, L. Xu, Bharat L. Bhuva, S.-J. Wen, R. Wong, Balaji Narasimham, Lloyd W. Massengill:
Alpha Particle Soft-Error Rates for D-FF Designs in 16-Nm and 7-Nm Bulk FinFET Technologies. 1-5Diana Xing, Tianshi Liu, Susanna Yu, Minseok Kang, Arash Salemi, Marvin White, Anant Agarwal:
Design Strategies for Rugged SiC Power Devices. 1-5B. Zhu, E. M. Bazizi, J. H. M. Tng, Z. Li, E. K. Banghart, M. K. Hassan, Y. Hu, D. Zhou, D. Choi, L. Qin, X. Wan:
TCAD Simulation on FinFET n-type Power Device HCI Reliability Improvement. 1-4Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello, Gouri Sankar Kar, Francky Catthoor:
Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects. 1-6Kenichiro Tanaka, Masahiro Hikita, Tetsuzo Ueda:
Influence of Donor-Type Hole Traps Under P-GaN Gate in GaN-Based Gate Injection Transistor (GIT). 1-4Claire McKay Bowen, Nathan DeBardeleben, Sean Blanchard, Christine M. Anderson-Cook:
Do Solar Proton Events Reduce the Number of Faults in Supercomputers?: A Comparative Analysis of Faults During and without Solar Proton Events. 1-5