ACM Transactions on Embedded Computing Systems, Volume 13

Volume 13, Number 1, August 2013

• 
  Mo Li, Zheng Yang, Yunhao Liu:
  Sea depth measurement with restricted floating sensors. 1:1-1:21
• 
  Madhukar Anand, Sebastian Fischmeister, Insup Lee:
  A comparison of compositional schedulability analysis techniques for hierarchical real-time systems. 2:1-2:37
• 
  Juan Carlos Martínez Santos, Yunsi Fei:
  Leveraging speculative architectures for runtime program validation. 3:1-3:18
• 
  Ang-Chih Hsieh, TingTing Hwang:
  Thermal-aware memory mapping in 3D designs. 4:1-4:22
• 
  Ke Bai, Aviral Shrivastava:
  A software-only scheme for managing heap data on limited local memory(LLM) multicore processors. 5:1-5:18
• 
  Ji Gu, Hui Guo, Tohru Ishihara:
  DLIC: Decoded loop instructions caching for energy-aware embedded processors. 6:1-6:26
• 
  Phillip Stanley-Marbell:
  L24: Parallelism, performance, energy efficiency, and cost trade-offs in future sensor platforms. 7:1-7:27
• 
  Won So, Alexander G. Dean:
  Software thread integration for instruction-level parallelism. 8:1-8:23
• 
  Hassan Ghasemzadeh, Roozbeh Jafari:
  Ultra low-power signal processing in wearable monitoring systems: A tiered screening architecture with optimal bit resolution. 9:1-9:23
• 
  Yuan-Hao Chang, Ming-Chang Yang, Tei-Wei Kuo, Ren-Hung Hwang:
  A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systems. 10:1-10:28
• 
  Chih-Hao Chao, Kun-Chih Chen, Tsu-Chu Yin, Shu-Yen Lin, An-Yeu Wu:
  Transport-layer-assisted routing for runtime thermal management of 3D NoC systems. 11:1-11:22
• 
  Christopher G. Kent, JoAnn M. Paul:
  Contextual partitioning for speech recognition. 12:1-12:20
• 
  Sunwoo Kim, Won Seob Jeong, Won Woo Ro, Jean-Luc Gaudiot:
  Design and evaluation of random linear network coding Accelerators on FPGAs. 13:1-13:24
• 
  Mirza Omer Beg, Peter van Beek:
  A constraint programming approach for integrated spatial and temporal scheduling for clustered architectures. 14:1-14:23

Volume 13, Number 2, September 2013

Special issue on application-specific processors

• 
  Philip Brisk, Tulika Mitra:
  Introduction to the special issue on application-specific processors. 15:1-15:3
• 
  Sudhanshu Vyas, Adwait Gupte, Christopher D. Gill, Ron K. Cytron, Joseph Zambreno, Phillip H. Jones:
  Hardware architectural support for control systems and sensor processing. 16:1-16:25
• 
  Spiridon F. Beldianu, Sotirios G. Ziavras:
  Multicore-based vector coprocessor sharing for performance and energy gains. 17:1-17:25
• 
  Thorsten Jungeblut, Boris Hübener, Mario Porrmann, Ulrich Rückert:
  A systematic approach for optimized bypass configurations for application-specific embedded processors. 18:1-18:25
• 
  Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi Gaydadjiev:
  Custom architecture for multicore audio beamforming systems. 19:1-19:26
• 
  Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Cristina Silvano:
  Design-space exploration and runtime resource management for multicores. 20:1-20:27
• 
  Yooseong Kim, Aviral Shrivastava:
  Memory performance estimation of CUDA programs. 21:1-21:22
• 
  Ioannis Stamoulias, Elias S. Manolakos:
  Parallel architectures for the kNN classifier - design of soft IP cores and FPGA implementations. 22:1-22:21
• 
  Chen Huang, Frank Vahid, Tony Givargis:
  Automatic synthesis of physical system differential equation models to a custom network of general processing elements on FPGAs. 23:1-23:27
• 
  Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson:
  LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems. 24:1-24:27
• 
  Alexandros Papakonstantinou, Karthik Gururaj, John A. Stratton, Deming Chen, Jason Cong, Wen-mei W. Hwu:
  Efficient compilation of CUDA kernels for high-performance computing on FPGAs. 25:1-25:26

Volume 13, Number 1s, November 2013

• 
  Naehyuck Chang, Jian-Jia Chen:
  Introduction to the special section on ESTIMedia'10. 26:1-26:2
• 
  Zai Jian Jia, Tomás Bautista, Antonio Núñez, Andy D. Pimentel, Mark Thompson:
  A system-level infrastructure for multidimensional MP-SoC design space co-exploration. 27:1-27:26
• 
  Dmitry Nadezhkin, Hristo Nikolov, Todor P. Stefanov:
  Automated generation of polyhedral process networks from affine nested-loop programs with dynamic loop bounds. 28:1-28:24
• 
  Yulei Wu, Geyong Min, Dakai Zhu, Laurence T. Yang:
  An analytical model for on-chip interconnects in multimedia embedded systems. 29:1-29:19
• 
  Weijia Che, Karam S. Chatha:
  Scheduling of synchronous data flow models onto scratchpad memory-based embedded processors. 30:1-30:25
• 
  Florian Schmoll, Andreas Heinig, Peter Marwedel, Michael Engel:
  Improving the fault resilience of an H.264 decoder using static analysis methods. 31:1-31:27
• 
  Gabriel Parmer, Richard West:
  Predictable and configurable component-based scheduling in the Composite OS. 32:1-32:26
• 
  Bo Zhou, Xiaobo Sharon Hu, Danny Z. Chen, Cedric X. Yu:
  Accelerating radiation dose calculation: A multi-FPGA solution. 33:1-33:25
• 
  Pedro Furtado, José Cecílio:
  Configuration and operation of networked control systems over heterogeneous WSANs. 34:1-34:24
• 
  Concepción Sanz, José Ignacio Gómez, Christian Tenllado, Manuel Prieto, Francky Catthoor:
  System-level memory management based on statistical variability compensation for frame-based applications. 35:1-35:28
• 
  Morteza Mohaqeqi, Mehdi Kargahi, Maryam Dehghan:
  Adaptive scheduling of real-time systems cosupplied by renewable and nonrenewable energy sources. 36:1-36:28
• 
  Chen Kang Lo, Mao Lin Li, Li-Chun Chen, Yi-Shan Lu, Ren-Song Tsay, Hsu-Yao Huang, Jen-Chieh Yeh:
  Automatic generation of high-speed accurate TLM models for out-of-order pipelined bus. 37:1-37:25
• 
  Jongeun Lee, Aviral Shrivastava:
  Software-based register file vulnerability reduction for embedded processors. 38:1-38:20
• 
  Anshul Singh, Arindam Basu, Keck Voon Ling, Vincent John Mooney III:
  Models for characterizing noise based PCMOS circuits. 39:1-39:30
• 
  Iraklis Anagnostopoulos, Jean-Michel Chabloz, Ioannis Koutras, Alexandros Bartzas, Ahmed Hemani, Dimitrios Soudris:
  Power-aware dynamic memory management on many-core platforms utilizing DVFS. 40:1-40:25

Volume 13, Number 3, December 2013

• 
  Garo Bournoutian, Alex Orailoglu:
  Application-aware adaptive cache architecture for power-sensitive mobile processors. 41:1-41:26
• 
  Bo Zhou, Kai Xiao, Danny Z. Chen, Xiaobo Sharon Hu:
  GPU-optimized volume ray tracing for massive numbers of rays in radiotherapy. 42:1-42:17
• 
  Yun Liang, Tulika Mitra:
  An analytical approach for fast and accurate design space exploration of instruction caches. 43:1-43:29
• 
  Timothy Bourke, Arcot Sowmya:
  Analyzing an embedded sensor with timed automata in uppaal. 44:1-44:26
• 
  Rebecca L. Collins, Luca P. Carloni:
  Flexible filters in stream programs. 45:1-45:26
• 
  Matin Hashemi, Mohammad H. Foroozannejad, Soheil Ghiasi:
  Throughput-memory footprint trade-off in synthesis of streaming software on embedded multiprocessors. 46:1-46:26
• 
  Swarnendu Biswas, Rajib Mall, Manoranjan Satpathy:
  A regression test selection technique for embedded software. 47:1-47:39
• 
  Rupak Majumdar, Elaine Render, Paulo Tabuada:
  A theory of robust omega-regular software synthesis. 48:1-48:27
• 
  Yi-Ping You, Shen-Hong Wang:
  Energy-aware code motion for GPU shader processors. 49:1-49:24
• 
  Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li:
  Register allocation for embedded systems to simultaneously reduce energy and temperature on registers. 50:1-50:26
• 
  Adrian Lizarraga, Roman Lysecky, Susan Lysecky, Ann Gordon-Ross:
  Dynamic profiling and fuzzy-logic-based optimization of sensor network platforms. 51:1-51:29
• 
  Yosi Ben-Asher, Nadav Rotem:
  The benefits of using variable-length pipelined operations in high-level synthesis. 52:1-52:23
• 
  Yu-Ming Chang, Pi-Cheng Hsiu, Yuan-Hao Chang, Che-Wei Chang:
  A resource-driven DVFS scheme for smart handheld devices. 53:1-53:22
• 
  Christos Kyrkou, Christos Ttofis, Theocharis Theocharides:
  A hardware architecture for real-time object detection using depth and edge information. 54:1-54:19
• 
  Li-Pin Chang, Tung-Yang Chou, Li-Chun Huang:
  An adaptive, low-cost wear-leveling algorithm for multichannel solid-state disks. 55:1-55:26

Volume 13, Number 2s, January 2014

Special Section ESFH'12

• 
  Yongcai Wang, Xiaohong Hao, Lei Song, Chenye Wu, Yuexuan Wang, Changjian Hu, Lu Yu:
  Monitoring massive appliances by a minimal number of smart meters. 56:1-56:20
• 
  Chenye Wu, Yiyu Shi, Soummya Kar:
  Exploring demand flexibility in heterogeneous aggregators: An LMP-based pricing scheme. 57:1-57:17

Special Section ESTIMedia'11

• 
  Naehyuck Chang, Jian-Jia Chen:
  Introduction to the special section on ESTIMedia'11. 58:1-58:2
• 
  Tzu-Hsiang Su, Hsiang-Jen Tsai, Keng-Hao Yang, Po-Chun Chang, Tien-Fu Chen, Yi-Ting Zhao:
  Reconfigurable vertical profiling framework for the android runtime system. 59:1-59:25
• 
  Wook Song, Yeseong Kim, Hakbong Kim, Jehun Lim, Jihong Kim:
  Personalized optimization for android smartphones. 60:1-60:25
• 
  Davit Mirzoyan, Benny Akesson, Kees Goossens:
  Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs. 61:1-61:24
• 
  Dong-Heon Jung, Soo-Mook Moon, Hyeong-Seok Oh:
  Hybrid compilation and optimization for java-based digital TV platforms. 62:1-62:27
• 
  Li-Pin Chang, Chen-Yi Wen:
  Reducing asynchrony in channel garbage-collection for improving internal parallelism of multichannel solid-state disks. 63:1-63:23
• 
  Zheng Li, Frank Lockom, Shangping Ren:
  Maintaining real-time application timing similarity for defect-tolerant NoC-based many-core systems. 64:1-64:19
• 
  Masud Ahmed, Nathan Fisher:
  Tractable schedulability analysis and resource allocation for real-time multimodal systems. 65:1-65:28

Regular Papers

• 
  Rahul Balani, Lucas Francisco Wanner, Mani B. Srivastava:
  Distributed programming framework for fast iterative optimization in networked cyber-physical systems. 66:1-66:26
• 
  Jens Brandt, Klaus Schneider, Yu Bai:
  Passive code in synchronous programs. 67:1-67:25
• 
  Yu Gu, Liang He, Ting Zhu, Tian He:
  Achieving energy-synchronized communication in energy-harvesting wireless sensor networks. 68:1-68:26
• 
  Jinkyu Lee, Arvind Easwaran, Insik Shin:
  Contention-free executions for real-time multiprocessor scheduling. 69:1-69:25
• 
  Huang Huang, Vivek Chaturvedi, Gang Quan, Jeffrey Fan, Meikang Qiu:
  Throughput maximization for periodic real-time systems under the maximal temperature constraint. 70:1-70:22
• 
  Abdullah Elewi, Mohamed Shalan, Medhat H. Awadalla, Elsayed M. Saad:
  Energy-efficient task allocation techniques for asymmetric multiprocessor embedded systems. 71:1-71:27
• 
  Anup Das, Akash Kumar, Bharadwaj Veeravalli:
  Energy-aware task mapping and scheduling for reliable embedded computing systems. 72:1-72:27
• 
  Xiaohang Wang, Mei Yang, Yingtao Jiang, Peng Liu, Masoud Daneshtalab, Maurizio Palesi, Terrence S. T. Mak:
  On self-tuning networks-on-chip for dynamic network-flow dominance adaptation. 73:1-73:21

Volume 13, Number 4, February 2014

• 
  Sandeep K. Shukla:
  Editorial: Embedded everywhere for everyone. 74:1-74:2
• 
  Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
  Rapid evaluation of custom instruction selection approaches with FPGA estimation. 75:1-75:29
• 
  Martina Maggio, Federico Terraneo, Alberto Leva:
  Task scheduling: A control-theoretical viewpoint for a general and flexible solution. 76:1-76:22
• 
  Wei Dong, Yunhao Liu, Chun Chen, Lin Gu, Xiaofan Wu:
  Elon: Enabling efficient and long-term reprogramming for wireless sensor networks. 77:1-77:27
• 
  Shuai Li, Yuesheng Lou, Bo Liu:
  Bluetooth aided mobile phone localization: A nonlinear neural circuit approach. 78:1-78:15
• 
  Jingtong Hu, Qingfeng Zhuge, Chun Jason Xue, Wei-Che Tseng, Edwin Hsing-Mean Sha:
  Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors. 79:1-79:25
• 
  HeeSeok Kim, Dong-Guk Han, Seokhie Hong, JaeCheol Ha:
  Message blinding method requiring no multiplicative inversion for RSA. 80:1-80:10
• 
  Behzad Mahdavikhah, Ramin Mafi, Shahin Sirouspour, Nicola Nicolici:
  A Multiple-FPGA parallel computing architecture for real-time simulation of soft-object deformation. 81:1-81:23
• 
  Philip Axer, Rolf Ernst, Heiko Falk, Alain Girault, Daniel Grund, Nan Guan, Bengt Jonsson, Peter Marwedel, Jan Reineke, Christine Rochange, Maurice Sebastian, Reinhard von Hanxleden, Reinhard Wilhelm, Wang Yi:
  Building timing predictable embedded systems. 82:1-82:37
• 
  Luis Angel D. Bathen, Nikil D. Dutt:
  Embedded RAIDs-on-chip for bus-based chip-multiprocessors. 83:1-83:36
• 
  Evangelos Logaras, Orsalia Georgia Hazapis, Elias S. Manolakos:
  Python to accelerate embedded SoC design: A case study for systems biology. 84:1-84:25
• 
  Rance Rodrigues, Arunachalam Annamalai, Sandip Kundu:
  A low-power instruction replay mechanism for design of resilient microprocessors. 85:1-85:23
• 
  Mohammad Khavari Tavana, Nasibeh Teimouri, Meisam Abdollahi, Maziar Goudarzi:
  Simultaneous hardware and time redundancy with online task scheduling for low energy highly reliable standby-sparing system. 86:1-86:31
• 
  Danny P. Riemens, Georgi Gaydadjiev, Chris I. De Zeeuw, Christos Strydis:
  Towards scalable arithmetic units with graceful degradation. 87:1-87:26
• 
  Sung Kyu Park, Min Kyu Maeng, Ki-Woong Park, Kyu Ho Park:
  Adaptive wear-leveling algorithm for PRAM main memory with a DRAM buffer. 88:1-88:25
• 
  Omer Anjum, Mubashir Ali, Teemu Pitkänen, Jari Nurmi:
  Transport triggered architecture to perform carrier synchronization for LTE. 89:1-89:15
• 
  Juan Antonio Clemente, Javier Resano, Daniel Mozos:
  An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems. 90:1-90:24
• 
  Farhana Dewan, Nathan Fisher:
  Bandwidth allocation for fixed-priority-scheduled compositional real-time systems. 91:1-91:29
• 
  I-Wei Wu, Jean Jyh-Jiun Shann, Wei-Chung Hsu, Chung-Ping Chung:
  Extended Instruction Exploration for Multiple-Issue Architectures. 92:1-92:28
• 
  Roger Moussalli, Mariam Salloum, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras:
  A study on parallelizing XML path filtering using accelerators. 93:1-93:28
• 
  Hengchang Liu, Pan Hui, Zhiheng Xie, Jingyuan Li, David J. Siu, Gang Zhou, Liusheng Huang, John A. Stankovic:
  Providing reliable and real-time delivery in the presence of body shadowing in breadcrumb systems. 94:1-94:24
• 
  Bertrand Le Gal, Christophe Jégo:
  GPU-like on-chip system for decoding LDPC codes. 95:1-95:19
• 
  Umair Ali Khan, Bernhard Rinner:
  Online learning of timeout policies for dynamic power management. 96:1-96:25
• 
  Lingkan Gong, Oliver Diessel:
  Simulation-based functional verification of dynamically reconfigurable systems. 97:1-97:23
• 
  François Guimbretière, Shenwei Liu, Han Wang, Rajit Manohar:
  An asymmetric dual-processor architecture for low-power information appliances. 98:1-98:19

Volume 13, Number 3s, March 2014

Special Issue on Design Challenges for Many-Core Processors
Regular Papers

• 
  Sandeep K. Shukla:
  Editorial: Embedded systems - more than methodology. 99:1-99:2
• 
  Masoud Daneshtalab, Maurizio Palesi, Juha Plosila:
  Editorial: Special issue on design challenges for many-core processors. 100:1-100:2
• 
  Somayyeh Koohi, Yawei Yin, Shaahin Hessabi, S. J. Ben Yoo:
  Towards a scalable, low-power all-optical architecture for networks-on-chip. 101:1-101:30
• 
  Yves Lhuillier, Maroun Ojail, Alexandre Guerre, Jean-Marc Philippe, Karim Ben Chehida, Farhat Thabet, Caaliph Andriamisaina, Chafic Jaber, Raphaël David:
  HARS: A hardware-assisted runtime software for embedded many-core architectures. 102:1-102:25
• 
  Qiang Yang, Jian Fu, Raphael Poss, Chris R. Jesshope:
  On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches. 103:1-103:21
• 
  Ritesh Parikh, Valeria Bertacco:
  ForEVeR: A complementary formal and runtime verification approach to correct NoC functionality. 104:1-104:30
• 
  Alberto A. Del Barrio, Nader Bagherzadeh, Román Hermida:
  Ultra-low-power adder stage design for exascale floating point units. 105:1-105:24
• 
  Yu-Jen Huang, Jin-Fu Li:
  Yield-enhancement schemes for multicore processor and memory stacked 3D ICs. 106:1-106:22
• 
  Oliver Arnold, Emil Matús, Benedikt Noethen, Markus Winter, Torsten Limberg, Gerhard P. Fettweis:
  Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs. 107:1-107:24
• 
  Yuho Jin, Timothy Mark Pinkston:
  PAIS: Parallelism-aware interconnect scheduling in multicores. 108:1-108:21

Special Section on ESTIMedia'13

• 
  Mario R. Casu, Francesco Colonna, Marco Crepaldi, Danilo Demarchi, Mariagrazia Graziano, Maurizio Zamboni:
  UWB microwave imaging for breast cancer detection: Many-core, GPU, or FPGA? 109:1-109:22
• 
  Maurizio Palesi, Todor P. Stefanov:
  Editorial: Special Section on ESTIMedia'13. 110:1
• 
  Gang Chen, Kai Huang, Alois C. Knoll:
  Energy optimization for real-time multiprocessor system-on-chip with optimal DVFS and DPM combination. 111:1-111:21

Regular Papers

• 
  Rawan Abdel-Khalek, Valeria Bertacco:
  Post-silicon platform for the functional diagnosis and debug of networks-on-chip. 112:1-112:25
• 
  Dakshina Dasari, Borislav Nikolic, Vincent Nélis, Stefan M. Petters:
  NoC contention analysis using a branch-and-prune algorithm. 113:1-113:26
• 
  Ahmad Lashgar, Ahmad Khonsari, Amirali Baniasadi:
  HARP: Harnessing inactive threads in many-core processors. 114:1-114:25
• 
  Abbas BanaiyanMofrad, Gustavo Girão, Nikil D. Dutt:
  NoC-based fault-tolerant cache design in chip multiprocessors. 115:1-115:26
• 
  Shirish Bahirat, Sudeep Pasricha:
  METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures. 116:1-116:33
• 
  Pierfrancesco Foglia, Marco Solinas:
  Exploiting replication to improve performances of NUCA-based CMP systems. 117:1-117:23

Volume 13, Number 4s, July 2014

Special Issue on Real-Time and Embedded Technology and Applications, Domain-Specific Multicore Computing, Cross-Layer Dependable Embedded Systems, and Application of Concurrency to System Design (ACSD'13)

•