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ORCIDGiacomo M. Bisio
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2000 – 2009
- 2008
[c16]Manuela Chessa
, Fabio Solari, Silvio P. Sabatini, Giacomo M. Bisio:
Motion Interpretation Using Adjustable Linear Models. BMVC 2008: 1-10- 2005
- [c15]Giulia Gastaldi, Alessandro Pareschi, Silvio P. Sabatini, Fabio Solari, Giacomo M. Bisio:
A man-machine communication system based on the visual analysis of dynamic gestures. ICIP (3) 2005: 397-400 - 2003
- [j13]Silvio P. Sabatini, Fabio Solari, Paolo Cavalleri, Giacomo M. Bisio:
Phase-Based Binocular Perception of Motion in Depth: Cortical-Like Operators and Analog VLSI Architectures. EURASIP J. Adv. Signal Process. 2003(7): 690-702 (2003) - [c14]Silvio P. Sabatini, Fabio Solari, Giacomo M. Bisio:
Lattice Models for Context-Driven Regularization in Motion Perception. WIRN 2003: 35-42 - 2001
- [c13]Silvio P. Sabatini, Fabio Solari, Giulia Andreani, Chiara Bartolozzi, Giacomo M. Bisio:
A Hierarchical Model of Complex Cells in Visual Cortex for the Binocular Perception of Motion-in-Depth. NIPS 2001: 1271-1278 - [c12]Silvio P. Sabatini, Fabio Solari, Giacomo M. Bisio:
A Cortical Architecture for the Binocular Perception of Motion-in-depth. WIRN 2001: 157-162 - 2000
- [c11]Silvio P. Sabatini, Paolo Cavalleri, Fabio Solari, Giacomo M. Bisio:
Recovering 3-D Egomotion Parameters from Optic Flow: From Structural Principles to Analog Architectures. CAMP 2000: 117-121
1990 – 1999
- 1998
- [j12]Giacomo M. Bisio, Luigi Raffo, Silvio P. Sabatini:
Analogue VLSI primitives for perceptual tasks in machine vision. Neural Comput. Appl. 7(3): 216-228 (1998) - [j11]Luigi Raffo, Silvio P. Sabatini, Gian Marco Bo, Giacomo M. Bisio:
Analog VLSI circuits as physical structures for perception in early visual tasks. IEEE Trans. Neural Networks 9(6): 1483-1494 (1998) - 1997
- [j10]Silvio P. Sabatini, Luigi Raffo, Giacomo M. Bisio:
Functional Periodic Intracortical Couplings Induced by Structured Lateral Inhibition in a Linear Cortical Network. Neural Comput. 9(3): 525-531 (1997) - [j9]Luigi Raffo, Silvio P. Sabatini, Mauro Mantelli, Alessandro De Gloria, Giacomo M. Bisio:
Design of an ASIP architecture for low-level visual elaborations. IEEE Trans. Very Large Scale Integr. Syst. 5(1): 145-153 (1997) - [c10]Giacomo M. Bisio, Gian Marco Bo, M. Confalone, Luigi Raffo, Silvio P. Sabatini, M. P. Zizola:
An Analog VLSI Computational Engine for Early Vision Tasks. ICANN 1997: 1175-1180 - 1996
- [j8]Luigi Raffo, Silvio P. Sabatini, Giacomo M. Bisio:
A programmable VLSI architecture based on multilayer CNN paradigms for real-time visual processing. Int. J. Circuit Theory Appl. 24(3): 357-367 (1996) - [j7]Giacomo Indiveri, Luigi Raffo, Silvio P. Sabatini, Giacomo M. Bisio:
A recurrent neural architecture mimicking cortical preattentive vision systems. Neurocomputing 11(2-4): 155-170 (1996) - [j6]Maurizio Valle, Luigi Raffo, Daniele D. Caviglia, Giacomo M. Bisio:
A VLSI Image Processing Architecture Dedicated to Real-Time Quality Control Analysis in an Industrial Plant. Real Time Imaging 2(6): 361-371 (1996) - [c9]Silvio P. Sabatini, Fabio Solari, Giacomo M. Bisio:
An Architectural Mechanism for Direction-tuned Cortical Simple Cells: The Role of Mutual Inhibition. NIPS 1996: 104-110 - 1995
- [j5]Marco Chirico, Ermanno Di Zitti, Giacomo M. Bisio:
A linear rotation based solution of large systems on a transputer array. Microprocess. Microsystems 19(6): 321-326 (1995) - [j4]Giacomo Indiveri, Luigi Raffo, Silvio P. Sabatini, Giacomo M. Bisio:
A neuromorphic architecture for cortical multilayer integration of early visual tasks. Mach. Vis. Appl. 8(5): 305-314 (1995) - [c8]Maurizio Valle, Giovanni Nateri, Daniele D. Caviglia, Giacomo M. Bisio, Luciano Briozzo:
An ASIC design for real-time image processing in industrial applications. ED&TC 1995: 385-390 - 1993
- [c7]Giacomo M. Bisio, Daniele D. Caviglia, Giacomo Indiveri, Luigi Raffo, Silvio P. Sabatini:
A neural network architectural model of visual cortical cells for texture segregation. ICNN 1993: 755-760 - 1992
- [c6]Francesco Curatelli, Daniele D. Caviglia, Marco Chirico, Giacomo M. Bisio:
Optimization strategies in symbolic compaction. Synthesis for Control Dominated Circuits 1992: 311-322 - 1991
- [j3]Raffaele Costa, Francesco Curatelli, Daniele D. Caviglia, Giacomo M. Bisio:
Symbolic generation of constrained random logic cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(2): 220-231 (1991) - [c5]Daniele D. Caviglia, Maurizio Valle, Giacomo M. Bisio:
A VLSI Module for Analog Adaptive Neural Architectures. VLSI 1991: 177-186 - 1990
- [c4]Daniele D. Caviglia, Giacomo M. Bisio, Francesco Curatelli, L. Giovannacci, Luigi Raffo:
Pre-placement of VLSI blocks through learning neural networks. EURO-DAC 1990: 650-654 - [c3]Daniele D. Caviglia, Maurizio Valle, Giacomo M. Bisio:
Effects of weight discretization on the back propagation learning method: algorithm design and hardware realization. IJCNN 1990: 631-637
1980 – 1989
- 1989
- [j2]Ermanno Di Zitti, Giacomo M. Bisio, Francesco Curatelli, Giancarlo Parodi:
High efficiency solution of triangular system equations on a 2-D array of transputers. Microprocess. Microprogramming 25(1-5): 259-263 (1989) - [c2]Ermanno Di Zitti, Daniele D. Caviglia, Giacomo M. Bisio, Giancarlo Parodi:
Neural networks on a transputer array. ICASSP 1989: 2513-2516 - 1988
- [j1]Francesco Curatelli, Giacomo M. Bisio, Giovanni Borghero, Ermanno Di Zitti:
A behavioural simulator and its use for the validation of hypercube architectures. Microprocess. Microprogramming 24(1-5): 213-218 (1988) - [c1]Giacomo M. Bisio, Fabio Arduini, Francesco Curatelli, Ermanno Di Zitti, G. C. Parodi, A. Zini:
Mapping linear algebra algorithms into array processors: a case study. ICASSP 1988: 2084-2087
Coauthor Index
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