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Alexander V. Veidenbaum
Publications
- 2013
- [c85]Dali Zhao, Houman Homayoun, Alexander V. Veidenbaum:
Temperature aware thread migration in 3D architecture with stacked DRAM. ISQED 2013: 80-87 - 2011
- [j23]Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, Alexander V. Veidenbaum, Fadi J. Kurdahi:
On leakage power optimization in clock tree networks for ASICs and general-purpose processors. Sustain. Comput. Informatics Syst. 1(1): 75-87 (2011) - [j22]Houman Homayoun, Avesta Sasan, Jean-Luc Gaudiot, Alexander V. Veidenbaum:
Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 2081-2094 (2011) - [j21]Houman Homayoun, Avesta Sasan, Alexander V. Veidenbaum, Hsin-Cheng Yao, Shahin Golshan, Payam Heydari:
MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2303-2316 (2011) - 2010
- [c77]Houman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil D. Dutt:
Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units. Conf. Computing Frontiers 2010: 297-308 - [c76]Houman Homayoun, Aseem Gupta, Alexander V. Veidenbaum, Avesta Sasan, Fadi J. Kurdahi, Nikil D. Dutt:
RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor. HiPEAC 2010: 216-231 - [c75]Shahin Golshan, Eli Bozorgzadeh, Benjamin Carrión Schäfer, Kazutoshi Wakabayashi, Houman Homayoun, Alexander V. Veidenbaum:
Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems. ISLPED 2010: 49-54 - [c74]Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, Alexander V. Veidenbaum, Fadi J. Kurdahi:
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks. ISQED 2010: 499-507 - 2008
- [c66]Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum:
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. CASES 2008: 197-206 - [c65]Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum:
Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. DAC 2008: 68-71 - [c64]Houman Homayoun, Alexander V. Veidenbaum, Jean-Luc Gaudiot:
Adaptive techniques for leakage power management in L2 cache peripheral circuits. ICCD 2008: 563-569 - [c63]Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum:
ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. ICCD 2008: 699-706 - [c60]Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum:
Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. LCTES 2008: 71-78 - [c56]Houman Homayoun, Mohammad A. Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum:
A centralized cache miss driven technique to improve processor power dissipation. ICSAMOS 2008: 195-202 - 2007
- [c54]Houman Homayoun, Alexander V. Veidenbaum:
Reducing leakage power in peripheral circuits of L2 caches. ICCD 2007: 230-237
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