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Scott A. Mahlke
2010 – today
- 2013
[j30]Hongwei Liao, Yin Wang, Hyoun Kyu Cho, Jason Stanley, Terence Kelly, Stéphane Lafortune, Scott A. Mahlke, Spyros A. Reveliotis: Concurrency bugs in multithreaded software: modeling and analysis using Petri nets. Discrete Event Dynamic Systems 23(2): 157-195 (2013)- [j29]Hongwei Liao, Stéphane Lafortune, Spyros A. Reveliotis, Yin Wang, Scott A. Mahlke: Optimal Liveness-Enforcing Control for a Class of Petri Nets Arising in Multithreaded Software. IEEE Trans. Automat. Contr. 58(5): 1123-1138 (2013)
- [c130]Hyoun Kyu Cho, Terence Kelly, Yin Wang, Stéphane Lafortune, Hongwei Liao, Scott A. Mahlke: Practical lock/unlock pairing for concurrent programs. CGO 2013: 1-12
- [c129]Hyoun Kyu Cho, Tipp Moseley, Richard E. Hank, Derek Bruening, Scott A. Mahlke: Instant profiling: Instrumentation sampling for profiling datacenter applications. CGO 2013: 1-10
- [c128]Amin Ansari, Shuguang Feng, Shantanu Gupta, Josep Torrellas, Scott A. Mahlke: Illusionist: Transforming lightweight cores into aggressive cores on demand. HPCA 2013: 436-447
- [c127]Daya Shanker Khudia, Scott A. Mahlke: Low cost control flow protection using abstract control signatures. LCTES 2013: 3-12
- 2012
- [j28]Ankit Sethia, Ganesh S. Dasika, Trevor N. Mudge, Scott A. Mahlke: A Customized Processor for Energy Efficient Scientific Computing. IEEE Trans. Computers 61(12): 1711-1723 (2012)
- [c126]Yongjun Park, Sangwon Seo, Hyunchul Park, Hyoun Kyu Cho, Scott A. Mahlke: SIMD defragmenter: efficient ILP realization on data-parallel architectures. ASPLOS 2012: 363-374
- [c125]Gaurav Chadha, Scott A. Mahlke, Satish Narayanasamy: When less is more (LIMO): controlled parallelism forimproved efficiency. CASES 2012: 141-150
- [c124]Hanjun Kim, Nick P. Johnson, Jae W. Lee, Scott A. Mahlke, David I. August: Automatic speculative DOALL for clusters. CGO 2012: 94-103
- [c123]Yun Zhang, Soumyadeep Ghosh, Jialu Huang, Jae W. Lee, Scott A. Mahlke, David I. August: Runtime asynchronous fault tolerance via speculation. CGO 2012: 145-154
- [c122]Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David Blaauw, Trevor N. Mudge: Process variation in near-threshold wide SIMD architectures. DAC 2012: 980-987
- [c121]Yongjun Park, Jason Jong Kyu Park, Scott A. Mahlke: Efficient performance scaling of future CGRAs for mobile applications. FPT 2012: 335-342
- [c120]Daya Shanker Khudia, Griffin Wright, Scott A. Mahlke: Efficient soft error protection for commodity embedded microprocessors using profile information. LCTES 2012: 99-108
- [c119]Hyoun Kyu Cho, Scott A. Mahlke: Dynamic acceleration of multithreaded program critical paths in near-threshold systems. MICRO Workshops 2012: 63-67
- [c118]Yongjun Park, Jason Jong Kyu Park, Hyunchul Park, Scott A. Mahlke: Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic Configurability. MICRO 2012: 84-95
- [c117]Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke: Composite Cores: Pushing Heterogeneity Into a Core. MICRO 2012: 317-328
- [c116]Mehrzad Samadi, Amir Hormati, Mojtaba Mehrara, Janghaeng Lee, Scott A. Mahlke: Adaptive input-aware compilation for graphics engines. PLDI 2012: 13-22
- 2011
- [j27]Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott A. Mahlke: StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs. IEEE Trans. Computers 60(1): 5-19 (2011)
- [j26]Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke: Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines. IEEE Trans. Computers 60(1): 35-49 (2011)
- [j25]Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge: Analyzing the Next Generation Software Defined Radio for Future Architectures. Signal Processing Systems 63(1): 83-94 (2011)
- [c115]Ganesh S. Dasika, Ankit Sethia, Trevor N. Mudge, Scott A. Mahlke: PEPSC: A Power-Efficient Processor for Scientific Computing. PACT 2011: 101-110
- [c114]Amir Hormati, Mehrzad Samadi, Mark Woh, Trevor N. Mudge, Scott A. Mahlke: Sponge: portable stream programming on graphics engines. ASPLOS 2011: 381-392
- [c113]Hongwei Liao, Jason Stanley, Yin Wang, Stéphane Lafortune, Spyros A. Reveliotis, Scott A. Mahlke: Deadlock-avoidance control of multithreaded software: An efficient siphon-based algorithm for Gadara petri nets. CDC-ECE 2011: 1142-1148
- [c112]Mojtaba Mehrara, Scott A. Mahlke: Dynamically accelerating client-side web applications through decoupled execution. CGO 2011: 74-84
- [c111]Mojtaba Mehrara, Po-Chun Hsu, Mehrzad Samadi, Scott A. Mahlke: Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism. HPCA 2011: 87-98
- [c110]Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke: Archipelago: A polymorphic cache design for enabling robust near-threshold operation. HPCA 2011: 539-550
- [c109]Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott A. Mahlke, David I. August: Bundled execution of recurring traces for energy-efficient general purpose processing. MICRO 2011: 12-23
- [c108]Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott A. Mahlke, David I. August: Encore: low-cost, fine-grained transient fault recovery. MICRO 2011: 398-409
- 2010
- [j24]Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti: Mobile Supercomputers for the Next-Generation Cell Phone. IEEE Computer 43(1): 81-85 (2010)
- [j23]Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: AnySP: Anytime Anywhere Anyway Signal Processing. IEEE Micro 30(1): 81-91 (2010)
- [j22]Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke: Putting Faulty Cores to Work. IEEE Micro 30(6): 36-45 (2010)
- [c107]Ganesh S. Dasika, Ankit Sethia, Vincentius Robby, Trevor N. Mudge, Scott A. Mahlke: MEDICS: ultra-portable processing for medical image reconstruction. PACT 2010: 181-192
- [c106]Shantanu Gupta, Shuguang Feng, Amin Ansari, Ganesh S. Dasika, Scott A. Mahlke: CoreGenesis: erasing core boundaries for robust and configurable performance. PACT 2010: 571-572
- [c105]Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke: MacroSS: macro-SIMDization of streaming applications. ASPLOS 2010: 285-296
- [c104]Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott A. Mahlke: Shoestring: probabilistic soft error reliability on the cheap. ASPLOS 2010: 385-396
- [c103]Yongjun Park, Hyunchul Park, Scott A. Mahlke, Sukjin Kim: Resource recycling: putting idle resources to work on a composable accelerator. CASES 2010: 21-30
- [c102]Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Clark, Trevor N. Mudge, Scott A. Mahlke: Mighty-morphing power-SIMD. CASES 2010: 67-76
- [c101]Hongwei Liao, Stéphane Lafortune, Spyros A. Reveliotis, Yin Wang, Scott A. Mahlke: Synthesis of maximally-permissive liveness-enforcing control policies for Gadara petri nets. CDC 2010: 2797-2804
- [c100]Tom Vander Aa, Praveen Raghavan, Scott A. Mahlke, Bjorn De Sutter, Aviral Shrivastava, Frank Hannig: Compilation techniques for CGRAs: exploring all parallelization approaches. CODES+ISSS 2010: 185-186
- [c99]Shantanu Gupta, Amin Ansari, Shuguang Feng, Scott A. Mahlke: StageWeb: Interweaving pipeline stages into a wearout and variation tolerant CMP fabric. DSN 2010: 101-110
- [c98]Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott A. Mahlke: Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors. HiPEAC 2010: 186-200
- [c97]Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke: Necromancer: enhancing system throughput by animating dead cores. ISCA 2010: 473-484
- [c96]Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge: Diet SODA: a power-efficient processor for digital cameras. ISLPED 2010: 79-84
- [c95]Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott A. Mahlke: Erasing Core Boundaries for Robust and Configurable Performance. MICRO 2010: 325-336
2000 – 2009
- 2009
- [j21]Terence Kelly, Yin Wang, Stéphane Lafortune, Scott A. Mahlke: Eliminating Concurrency Bugs with Control Engineering. IEEE Computer 42(11): 52-60 (2009)
- [c94]Amir Hormati, Yoonseo Choi, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke: Flextream: Adaptive Compilation of Streaming Applications for Heterogeneous Architectures. PACT 2009: 214-223
- [c93]Yin Wang, Hongwei Liao, Ahmed Nazeem, Spyros A. Reveliotis, Terence Kelly, Scott A. Mahlke, Stéphane Lafortune: Maximally permissive deadlock avoidance for multithreaded computer programs (Extended abstract). CASE 2009: 37-41
- [c92]Yongjun Park, Hyunchul Park, Scott A. Mahlke: CGRA express: accelerating execution using dynamic operation fusion. CASES 2009: 271-280
- [c91]Yin Wang, Hongwei Liao, Spyros A. Reveliotis, Terence Kelly, Scott A. Mahlke, Stéphane Lafortune: Gadara nets: Modeling and analyzing lock allocation for deadlock avoidance in multithreaded software. CDC 2009: 4971-4976
- [c90]Yoonseo Choi, Yuan Lin, Nathan Chong, Scott A. Mahlke, Trevor N. Mudge: Stream Compilation for Real-Time Embedded Multicore Systems. CGO 2009: 210-220
- [c89]Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Scott A. Mahlke: Bridging the computation gap between programmable processors and hardwired accelerators. HPCA 2009: 313-322
- [c88]Shantanu Gupta, Amin Ansari, Shuguang Feng, Scott A. Mahlke: Adaptive online testing for efficient hard fault detection. ICCD 2009: 343-349
- [c87]Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: AnySP: anytime anywhere anyway signal processing. ISCA 2009: 128-139
- [c86]Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke: Enabling ultra low voltage system operation by tolerating on-chip cache failures. ISLPED 2009: 307-310
- [c85]Taewook Oh, Bernhard Egger, Hyunchul Park, Scott A. Mahlke: Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures. LCTES 2009: 21-30
- [c84]Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke: ZerehCache: armoring cache architectures in high defect density technologies. MICRO 2009: 100-110
- [c83]Hyunchul Park, Yongjun Park, Scott A. Mahlke: Polymorphic pipeline array: a flexible multicore accelerator with virtualized execution for mobile multimedia applications. MICRO 2009: 370-380
- [c82]Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. Mahlke: Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory. PLDI 2009: 166-176
- [c81]Yin Wang, Stéphane Lafortune, Terence Kelly, Manjunath Kudlur, Scott A. Mahlke: The theory of deadlock avoidance via discrete control. POPL 2009: 252-263
- [c80]Sangwon Seo, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Sunfaram Vijay, Chaitali Chakrabarti: Customizing wide-SIMD architectures for H.264. ICSAMOS 2009: 172-179
- [c79]Hyunchul Park, Yongjun Park, Scott A. Mahlke: A dataflow-centric approach to design low power control paths in CGRAs. SASP 2009: 15-20
- [c78]Ganesh S. Dasika, Kevin Fan, Scott A. Mahlke: Power-efficient medical image processing using PUMA. SASP 2009: 29-34
- [c77]Amin Ansari, Dan Zhang, Scott A. Mahlke: Parade: A versatile parallel architecture for accelerating pulse train clustering. SASP 2009: 88-93
- 2008
- [j20]Todd M. Austin, Valeria Bertacco, Scott A. Mahlke, Yu Cao: Reliable Systems on Unreliable Fabrics. IEEE Design & Test of Computers 25(4): 322-332 (2008)
- [c76]Hyunchul Park, Kevin Fan, Scott A. Mahlke, Taewook Oh, Heeseok Kim, Hong-seok Kim: Edge-centric modulo scheduling for coarse-grained reconfigurable architectures. PACT 2008: 166-176
- [c75]Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason A. Blome, Scott A. Mahlke: StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems. CASES 2008: 1-10
- [c74]Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, David F. Bacon, Rodric M. Rabbah: Optimus: efficient realization of streaming applications on FPGAs. CASES 2008: 41-50
- [c73]Kevin Fan, Hyunchul Park, Manjunath Kudlur, Scott A. Mahlke: Modulo scheduling for highly customized datapaths to increase hardware reusability. CGO 2008: 124-133
- [c72]Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott A. Mahlke, David M. Bull: DVFS in loop accelerators using BLADES. DAC 2008: 894-897
- [c71]Hongtao Zhong, Mojtaba Mehrara, Steven A. Lieberman, Scott A. Mahlke: Uncovering hidden loop level parallelism in sequential applications. HPCA 2008: 290-301
- [c70]Mark Woh, Yuan Lin, Sangwon Seo, Trevor N. Mudge, Scott A. Mahlke: Analyzing the scalability of SIMD for the next generation software defined radio. ICASSP 2008: 5388-5391
- [c69]Nathan Clark, Amir Hormati, Scott A. Mahlke: VEAL: Virtualized Execution Accelerator for Loops. ISCA 2008: 389-400
- [c68]Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason A. Blome, Scott A. Mahlke: The StageNet fabric for constructing resilient multicore systems. MICRO 2008: 141-151
- [c67]Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Richard Bruce, Danny Kershaw, Alastair Reid, Mladen Wilder, Krisztián Flautner: From SODA to scotch: The evolution of a wireless baseband processor. MICRO 2008: 152-163
- [c66]Yin Wang, Terence Kelly, Manjunath Kudlur, Stéphane Lafortune, Scott A. Mahlke: Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs. OSDI 2008: 281-294
- [c65]Manjunath Kudlur, Scott A. Mahlke: Orchestrating the execution of stream programs on multicore platforms. PLDI 2008: 114-124
- [c64]Yuan Lin, Yoonseo Choi, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti: A parameterized dataflow language extension for embedded streaming systems. ICSAMOS 2008: 10-17
- 2007
- [j19]Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: SODA: A High-Performance DSP Architecture for Software-Defined Radio. IEEE Micro 27(1): 114-123 (2007)
- [j18]Antonio González, Scott A. Mahlke, Shubu Mukherjee, Resit Sendag, Derek Chiou, Joshua J. Yi: Reliability: Fallacy or Reality? IEEE Micro 27(6): 36-45 (2007)
- [j17]Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky: Architecting a reliable CMP switch architecture. TACO 4(1) (2007)
- [c63]Yuan Lin, Manjunath Kudlur, Scott A. Mahlke, Trevor N. Mudge: Hierarchical coarse-grained stream compilation for software defined radio. CASES 2007: 115-124
- [c62]Amir Hormati, Nathan Clark, Scott A. Mahlke: Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping. CGO 2007: 341-353
- [c61]Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlke: Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications. HPCA 2007: 25-36
- [c60]Nathan Clark, Amir Hormati, Sami Yehia, Scott A. Mahlke, Krisztián Flautner: Liquid SIMD: Abstracting SIMD Hardware using Lightweight Dynamic Mapping. HPCA 2007: 216-227
- [c59]Michael L. Chu, Scott A. Mahlke: Code and data partitioning for fine-grain parallelism. LCTES 2007: 161-164
- [c58]Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlke: Compiler-managed partitioned data caches for low power. LCTES 2007: 237-247
- [c57]Jason A. Blome, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke: Self-calibrating Online Wearout Detection. MICRO 2007: 109-122
- [c56]Michael L. Chu, Rajiv A. Ravindran, Scott A. Mahlke: Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures. MICRO 2007: 369-380
- [c55]Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: The Next Generation Challenge for Software Defined Radio. SAMOS 2007: 343-354
- 2006
- [c54]Hyunchul Park, Kevin Fan, Manjunath Kudlur, Scott A. Mahlke: Modulo graph embedding: mapping applications onto coarse-grained reconfigurable architectures. CASES 2006: 136-146
- [c53]Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami Yehia: Scalable subgraph mapping for acyclic computation accelerators. CASES 2006: 147-157
- [c52]Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke: Cost-efficient soft error protection for embedded microprocessors. CASES 2006: 421-431
- [c51]Michael L. Chu, Scott A. Mahlke: Compiler-directed Data Partitioning for Multicluster Processors. CGO 2006: 208-220
- [c50]Manjunath Kudlur, Kevin Fan, Scott A. Mahlke: Streamroller: : automatic synthesis of prescribed throughput accelerator pipelines. CODES+ISSS 2006: 270-275
- [c49]Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott A. Mahlke: Increasing hardware efficiency with multifunction loop accelerators. CODES+ISSS 2006: 276-281
- [c48]Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky: BulletProof: a defect-tolerant CMP switch architecture. HPCA 2006: 5-16
- [c47]Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner: SODA: A Low-power Architecture For Software Radio. ISCA 2006: 89-101
- [c46]Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Alastair Reid, Krisztián Flautner: Design and Implementation of Turbo Decoders for Software Defined Radio. SiPS 2006: 22-27
- 2005
- [j16]Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown: Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Trans. Computers 54(8): 998-1012 (2005)
- [j15]Nathan Clark, Hongtao Zhong, Scott A. Mahlke: Automated Custom Instruction Generation for Domain-Specific Processor Acceleration. IEEE Trans. Computers 54(10): 1258-1270 (2005)
- [c45]Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael S. Schlansker: A Distributed Control Path Architecture for VLIW Processors. IEEE PACT 2005: 197-206
- [c44]Sami Yehia, Nathan Clark, Scott A. Mahlke, Krisztián Flautner: Exploring the design space of LUT-based transparent accelerators. CASES 2005: 11-21
- [c43]Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown: Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. CGO 2005: 179-190
- [c42]Hyunseok Lee, Yuan Lin, Yoav Harel, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Krisztián Flautner: Software Defined Radio - A High Performance Embedded Challenge. HiPEAC 2005: 6-26
- [c41]Nathan Clark, Jason A. Blome, Michael L. Chu, Scott A. Mahlke, Stuart Biles, Krisztián Flautner: An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors. ISCA 2005: 272-283
- [c40]Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott A. Mahlke: Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System. MICRO 2005: 219-232
- 2004
- [j14]Todd M. Austin, David Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne Wolf: Mobile Supercomputers. IEEE Computer 37(5): 81-83 (2004)
- [j13]Michael L. Chu, Kevin Fan, Rajiv A. Ravindran, Scott A. Mahlke: Cost-Sensitive Partitioning in an Architecture Synthesis System for Multicluster Processors. IEEE Micro 24(3): 10-20 (2004)
- [c39]Manjunath Kudlur, Kevin Fan, Michael L. Chu, Scott A. Mahlke: Automatic Synthesis of Customized Local Memories for Multicluster Application Accelerators. ASAP 2004: 304-314
- [c38]Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson: Probabilistic Predicate-Aware Modulo Scheduling. CGO 2004: 151-162
- [c37]Manjunath Kudlur, Kevin Fan, Michael L. Chu, Rajiv A. Ravindran, Nathan Clark, Scott A. Mahlke: FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths. CGO 2004: 201-212
- [c36]Rajeev Krishna, Scott A. Mahlke, Todd M. Austin: Memory system design space exploration for low-power, real-time speech recognition. CODES+ISSS 2004: 140-145
- [c35]Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei W. Hwu, Scott A. Mahlke, Krishna V. Palem, Rodric M. Rabbah: Trimaran: An Infrastructure for Research in Instruction-Level Parallelism. LCPC 2004: 32-41
- [c34]Nathan Clark, Manjunath Kudlur, Hyunchul Park, Scott A. Mahlke, Krisztián Flautner: Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization. MICRO 2004: 30-40
- [e1]Mary Jane Irwin, Wei Zhao, Luciano Lavagno, Scott A. Mahlke (Eds.): Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2004, Washington DC, USA, September 22 - 25, 2004. ACM 2004, ISBN 1-58113-890-3
- 2003
- [j12]Nathan Clark, Hongtao Zhong, Wilkin Tang, Scott A. Mahlke: Automatic Design of Application Specific Instruction Set Extensions Through Dataflow Graph Exploration. International Journal of Parallel Programming 31(6): 429-449 (2003)
- [c33]Kevin Fan, Nathan Clark, Michael L. Chu, K. V. Manjunath, Rajiv A. Ravindran, Mikhail Smelyanskiy, Scott A. Mahlke: Systematic Register Bypass Customization for Application-Specific Processors. ASAP 2003: 64-74
- [c32]Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown: Increasing the number of effective registers in a low-power processor using a windowed register file. CASES 2003: 125-136
- [c31]Rajeev Krishna, Scott A. Mahlke, Todd M. Austin: Architectural optimizations for low-power, real-time speech recognition. CASES 2003: 220-231
- [c30]Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, Hsien-Hsin S. Lee: Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints. CGO 2003: 169-178
- [c29]Nathan Clark, Hongtao Zhong, Scott A. Mahlke: Processor Acceleration Through Automated Instruction Set Customization. MICRO 2003: 129-140
- [c28]Michael L. Chu, Kevin Fan, Scott A. Mahlke: Region-based hierarchical operation partitioning for multicluster processors. PLDI 2003: 300-311
- 2002
- [j11]Robert Schreiber, Shail Aditya, Scott A. Mahlke, Vinod Kathail, B. Ramakrishna Rau, Darren C. Cronquist, Mukund Sivaraman: PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators. VLSI Signal Processing 31(2): 127-142 (2002)
- 2001
- [j10]Scott A. Mahlke, Rajiv A. Ravindran, Michael S. Schlansker, Robert Schreiber, Timothy Sherwood: Bitwidth cognizant architecture synthesis of custom hardwareaccelerators. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1355-1371 (2001)
- 2000
- [j9]Shail Aditya, Scott A. Mahlke, B. Ramakrishna Rau: Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats. ACM Trans. Design Autom. Electr. Syst. 5(4): 752-773 (2000)
- [c27]Robert Schreiber, Shail Aditya, B. Ramakrishna Rau, Vinod Kathail, Scott A. Mahlke, Santosh G. Abraham, Greg Snider: High-Level Synthesis of Nonprogrammable Hardware Accelerators. ASAP 2000: 113-
1990 – 1999
- 1999
- [j8]David I. August, Wen-mei W. Hwu, Scott A. Mahlke: The Partial Reverse If-Conversion Framework for Balancing Control Flow and Predication. International Journal of Parallel Programming 27(5): 381-423 (1999)
- [c26]David I. August, John W. Sias, Jean-Michel Puiatti, Scott A. Mahlke, Daniel A. Connors, Kevin M. Crozier, Wen-mei W. Hwu: The Program Decision Logic Approach to Predicated Execution. ISCA 1999: 208-219
- [c25]Santosh G. Abraham, Scott A. Mahlke: Automatic and Efficient Evaluation of Memory Hierarchies for Embedded Systems. MICRO 1999: 114-125
- [c24]Michael S. Schlansker, Scott A. Mahlke, Richard Johnson: Control CPR: A Branch Height Reduction Optimization for EPIC Architectures. PLDI 1999: 155-168
- 1998
- [c23]David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, Wen-mei W. Hwu: Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture. ISCA 1998: 227-237
- [c22]Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu: IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. 25 Years ISCA: Retrospectives and Reprints 1998: 408-417
- 1997
- [c21]David I. August, Wen-mei W. Hwu, Scott A. Mahlke: A Framework for Balancing Control Flow and Predication. MICRO 1997: 92-103
- 1996
- [c20]Scott A. Mahlke, Balas K. Natarajan: Compiler Synthesized Dynamic Branch Prediction. MICRO 1996: 153-164
- 1995
- [j7]Pohua P. Chang, Daniel M. Lavery, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu: The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors. IEEE Trans. Computers 44(3): 353-370 (1995)
- [j6]Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu: Three Architecutral Models for Compiler-Controlled Speculative Execution. IEEE Trans. Computers 44(4): 481-494 (1995)
- [c19]Roger A. Bringmann, Scott A. Mahlke, Wen-mei W. Hwu: A study of the effects of compiler-controlled speculation on instruction and data caches. HICSS (1) 1995: 211-220
- [c18]Scott A. Mahlke, Richard E. Hank, James E. McCormick, David I. August, Wen-mei W. Hwu: A Comparison of Full and Partial Predicated Execution Support for ILP Processors. ISCA 1995: 138-150
- 1994
- [j5]William Y. Chen, Scott A. Mahlke, Nancy J. Warter, Sadun Anik, Wen-mei W. Hwu: Profile-assisted instruction scheduling. International Journal of Parallel Programming 22(2): 151-181 (1994)
- [c17]David M. Gallagher, William Y. Chen, Scott A. Mahlke, John C. Gyllenhaal, Wen-mei W. Hwu: Dynamic Memory Disambiguation Using the Memory Conflict Buffer. ASPLOS 1994: 183-193
- [c16]Scott A. Mahlke, Richard E. Hank, Roger A. Bringmann, John C. Gyllenhaal, David M. Gallagher, Wen-mei W. Hwu: Characterizing the impact of predicated execution on branch prediction. MICRO 1994: 217-227
- 1993
- [j4]Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, Daniel M. Lavery: The superblock: An effective technique for VLIW and superscalar compilation. The Journal of Supercomputing 7(1-2): 229-248 (1993)
- [j3]Scott A. Mahlke, William Y. Chen, Roger A. Bringmann, Richard E. Hank, Wen-mei W. Hwu, B. Ramakrishna Rau, Michael S. Schlansker: Sentinel Scheduling for VLIW and Superscalar Processors. ACM Trans. Comput. Syst. 11(4): 376-408 (1993)
- [c15]Tokuzo Kiyohara, Scott A. Mahlke, William Y. Chen, Roger A. Bringmann, Richard E. Hank, Sadun Anik, Wen-mei W. Hwu: Register Connection: A New Approach to Adding Registers into Instruction Set Architectures. ISCA 1993: 247-256
- [c14]Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, John C. Gyllenhaal, Wen-mei W. Hwu: Speculative execution exception recovery using write-back suppression. MICRO 1993: 214-223
- [c13]Richard E. Hank, Scott A. Mahlke, Roger A. Bringmann, John C. Gyllenhaal, Wen-mei W. Hwu: Superblock formation using static program analysis. MICRO 1993: 247-255
- [c12]Nancy J. Warter, Scott A. Mahlke, Wen-mei W. Hwu, B. Ramakrishna Rau: Reverse If-Conversion. PLDI 1993: 290-299
- 1992
- [j2]Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu: Profile-guided Automatic Inline Expansion for C Programs. Softw., Pract. Exper. 22(5): 349-369 (1992)
- [c11]Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu, B. Ramakrishna Rau, Michael S. Schlansker: Sentinel Scheduling for VLIW and Superscalar Processors. ASPLOS 1992: 238-247
- [c10]William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu: Tolerating First Level Memory Access Latency in High-Performance Systems. ICPP (1) 1992: 36-43
- [c9]William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu, Tokuzo Kiyohara, Pohua P. Chang: Tolerating data access latency with register preloading. ICS 1992: 104-113
- [c8]William Y. Chen, Roger A. Bringmann, Scott A. Mahlke, Sadun Anik, Tokuzo Kiyohara, Nancy J. Warter, Daniel M. Lavery, Wen-mei W. Hwu, Richard E. Hank, John C. Gyllenhaal: Using Profile Information to Assist Advaced Compiler Optimization and Scheduling. LCPC 1992: 31-48
- [c7]Scott A. Mahlke, David C. Lin, William Y. Chen, Richard E. Hank, Roger A. Bringmann: Effective compiler support for predicated execution using the hyperblock. MICRO 1992: 45-54
- [c6]William Y. Chen, Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, James E. Sicolo: An efficient architecture for loop based data preloading. MICRO 1992: 92-101
- [c5]Scott A. Mahlke, William Y. Chen, John C. Gyllenhaal, Wen-mei W. Hwu: Compiler Code Transformations for Superscalar-Based High Performance Systems. SC 1992: 808-817
- 1991
- [j1]Pohua P. Chang, Scott A. Mahlke, Wen-mei W. Hwu: Using Profile Information to Assist Classic Code Optimizations. Softw., Pract. Exper. 21(12): 1301-1321 (1991)
- [c4]Scott A. Mahlke, Nancy J. Warter, William Y. Chen, Pohua P. Chang, Wen-mei W. Hwu: The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs. ICPP (2) 1991: 142-145
- [c3]Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu: IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. ISCA 1991: 266-275
- [c2]Pohua P. Chang, William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu: Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors. MICRO 1991: 25-33
- [c1]William Y. Chen, Scott A. Mahlke, Pohua P. Chang, Wen-mei W. Hwu: Data Access Microarchitectures for Superscalar Processors with Compiler-Assisted Data Prefetching. MICRO 1991: 69-73
Coauthor Index
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